CVS log for src/sys/arch/evbarm/conf/Attic/std.amlogic

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Sync with HEAD

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Another kernel bites te dust.

Remove ODROID-C1 as it is now replaced by GENERIC. Thanks jmcneill.

Sync with head

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors.  AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested.  Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

Only ent KERNEL_BASE_EXT when we want to change KERNEL_BASE from its
default of 0x8000_0000

Don't use KERNEL_BASE_EXT where KERNEL_BASE should be instead.

Workaround a as(1) weirdness in armadaxp_start.S

Sort options.

No functional change.

Remove a space that snuck in

Whitespace consistency.

{make,}options<space><tab>
everything else just <tab?

update from HEAD

Sync with HEAD

file std.amlogic was added on branch tls-maxphys on 2017-12-03 11:36:03 +0000

Define __HAVE_CPU_UAREA_ALLOC_IDLELWP

Sync with HEAD

Pull up following revision(s) (requested by jmcneill in ticket #598):
	sys/arch/arm/amlogic/amlogic_board.c: up to revision 1.9
     	sys/arch/arm/amlogic/amlogic_canvasreg.h: revision 1.1
     	sys/arch/arm/amlogic/amlogic_com.c: up to revision 1.4
     	sys/arch/arm/amlogic/amlogic_comreg.h: up to revision 1.3
	sys/arch/arm/amlogic/amlogic_comvar.h: revision 1.1
	sys/arch/arm/amlogic/amlogic_cpufreq.c: up to revision 1.2
     	sys/arch/arm/amlogic/amlogic_crureg.h: up to revision 1.7
     	sys/arch/arm/amlogic/amlogic_dwctwo.c: up to revision 1.2
     	sys/arch/arm/amlogic/amlogic_genfb.c: revision 1.1
	sys/arch/arm/amlogic/amlogic_gmac.c: up to revision 1.2
	sys/arch/arm/amlogic/amlogic_hdmireg.h: revision 1.1
     	sys/arch/arm/amlogic/amlogic_intr.h: up to revision 1.5
     	sys/arch/arm/amlogic/amlogic_io.c: up to revision 1.7
     	sys/arch/arm/amlogic/amlogic_reg.h: up to revision 1.9
	sys/arch/arm/amlogic/amlogic_rng.c: revision 1.1
     	sys/arch/arm/amlogic/amlogic_sdhc.c: up to revision 1.3
     	sys/arch/arm/amlogic/amlogic_sdhcreg.h: revision 1.1
     	sys/arch/arm/amlogic/amlogic_space.c: revision 1.1
     	sys/arch/arm/amlogic/amlogic_var.h: up to revision 1.8
     	sys/arch/arm/amlogic/amlogic_vpureg.h: revision 1.1
	sys/arch/arm/arm/bootconfig.c: revisions 1.7-1.8
	sys/arch/arm/conf/files.arm: revision 1.129
	sys/arch/arm/cortex/pl310.c: revisions 1.16-1.17
	sys/arch/arm/cortex/a9_mpsubr.S: revisions 1.25-1.29
	sys/arch/arm/cortex/a9tmr.c: revisions 1.8-1.12
	sys/arch/arm/cortex/a9tmr_var.h: revision 1.4
	sys/arch/arm/cortex/a9wdt.c: revisions 1.3-1.4
	sys/arch/arm/cortex/armperiph.c: revisions 1.5-1.7
	sys/arch/arm/arm/cpufunc.c: revision 1.151
	sys/arch/arm/include/bootconfig.h: revision 1.7
	sys/arch/arm/include/locore.h: revision 1.19
	sys/arch/evbarm/amlogic/amlogic_machdep.c: up to revision 1.17
     	sys/arch/evbarm/amlogic/amlogic_start.S: up to revision 1.2
     	sys/arch/evbarm/amlogic/genassym.cf: revision 1.1
     	sys/arch/evbarm/amlogic/platform.h: revision 1.1
     	sys/arch/evbarm/conf/files.amlogic: up to revision 1.8
	sys/arch/evbarm/conf/std.amlogic: up to revision 1.2
	sys/arch/evbarm/conf/mk.amlogic: revision 1.1
     	sys/arch/evbarm/conf/ODROID-C1: up to revision 1.12
     	sys/arch/evarm/conf/ODROID-C1_INSTALL: revision 1.1
Don't use not as a variable since it's reserved in C++.
--
clean the a9 l2 cache before turning it on.
--
Add Cortex-A17 support
--
Fix CORTEXA17 support
--
Let the "cbar" device property override the cbar value, to work around
broken bootloaders
--
add a helper to update a9tmr frequency
--
detach and re-attach timecounter when updating freq, and reinit timer on
each cpu
--
fix typo
--
add BOOTOPT_TYPE_MACADDR for parsing mac address parameters
--
make sure we set ACTLR.SMP=1 for CPU_CORTEXA5 in !MP case, ok matt@
--
According to the Cortex-A5 TRM, the CBAR register is not implemented and
always reads as 0x00000000. Add ARM_CBAR option to set this in kernel
config.
--
skip a TLBIALL on Cortex-A5 that stops my odroid-c1 from booting, ok matt
--
match on Cortex-A5
--
match on Cortex-A5
--
allow arml2cc to be used on Cortex-A5 if the "offset" property is specified
--
print "A5" instead of "A9" at attach time if running on a Cortex-A5
--
Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
  userland
--
Work-in-progress Odroid-C1 support.
--
no need to override ARM_CBAR, remove unused COM_16750 option
--
Add basic serial console support.
--
add dwctwo and usb devices
--
ODROID-C1 SMP support.
--
auto-detect RAM size
--
ODROID-C1 onboard ethernet support.
--
add amlogicrng, add commented-out genfb placeholder
--
enable amlogicsdhc
--
add ODROID-C1 install kernel
--
Add CPUFREQ option to set boot CPU frequency. ODROID-C1 is advertised
as quad-core 1.5GHz but boots up at 1.2GHz; add CPUFREQ=1512 to config
and make sure to set the correct speed before attaching CPUs.
The speed can still be scaled down with machdep.cpu sysctls.
--
disable DEBUG, LOCKDEBUG, VERBOSE_INIT_ARM
--
Basic framebuffer console support. Work in progress.

file std.amlogic was added on branch nick-nhusb on 2015-04-06 15:17:55 +0000

file std.amlogic was added on branch netbsd-7 on 2015-03-21 08:51:18 +0000

no need to override ARM_CBAR, remove unused COM_16750 option

Work-in-progress Odroid-C1 support.