CVS log for src/sys/arch/arm/xscale/becc_pci.c

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Remove unnecessary sys/malloc.h include

Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
  Provide a new resource provider API:

  ==> pciconf_resource_init() -- Initialize a PCI configuration resources
      container.
  ==> pciconf_resource_add() -- Add a PCI configuration resource to the
      container (I/O, MEM, or prefetchable MEM).  Multiple resources of
      each type may be added.
  ==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
      container once the bus has been configured.

  This is much easier to use than the previous method of providing an
  extent map for each kind of resource, and works better for e.g. ACPI
  platforms that provide potentially multiple PCI resources in tables
  provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
  rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

Sync with HEAD

Sync with HEAD, resolve a couple of conflicts

Add intr_establish_xname support to arm and expose it to intrctl

update from HEAD

Sync with HEAD (as of 26th Dec)

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
  if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
  Currently the following extended capabilities are decoded:
   - Advanced Error Reporting
   - Virtual Channel
   - Device Serial Number
   - Power Budgeting
   - Root Complex Link Declaration
   - Root Complex Event Collector Association
   - Access Control Services
   - Alternative Routing-ID Interpretation
   - Address Translation Services
   - Single Root IO Virtualization
   - Page Request
   - TPH Requester
   - Latency Tolerance Reporting
   - Secondary PCI Express
   - Process Address Space ID
   - LN Requester
   - L1 PM Substates
  The following extended capabilities are not decoded yet:
   - Root Complex Internal Link Control
   - Multi-Function Virtual Channel
   - RCRB Header
   - Vendor Unique
   - Configuration Access Correction
   - Multiple Root IO Virtualization
   - Multicast
   - Resizable BAR
   - Dynamic Power Allocation
   - Protocol Multiplexing
   - Downstream Port Containment
   - Precision Time Management
   - M-PCIe
   - Function Reading Status Queueing
   - Readiness Time Reporting
   - Designated Vendor-Specific

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Fix typo.

wrap a few lines

make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.

sync with head

<arm/locore.h> fallout (fixes some include ordering errors)

Resync to 2012-11-19 00:00:00 UTC

sync with head

struct device * -> device_t for IXP4xx (and nslu2).
Tested with my NSLU2.

Fix pci_conf_interrupt fallout.

sync with head

merge to -current.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

#include <sys/bus.h> instead of <machine/bus.h>.

Sync with HEAD.

sync with head

Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args.  Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
    pci_intr_map() was a leftover from Xen 2.  Probably a bug.  I
    stopped writing it.  I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
    Probably a bug.  I use a temporary variable.  I have not tested this
    change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
    Probably a bug.  Use a local pci_attach_args.  I have not tested
    this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
    caller's pci_attach_args.  Probably a bug.  Make a local copy of the
    caller's pci_attach_args and modify the copy.  I have not tested
    this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
	HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
	KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
	TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
	OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

sync with head.

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

"bogus pin" -> "bogus device" in last change.

Fix (real) uninitialized error.  (Someone familiar with this should see
if is really an error).

__KERNEL_RCSID()

Sprinkle a few aprint_normal()s in place of printf().

Get the interrupt mappings right for the slot.

Support for ADI Engineering's Big Endian Companion Chip for the
Intel i80200 XScale processor.  Despite its name, the BECC can
run in both big- and little-endian modes.