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CVS log for src/sys/arch/arm/sa11x0/sa11x0_irq.S

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Default branch: MAIN
Current tag: yamt-kmem-base3


Revision 1.10 / (download) - annotate - [select for diffs], Fri Mar 9 19:21:59 2007 UTC (17 years, 1 month ago) by thorpej
Branch: MAIN
CVS Tags: yamt-x86pmap-base4, yamt-x86pmap-base3, yamt-x86pmap-base2, yamt-x86pmap-base, yamt-x86pmap, yamt-kmem-base3, yamt-kmem-base2, yamt-kmem-base, yamt-kmem, yamt-idlelwp-base8, vmlocking2-base3, vmlocking2-base2, vmlocking2-base1, vmlocking2, vmlocking-nbase, vmlocking-base, vmlocking, thorpej-atomic-base, reinoud-bufcleanup-nbase, reinoud-bufcleanup-base, reinoud-bufcleanup, ppcoea-renovation-base, ppcoea-renovation, nick-csl-alignment-base5, nick-csl-alignment-base, nick-csl-alignment, mjf-ufs-trans-base, mjf-ufs-trans, matt-mips64-base, matt-mips64, jmcneill-pm-base, jmcneill-pm, jmcneill-base, cube-autoconf-base, cube-autoconf, chris-arm-intr-rework-base3, chris-arm-intr-rework-base2, chris-arm-intr-rework-base, bouyer-xenamd64-base2, bouyer-xenamd64-base, bouyer-xenamd64
Branch point for: thorpej-atomic, mjf-devfs, matt-armv6, hpcarm-cleanup, chris-arm-intr-rework, bouyer-xeni386
Changes since 1.9: +5 -1 lines
Diff to previous 1.9 (colored)

Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing.  (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.

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