CVS log for src/sys/arch/arm/pic/pic_splfuncs.c

Up to [cvs.NetBSD.org] / src / sys / arch / arm / pic

Request diff between arbitrary revisions

Keyword substitution: kv
Default branch: MAIN

Remove GIC_SPLFUNCS.

pic: splx performance improvement

Skip disabling interrupts and check for pending hard interrupts if old
ipl was < IPL_VM.

Make _splraise/_spllower/splx functions available to modules again.

arm: pic: allow overriding _splraise/_spllower/splx

Sync with HEAD.

Sync with HEAD.

Revert recent pic optimizations until I have more time to work on this.

Add DISABLE_INTERRUPT_SAVE(), like DISABLE_INTERRUPT() but also returns
the previous state.

Use DISABLE_INTERRUPT_SAVE()/ENABLE_INTERRUPT() in pic_splfuncs instead
of cpsid()/cpsie(). The difference here is the caller no longer specifies
which bits to disable and enable; on arm32 we continue to use I32_bit and
on aarch64 we now consistently toggle both IRQ and FIQ state.

Make the splx fast path smaller.

Inline pic_set_priority and use cpu_dosoftints_ci when available.

Only disable/enable interrupts if processing pending interrupts, and
inline pic_set_pending_psw.

Adjust ci_intr_depth when processing pending ints

Inline "pic_do_pending_ints" in splx and check ci_pending_ipls to optimize
the common case (hw priority, no cascaded interrupts pending).

This also removes the need for the "pic_pending_used" flag, and should fix
booting on Raspberry Pi 3.

pic: avoid pic_do_pending_ints if pic_mark_pending_* has never been called

splx: use pic_set_priority_psw in interrupts disabled case to skip a few
more daif accesses.

splx: restore priority even if interrupts are disabled

splx: only dispatch hard interrupts if interrupts are enabled

splx: only dispatch softints if interrupts are enabled

Sync with HEAD.  77 conflicts resolved - all of them $NetBSD$

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

update from HEAD

Sync with HEAD

#include <sys/lwp.h>

Add aarch64 support (mostly remapping I32_bit and F32_bit onto aarch64 bits).

Rebase to HEAD as of a few days ago.

Rebase.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Do softints after restoring interrupts

Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.

Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.

sync with head

file pic_splfuncs.c was added on branch matt-nb5-mips64 on 2014-02-15 16:18:37 +0000

Add PIC hooks for MP and for the ARM Generic Interrupt Controller.

Add hooks for __HAVE_PIC_SET_PRIORITY which allows updating of a hardware
(PIC) priority based on current IPL.

Sync with HEAD.

sync with head

file pic_splfuncs.c was added on branch jruoho-x86intr on 2011-06-06 09:05:06 +0000

Restore ci_intr_depth increment for duration of pic_do_pending_ints() lost
when this code was moved.

sync with head

file pic_splfuncs.c was added on branch rmind-uvmplock on 2011-04-21 01:40:53 +0000

split arch/arm/pic/pic.c so that we can implement more efficient version of splfoo() while using pic framework.