CVS log for src/sys/arch/arm/pci/pci_msi_machdep.c

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Keyword substitution: kv
Default branch: MAIN

Pull up following revision(s) (requested by jmcneill in ticket #735):

	sys/dev/pci/pci_resource.c: revision 1.5
	sys/arch/arm/pci/pci_msi_machdep.c: revision 1.10
	sys/arch/aarch64/include/vmparam.h: revision 1.21
	sys/dev/acpi/acpi_resource.c: revision 1.43

pci_resource: Make unexpected bus numbers in bridges non-fatal.

Firmware bugs happen. Log a warning and continue instead of panicing.
acpi: Ignore producer/consumer bit for fixed memory resources.

The requirement to honour the producer/consumer bit in fixed memory
resource descriptors was dropped at some point in a revision to the ACPI
2.0 specification because too many firmware implementations got it wrong.

aarch64: Bump VM_PHYSSEG_MAX to match DRAM_BANKS / FDT_MEMORY_RANGES.

On aarch64 there is a single free list, so VM_PHYSSEG_MAX needs to be
the same as FDT_MEMORY_RANGES (which needs to be the same as DRAM_BANKS).

Future cleanup should be done to fold these into a single define.

arm: pci: Fix ITS ID lookup for MSIs.
pci_get_frameid expects a BDF requestor ID as input, not a Device ID.

Fixes MSI/MSI-X support on Ampere Altra systems.

Sync with HEAD.

arm: pci: Fix ITS ID lookup for MSIs.

pci_get_frameid expects a BDF requestor ID as input, not a Device ID.
Fixes MSI/MSI-X support on Ampere Altra systems.

Mostly merge changes from HEAD upto 20200411

Merge changes from current as of 20200406

Sync with head.

spaces -> <tab>

Add support for multiple GICv3 ITS domains.

Pull up following revision(s) (requested by jmcneill in ticket #18):

	sys/arch/arm/pci/pci_msi_machdep.c: revision 1.7

Properly honour max_type arg to pci_intr_alloc

Properly honour max_type arg to pci_intr_alloc

Support pci_intr_release for INTx interrupts

Sync with HEAD

Sync with HEAD, resolve a few conflicts

file pci_msi_machdep.c was added on branch phil-wifi on 2019-06-10 22:05:55 +0000

Fix MSIX allocation in pci_intr_alloc

make pci_intr_alloc() try also MSI-X by default (with NULL count);
there are boards/emulators which only have MSI-X and no MSI, and
so far there is no evidence there are devices which support both
and don't work in MSI-X mode

this change is supposed to reduce amount of needed cut&paste code in drivers

discussed briefly with jmcneill@

Sync with HEAD, resolve a couple of conflicts

file pci_msi_machdep.c was added on branch pgoyette-compat on 2018-11-26 01:52:19 +0000

Add intr_establish_xname support to arm and expose it to intrctl

Add MSI-X support.

Add support for PCI MSI using ARM GICv2m.