CVS log for src/sys/arch/arm/nvidia/files.tegra

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Default branch: MAIN

tegra_xusb: fix xusb static firmware build

To work around objcopy and ld now being unable to create a EABI5 object
from a binary, use the assembler directive .incbin in inline assembly
to pull in the firmware blob.

This also probably makes TEGRA210_XUSB_BIN_STATIC actually work.

tegra_xusb depends on firmload.

Make the dependency explicit, do not rely on some random USB device to
pull it in.

Mostly merge changes from HEAD upto 20200411

Remove unused needs-flag

Sync with HEAD

Sync with HEAD

Use psci_fdt_bootstrap for MP spinup on Tegra210.

Sync with HEAD.  77 conflicts resolved - all of them $NetBSD$

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

Synch with HEAD, resolve conflicts

move from sys/arch/arm/arm32/armv7_generic_dma.c to sys/arch/arm/arm/arm_generic_dma.c,
and change variable name from armv7_generic_dma_tag to arm_generic_dma_tag

no functional change. (preliminary changes for merging aarch64)

Use DRM GEM/CMA helper.

update from HEAD

file files.tegra was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000

More PCIe / XUSBPAD initialization goo for Tegra210.

Replace unused mpio driver with a more generic interface for pinmux, and
add Tegra210 pinmux support.

Add basic tegra210 xusbpad driver, shorten tegra*xusbpad driver names to
tegra*xpad to fit in dv_xname

The xusbpad driver is tegra 124 specific so split it out into a separate
driver. Add (not yet working) tegra 210 support to the xusb driver.

Sync with HEAD

Add support for NVIDIA Tegra X1.

Attach Tegra124 DVFS to /cpus/cpu0 now that another driver is claiming the
/cpus node.

Fix VERBOSE_INIT_ARM build with TEGRA kernel.

Add a facility for platform-specific callbacks and use it to remove most
of the Tegra-specific code from tegra_machdep.c.

Platform code matches on the compatible property of the root ("/") DT node
and allows for chip-specific implementations of the following:

 - devmap: Return a 0-terminated list of static device map entries.
 - bootstrap: Early initialization of platform-specific facilities.
 - early_putchar: Provides an implementation of putchar for use in early
     debug messages.
 - device_register: Platform-specific device register callback.
 - reset: Platform-specific CPU reset implementation.
 - consinit: Platform-specific console init implementation.

Enumerate CPUs, GIC, and generic timer using FDT data instead of relying
on hard-coded tables in mainbus.

Chip detection and MP spinup code for Tegra210

Sync with HEAD - tag prg-localcount2-base1

Add Tegra124 APB-DMA controller driver.

Hide the debug output unless either TEGRA_XUSB_DEBUG is defined or
tegra_xusb_debug is set to 1.

Sync with HEAD

Split cpufreq driver out into a separate module.

Get rid of tegra_cpuinit after scanning fdt and attach the cpufreq support
to the /cpus node. Use regulator API instead of poking directly at the I2C
controller to set voltages.

Fix defparam name (CONADDR -> CONSADDR)

Sync with HEAD

Hide debug messages with TEGRA_XUSBPAD_DEBUG

Sync with HEAD

Sync with HEAD

Add xhci(4) attachment glue and firmware handler for Tegra K1 "XUSB"
xHCI controller.  Adjustments to tegraxusbpad(4) will be needed
to connect the controller to actual USB ports.

Sync with HEAD (as of 26th Dec)

Switch Tegra over to fdt based clocks and reset controls.

Get rid of board-specific options.

remove tegraio

Use fdt for device enumeration.

Add SOC_THERM temperature sensor driver:

# envstat -d tegrasoctherm0
        Current  CritMax  WarnMax  WarnMin  CritMin  Unit
CPU0:    27.500                                      degC
CPU1:    27.500                                      degC
CPU2:    29.500                                      degC
CPU3:    29.000                                      degC
MEM0:    26.500                                      degC
MEM1:    27.000                                      degC
 GPU:    27.000                                      degC
PLLX:    28.000                                      degC

Add FUSE driver, use it to determine maximum CPU frequency for the board.
Retire CPUFREQ_BOOT option and always use highest available CPU frequency.

Remove HOST1X and AHB_A2 from pmap_devmap

Use GEM for memory management. Fixes a couple issues while here:
 - No longer needs to allocate 35MB (!) for framebuffer console.
 - Allows xrandr to switch to modes larger than the framebuffer console.
 - Removes hack that redirected mmap calls to wsdisplay0

Port the Tegra (2D) display drivers to the DRM framework.

tegradrm0 at tegraio0
tegrafb0 at tegradrm0
tegrafb0: framebuffer at 0x9b000000, size 1280x720, depth 32, stride 5120
wsdisplay0 at tegrafb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wsdisplay0: screen 0-3 added (default, vt100 emulation)
tegradrm0: info: registered panic notifier
tegradrm0: initialized tegra 0.1.0 20151108 on minor 0

Same features as before (fb console, X wsfb driver works) with the addition
of being able to use xf86-video-modesetting and xrandr to switch video
modes at runtime.

Split out USB PHY support out of the ehci glue and into a separate driver.

defflag TEGRA_HDMI_DEBUG

Add bus glue for attaching nouveau DRM

Sync with HEAD

Add kernel config for Tegra K1 "Nyan Big" board, as found in the Acer
Chromebook 13 (CB5-311).

Add driver for Tegra HDMI CEC controller.

Sync with HEAD

Tegra K1 Watchdog support.

Power-on Host1x subsystem

Work in progress HDMI / framebuffer support for Tegra K1.

Tegra XUSB PADCTL driver

Tegra K1 CPU frequency scaling support.

jetsontk1# sysctl machdep.cpu
machdep.cpu.frequency.target = 2292
machdep.cpu.frequency.current = 2292
machdep.cpu.frequency.available = 2292 2100 1896 1692 1500 1296 1092 900 696

Tegra I2C driver

add Tegra MPIO / Pinmux driver

Tegra K1 RTC driver.

Add Tegra K1 PCIE support.

jetsontk1 specific gpio setup for sdhc

hook in gpio driver

Add a basic driver for the Clock and Reset controller, use it to determine
CPU frequency.

Sync with HEAD

file files.tegra was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000

Use shared armv7_generic_space

NVIDIA Tegra K1 support, work in progress.