CVS log for src/sys/arch/arm/include/arm32/frame.h

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Keyword substitution: kv
Default branch: MAIN

Mirror the changes to aarch64 and

- Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often
  by MI code.  It also makes curlwp preemption safe,

- Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs
  can see spurious ASTs (which doesn't cause a problem, it just means some
  time may be wasted).

- Make sure ASTs are always set on the same CPU as the target LWP, and
  delivered via IPI if posted from a remote CPU so that they are resolved
  quickly.

- Add some cache line padding to struct cpu_info.

- Add a memory barrier in a couple of places where ci_curlwp is set.  This
  is needed whenever an LWP that is resuming on the CPU could hold an
  adaptive mutex.  The barrier needs to drain the CPU's store buffer, so
  that the update to ci_curlwp becomes globally visible before the LWP can
  resume and call mutex_exit().

Sync with HEAD

Sync with HEAD, resolve a couple of conflicts

Consistency - NFC

Remove magic number

update from HEAD

Sync with HEAD

Fixup the non-KDTRACE_HOOKS case of PUSHDTRACEGAP - we need to copy the
stack pointer to r2.

split PUSHFRAMEINSVC into two pieces so that we can insert some additional
instructions in the middle in undefinedinstruction_bounce, namely to add
some additional space on the stack before the trapframe for undefineds from
SVC mode.  this extra space allows dtrace to emulate a "push" instruction.
the initial version was from me and some improvements were from nick.

Trailing whitespace

Sync with HEAD

Put the clearing of ci_astpending back in frame.h while interrupts are
disabled.

Don't clear CI_ASTPENDING in exception return, do it in ast() instead.
Add basic support for __HAVE_PREEMPTION.
Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined.
Use kpreempt_disable/kpreempt_enable

CI_ASTPENDING is now a bitfield and low bit is for user ASTs.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Remove KERNEL_LOCK/KERNEL_UNLOCK

Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.

When restoring SPRSR, use spsr_fsxc not spsr_all so bits[23-8] are restored.
This should fix use of simd instructions that rely on the GE bits.

Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.

sync with head

Use blx ip if _ARM_ARCH_5
prepare to get of switchframe

Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.

Resync to 2012-11-19 00:00:00 UTC

sync with head

Change to use symbolic constants from assym.h and fix a typo in a comment.

Implement a "fast" path for IRQ handling out of the idle loop.  Since we
are in SVC32 already we only need to save a few registers.  Processing is
also simplified since we know we can't return to user-mode.

Use ARMV6+ cpsi{d,f} instructions whenever possible.  Use r7 to hold previous
mode and avoid recomputing it.  Add support for obtaining kernel_lock on
exception entry and exit.

Fix typo.

small rototill.
pcb_flags is dead.  PCB_NOALIGNFLT is now in stored l_md.md_flags as
MDLWP_NOALIGNFLT.  This avoids a few loads of the PCB in exception handling.
pcb_tf has been moved to l_md.md_tf.  Again this avoids a lot of pcb
references just to access or set this.  It also means that pcb doesn't
need to accessed by MI code.
Move pcb_onfault to after the pcb union.
Add pcb_sp macro to make code prettier.
Add lwp_settrapframe(l, tf) to set the l_md.md_tf field.
Use lwp_trapframe to access it (was process_frame but that name was changed
in a previous commit).
Kill off curpcb in acorn26.
Kill the checks for curlwp being NULL.
Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version.
Replace tests for usermode with that macro.

Remove irqframe and replace with identical trapframe.

Move fill to between spsr and r0 so that the registers will be dword aligned.
Adjust PUSH/PULL macros accordingly.

Shrink PUSHFRAMEINSVC by 4 more instructions.

Add code to make sure the trapframe is aligned to a doubleword boundary.

Only do the SA110 user register save workaround on kernel using SA110s.

Make trapframe/irqframe an even number of words (make adjustments for
the filler word).
Improve the comments in PUSH/PULL macros.
Use the armv6+ CPS instruction if we can.

whitespace cleanup

sync with head.

Sync with HEAD.

Now that GET_CURPCB and GET_CURCPU are generally available, use them
unconditionally rather than rolling our own (often badly) all over the
place.

Clear out the vestigial support for the Simtec Hydra board.  Now that we're
getting support for proper SMP ARMs, keeping non-functional support for
a seriously crippled not-really-SMP system is likely to cause more problems
than it's worth, even if it was fun for a while.

Sync with HEAD.

Update haad-dm branch to haad-dm-base2.

Fix __HAVE_FAST_SOFTINTS (boolean dyslexia strikes again).
Add some KASSERTS to make sure assumptions are valid.

Fix DO_PENDING_SOFTINTS (remove pasto, remove a branch, use movs)
pasto spotted by mjf

Sync with HEAD.

Sync with HEAD.

Sync with wrstuden-revivesa-base-2.

Only call dosoftints() is ci_intr_depth == 0

Do fast softint processing in DO_AST_AND_RESTORE_ALIGNMENT_FAULTS.
Redo the softint mask so ci_softints >> ci_cpl != 0 becomes an easy
test for work to be done.

Sync with HEAD.

sync with head.

sync with head.

Merge kernel changes in matt-armv6 to HEAD.

sync with HEAD

Sync with HEAD.

Sync with HEAD.

sync with head

Sync to HEAD.

Sync with HEAD

Push a switchframe in dumpsys and cpu_switchto, but as dumpsys calls
other funcs a switchframe needs to be a multiple of 8 bytes. Stash sp as
well in the switchframe to bump it to 24bytes.

Setup the switchframe appropriately in cpu_lwp_fork.

Remove savectx - nothing uses it.

All of this make gdb's life much easier when dealing with crash dumps and
live kernels.

Reviewd by chris.

sync with head.

Move GET_CURCPU before the branch in ENABLE_ALIGNMENT_FAULTS.

Rototill to deal with curpcb/astpending/etc moves to cpu_info.
Make ENABLE_ALIGNMENTS_FAULT leave cpu_info in r4.
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS takes advantage of r4 being cpu_info.

Remove _lock_cas() in favor of atomic_cas_32().

Sync with HEAD.

Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing.  (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.

sync with head.

Sync with head.

sync with head

- Document COMPAT_15 as doing nothing
- Add COMPAT_15 to all the kernel that had COMPAT_14, for the sake of coherency
- Remove the only occurences of #ifdef COMPAT_15 in the tree: for the ARM
ports, COMPAT_15 was always used in conjunction with EXEC_AOUT. Only EXEC_AOUT
matters here.

This address kern/18407

sync with head.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

Change all archs that did:

#define clockframe somethingelse

to:

struct clockframe {
	struct somethingelse cf_se;
};

and change access macros accordingly.

That means that, at least for that very issue, things will not go
ka-boomy if you don't have the actual definition of struct clockframe
before including systm.h.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Pullup rev 1.11 (requested by scw in ticket #209)

Always disable interrupts at the start of
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS. PR#23581

Always disable interrupts at the start of DO_AST_AND_RESTORE_ALIGNMENT_FAULTS.
This addresses #2 of port-arm/23581 by Richard Earnshaw.

Many thanks to Richard for spotting the cause of this problem.

The last cpsr_all change was misguided. Just use cpsr_c wherever possible.

 - For consistency, use cpsr_all instead of cpsr.
 - Make sure IRQs are enabled before handling ASTs.

Slight re-org of the alignment/ast exit macro to better mimic the
original behaviour WRT cpsr/I32_bit handling.

Move the alignment fault enable/disable code into macroes to avoid
needless duplication.

Additionally, merge AST handling into the same code.

exception.S and the generic irq_dispatch.S routines have been updated
to use the macroes.

XXX: I have patches for the non-generic IRQ dispatch routines, but they
need testing by someone with hardware.

Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop
instead.

With this change, we no longer need to save the current interrupt level
in the switchframe. This is no great loss since both cpu_switch and
cpu_switchto are always called at splsched, so the process' spl is
effectively saved somewhere in the callstack.

This fixes an evbarm problem reported by Allen Briggs:

        lwp gets into sa_switch -> mi_switch with newl != NULL
            when it's the last element on the runqueue, so it
            hits the second bit of:
                if (newl == NULL) {
                        retval = cpu_switch(l, NULL);
                } else {
                        remrunqueue(newl);
                        cpu_switchto(l, newl);
                        retval = 0;
                }

        mi_switch calls remrunqueue() and cpu_switchto()

        cpu_switchto unlocks the sched lock
        cpu_switchto drops CPU priority
        softclock is received
        schedcpu is called from softclock
        schedcpu hits the first if () {} block here:
                if (l->l_priority >= PUSER) {
                        if (l->l_stat == LSRUN &&
                            (l->l_flag & L_INMEM) &&
                            (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) {
                                remrunqueue(l);
                                l->l_priority = l->l_usrpri;
                                setrunqueue(l);
                        } else
                                l->l_priority = l->l_usrpri;
                }

        Since mi_switch has already run remrunqueue, the LWP has been
            removed, but it's not been put back on any queue, so the
            remrunqueue panics.

Re-do the following revisions, this time on a branch where they won't
interfere with the nathanw_sa merge:

syssrc/sys/arch/arm/arm32/cpuswitch.S			1.26
syssrc/sys/arch/arm/arm32/genassym.cf			1.18
syssrc/sys/arch/arm/arm32/vm_machdep.c			1.21
syssrc/sys/arch/arm/include/pcb.h			1.5

Original commit message:

In cpu_switch(), stack more registers at the start of the function,
and hence save fewer into the PCB.  This should give me enough free
registers in cpu_switch to tidy things up and support MULTIPROCESSOR
properly.  While we're here, make the stacked registers into an
APCS stack frame, so that DDB backtraces through cpu_switch() will
work.

This also affects cpu_fork(), which has to fabricate a switchframe and
PCB for the new process.

file frame.h was added on branch bjh21-hydra on 2002-10-19 11:59:37 +0000

Undo recent cpu_switch register usage changes in order to decrease nathanw_sa
merge pain.

In cpu_switch(), stack more registers at the start of the function,
and hence save fewer into the PCB.  This should give me enough free
registers in cpu_switch to tidy things up and support MULTIPROCESSOR
properly.  While we're here, make the stacked registers into an
APCS stack frame, so that DDB backtraces through cpu_switch() will
work.

This also affects cpu_fork(), which has to fabricate a switchframe and
PCB for the new process.

sync kqueue branch with HEAD

catch up with -current.

Partial (ARM only) sync with trunk -- significant performance improvements
for XScale-based systems.

Use cpsr_c rather then cpsr_all where appropriate.

Update the kqueue branch to HEAD.

file frame.h was added on branch nathanw_sa on 2002-08-19 21:39:17 +0000

Use comments around the token after a #endif.

Sync with HEAD.

file frame.h was added on branch thorpej_scsipi on 2001-03-12 13:27:24 +0000

Big patch for merging common include files of the new hpcarm tree and the old arm32
tree into the new arm substree. All moved files are relinked with a stub that included
the file from the new location; this might be done better later.