Annotation of src/sys/arch/arm/imx/imxuart.c, Revision 1.3.18.1
1.3.18.1! rmind 1: /* $NetBSD$ */
1.2 matt 2:
1.3.18.1! rmind 3: /*
! 4: * Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
! 5: * Written by Hiroyuki Bessho for Genetec Corporation.
! 6: *
! 7: * Redistribution and use in source and binary forms, with or without
! 8: * modification, are permitted provided that the following conditions
! 9: * are met:
! 10: * 1. Redistributions of source code must retain the above copyright
! 11: * notice, this list of conditions and the following disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: *
! 16: * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
! 17: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 18: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 19: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
! 20: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 21: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 22: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 23: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 24: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 25: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 26: * POSSIBILITY OF SUCH DAMAGE.
! 27: *
! 28: */
1.2 matt 29:
1.3.18.1! rmind 30: /*
! 31: * derived from sys/dev/ic/com.c
! 32: */
1.2 matt 33:
1.3.18.1! rmind 34: /*-
! 35: * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
! 36: * All rights reserved.
! 37: *
! 38: * This code is derived from software contributed to The NetBSD Foundation
! 39: * by Charles M. Hannum.
! 40: *
! 41: * Redistribution and use in source and binary forms, with or without
! 42: * modification, are permitted provided that the following conditions
! 43: * are met:
! 44: * 1. Redistributions of source code must retain the above copyright
! 45: * notice, this list of conditions and the following disclaimer.
! 46: * 2. Redistributions in binary form must reproduce the above copyright
! 47: * notice, this list of conditions and the following disclaimer in the
! 48: * documentation and/or other materials provided with the distribution.
! 49: *
! 50: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 51: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 52: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 53: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 54: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 55: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 56: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 57: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 58: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 59: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 60: * POSSIBILITY OF SUCH DAMAGE.
! 61: */
1.2 matt 62:
1.3.18.1! rmind 63: /*
! 64: * Copyright (c) 1991 The Regents of the University of California.
! 65: * All rights reserved.
! 66: *
! 67: * Redistribution and use in source and binary forms, with or without
! 68: * modification, are permitted provided that the following conditions
! 69: * are met:
! 70: * 1. Redistributions of source code must retain the above copyright
! 71: * notice, this list of conditions and the following disclaimer.
! 72: * 2. Redistributions in binary form must reproduce the above copyright
! 73: * notice, this list of conditions and the following disclaimer in the
! 74: * documentation and/or other materials provided with the distribution.
! 75: * 3. Neither the name of the University nor the names of its contributors
! 76: * may be used to endorse or promote products derived from this software
! 77: * without specific prior written permission.
! 78: *
! 79: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! 80: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 81: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 82: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! 83: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 84: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 85: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 86: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 87: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 88: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 89: * SUCH DAMAGE.
! 90: *
! 91: * @(#)com.c 7.5 (Berkeley) 5/16/91
! 92: */
! 93:
! 94: /*
! 95: * driver for UART in i.MX SoC.
! 96: */
1.2 matt 97:
1.3.18.1! rmind 98: #include <sys/cdefs.h>
! 99: __KERNEL_RCSID(0, "$NetBSD$");
1.2 matt 100:
1.3.18.1! rmind 101: #include "opt_imxuart.h"
! 102: #include "opt_ddb.h"
! 103: #include "opt_kgdb.h"
! 104: #include "opt_lockdebug.h"
! 105: #include "opt_multiprocessor.h"
! 106: #include "opt_ntp.h"
! 107: #include "opt_imxuart.h"
! 108: #include "opt_imx.h"
! 109:
! 110: #include "rnd.h"
! 111: #if NRND > 0 && defined(RND_COM)
! 112: #include <sys/rnd.h>
! 113: #endif
1.2 matt 114:
1.3.18.1! rmind 115: #ifndef IMXUART_TOLERANCE
! 116: #define IMXUART_TOLERANCE 30 /* baud rate tolerance, in 0.1% units */
! 117: #endif
1.2 matt 118:
1.3.18.1! rmind 119: #ifndef IMXUART_FREQDIV
! 120: #define IMXUART_FREQDIV 2 /* XXX */
! 121: #endif
1.2 matt 122:
1.3.18.1! rmind 123: #ifndef IMXUART_FREQ
! 124: #define IMXUART_FREQ (56900000)
! 125: #endif
1.2 matt 126:
1.3.18.1! rmind 127: /*
! 128: * Override cnmagic(9) macro before including <sys/systm.h>.
! 129: * We need to know if cn_check_magic triggered debugger, so set a flag.
! 130: * Callers of cn_check_magic must declare int cn_trapped = 0;
! 131: * XXX: this is *ugly*!
! 132: */
! 133: #define cn_trap() \
! 134: do { \
! 135: console_debugger(); \
! 136: cn_trapped = 1; \
! 137: } while (/* CONSTCOND */ 0)
1.2 matt 138:
1.3.18.1! rmind 139: #include <sys/param.h>
! 140: #include <sys/systm.h>
! 141: #include <sys/ioctl.h>
! 142: #include <sys/select.h>
! 143: #include <sys/poll.h>
! 144: #include <sys/tty.h>
! 145: #include <sys/proc.h>
! 146: #include <sys/conf.h>
! 147: #include <sys/file.h>
! 148: #include <sys/uio.h>
! 149: #include <sys/kernel.h>
! 150: #include <sys/syslog.h>
! 151: #include <sys/device.h>
! 152: #include <sys/malloc.h>
! 153: #include <sys/timepps.h>
! 154: #include <sys/vnode.h>
! 155: #include <sys/kauth.h>
! 156: #include <sys/intr.h>
1.2 matt 157:
1.3.18.1! rmind 158: #include <sys/bus.h>
1.2 matt 159:
1.3.18.1! rmind 160: #include <arm/imx/imxuartreg.h>
! 161: #include <arm/imx/imxuartvar.h>
! 162: #include <dev/cons.h>
1.2 matt 163:
1.3.18.1! rmind 164: #ifndef IMXUART_RING_SIZE
! 165: #define IMXUART_RING_SIZE 2048
1.2 matt 166: #endif
167:
1.3.18.1! rmind 168: typedef struct imxuart_softc {
! 169: device_t sc_dev;
1.2 matt 170:
1.3.18.1! rmind 171: struct imxuart_regs {
! 172: bus_space_tag_t ur_iot;
! 173: bus_space_handle_t ur_ioh;
! 174: bus_addr_t ur_iobase;
! 175: #if 0
! 176: bus_size_t ur_nports;
! 177: bus_size_t ur_map[16];
! 178: #endif
! 179: } sc_regs;
1.2 matt 180:
1.3.18.1! rmind 181: #define sc_bt sc_regs.ur_iot
! 182: #define sc_bh sc_regs.ur_ioh
1.2 matt 183:
1.3.18.1! rmind 184: uint32_t sc_intrspec_enb;
! 185: uint32_t sc_ucr2_d; /* target value for UCR2 */
! 186: uint32_t sc_ucr[4]; /* cached value of UCRn */
! 187: #define sc_ucr1 sc_ucr[0]
! 188: #define sc_ucr2 sc_ucr[1]
! 189: #define sc_ucr3 sc_ucr[2]
! 190: #define sc_ucr4 sc_ucr[3]
! 191:
! 192: uint sc_init_cnt;
! 193:
! 194: bus_addr_t sc_addr;
! 195: bus_size_t sc_size;
! 196: int sc_intr;
! 197:
! 198: u_char sc_hwflags;
! 199: /* Hardware flag masks */
! 200: #define IMXUART_HW_FLOW __BIT(0)
! 201: #define IMXUART_HW_DEV_OK __BIT(1)
! 202: #define IMXUART_HW_CONSOLE __BIT(2)
! 203: #define IMXUART_HW_KGDB __BIT(3)
! 204:
! 205:
! 206: bool enabled;
! 207:
! 208: u_char sc_swflags;
! 209:
! 210: u_char sc_rx_flags;
! 211: #define IMXUART_RX_TTY_BLOCKED __BIT(0)
! 212: #define IMXUART_RX_TTY_OVERFLOWED __BIT(1)
! 213: #define IMXUART_RX_IBUF_BLOCKED __BIT(2)
! 214: #define IMXUART_RX_IBUF_OVERFLOWED __BIT(3)
! 215: #define IMXUART_RX_ANY_BLOCK \
! 216: (IMXUART_RX_TTY_BLOCKED|IMXUART_RX_TTY_OVERFLOWED| \
! 217: IMXUART_RX_IBUF_BLOCKED|IMXUART_RX_IBUF_OVERFLOWED)
! 218:
! 219: bool sc_tx_busy, sc_tx_done, sc_tx_stopped;
! 220: bool sc_rx_ready,sc_st_check;
! 221: u_short sc_txfifo_len, sc_txfifo_thresh;
! 222:
! 223: uint16_t *sc_rbuf;
! 224: u_int sc_rbuf_size;
! 225: u_int sc_rbuf_in;
! 226: u_int sc_rbuf_out;
! 227: #define IMXUART_RBUF_AVAIL(sc) \
! 228: ((sc->sc_rbuf_out <= sc->sc_rbuf_in) ? \
! 229: (sc->sc_rbuf_in - sc->sc_rbuf_out) : \
! 230: (sc->sc_rbuf_size - (sc->sc_rbuf_out - sc->sc_rbuf_in)))
! 231:
! 232: #define IMXUART_RBUF_SPACE(sc) \
! 233: ((sc->sc_rbuf_in <= sc->sc_rbuf_out ? \
! 234: sc->sc_rbuf_size - (sc->sc_rbuf_out - sc->sc_rbuf_in) : \
! 235: sc->sc_rbuf_in - sc->sc_rbuf_out) - 1)
! 236: /* increment ringbuffer pointer */
! 237: #define IMXUART_RBUF_INC(sc,v,i) (((v) + (i))&((sc->sc_rbuf_size)-1))
! 238: u_int sc_r_lowat;
! 239: u_int sc_r_hiwat;
! 240:
! 241: /* output chunk */
! 242: u_char *sc_tba;
! 243: u_int sc_tbc;
! 244: u_int sc_heldtbc;
! 245: /* pending parameter changes */
! 246: u_char sc_pending;
! 247: #define IMXUART_PEND_PARAM __BIT(0)
! 248: #define IMXUART_PEND_SPEED __BIT(1)
! 249:
! 250:
! 251: struct callout sc_diag_callout;
! 252: kmutex_t sc_lock;
! 253: void *sc_ih; /* interrupt handler */
! 254: void *sc_si; /* soft interrupt */
! 255: struct tty *sc_tty;
! 256:
! 257: /* power management hooks */
! 258: int (*enable)(struct imxuart_softc *);
! 259: void (*disable)(struct imxuart_softc *);
! 260:
! 261: struct {
! 262: ulong err;
! 263: ulong brk;
! 264: ulong prerr;
! 265: ulong frmerr;
! 266: ulong ovrrun;
! 267: } sc_errors;
! 268:
! 269: struct imxuart_baudrate_ratio {
! 270: uint16_t numerator; /* UBIR */
! 271: uint16_t modulator; /* UBMR */
! 272: } sc_ratio;
! 273:
! 274: } imxuart_softc_t;
! 275:
! 276:
! 277: int imxuspeed(long, struct imxuart_baudrate_ratio *);
! 278: int imxuparam(struct tty *, struct termios *);
! 279: void imxustart(struct tty *);
! 280: int imxuhwiflow(struct tty *, int);
! 281:
! 282: void imxuart_shutdown(struct imxuart_softc *);
! 283: void imxuart_loadchannelregs(struct imxuart_softc *);
! 284: void imxuart_hwiflow(struct imxuart_softc *);
! 285: void imxuart_break(struct imxuart_softc *, bool);
! 286: void imxuart_modem(struct imxuart_softc *, int);
! 287: void tiocm_to_imxu(struct imxuart_softc *, u_long, int);
! 288: int imxuart_to_tiocm(struct imxuart_softc *);
! 289: void imxuart_iflush(struct imxuart_softc *);
! 290: int imxuintr(void *);
! 291:
! 292: int imxuart_common_getc(dev_t, struct imxuart_regs *);
! 293: void imxuart_common_putc(dev_t, struct imxuart_regs *, int);
! 294:
! 295:
! 296: int imxuart_init(struct imxuart_regs *, int, tcflag_t);
! 297:
! 298: int imxucngetc(dev_t);
! 299: void imxucnputc(dev_t, int);
! 300: void imxucnpollc(dev_t, int);
! 301:
! 302: static void imxuintr_read(struct imxuart_softc *);
! 303: static void imxuintr_send(struct imxuart_softc *);
! 304:
! 305: static void imxuart_enable_debugport(struct imxuart_softc *);
! 306: static void imxuart_disable_all_interrupts(struct imxuart_softc *);
! 307: static void imxuart_control_rxint(struct imxuart_softc *, bool);
! 308: static void imxuart_control_txint(struct imxuart_softc *, bool);
! 309: static u_int imxuart_txfifo_space(struct imxuart_softc *sc);
1.2 matt 310:
1.3.18.1! rmind 311: static uint32_t cflag_to_ucr2(tcflag_t, uint32_t);
1.2 matt 312:
1.3.18.1! rmind 313: CFATTACH_DECL_NEW(imxuart, sizeof(struct imxuart_softc),
1.2 matt 314: imxuart_match, imxuart_attach, NULL, NULL);
315:
316:
1.3.18.1! rmind 317: #define integrate static inline
! 318: void imxusoft(void *);
! 319: integrate void imxuart_rxsoft(struct imxuart_softc *, struct tty *);
! 320: integrate void imxuart_txsoft(struct imxuart_softc *, struct tty *);
! 321: integrate void imxuart_stsoft(struct imxuart_softc *, struct tty *);
! 322: integrate void imxuart_schedrx(struct imxuart_softc *);
! 323: void imxudiag(void *);
! 324: static void imxuart_load_speed(struct imxuart_softc *);
! 325: static void imxuart_load_params(struct imxuart_softc *);
! 326: integrate void imxuart_load_pendings(struct imxuart_softc *);
! 327:
! 328:
! 329: extern struct cfdriver imxuart_cd;
! 330:
! 331: dev_type_open(imxuopen);
! 332: dev_type_close(imxuclose);
! 333: dev_type_read(imxuread);
! 334: dev_type_write(imxuwrite);
! 335: dev_type_ioctl(imxuioctl);
! 336: dev_type_stop(imxustop);
! 337: dev_type_tty(imxutty);
! 338: dev_type_poll(imxupoll);
! 339:
! 340: const struct cdevsw imxcom_cdevsw = {
! 341: imxuopen, imxuclose, imxuread, imxuwrite, imxuioctl,
! 342: imxustop, imxutty, imxupoll, nommap, ttykqfilter, D_TTY
! 343: };
! 344:
1.2 matt 345: /*
1.3.18.1! rmind 346: * Make this an option variable one can patch.
! 347: * But be warned: this must be a power of 2!
! 348: */
! 349: u_int imxuart_rbuf_size = IMXUART_RING_SIZE;
1.2 matt 350:
1.3.18.1! rmind 351: /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
! 352: u_int imxuart_rbuf_hiwat = (IMXUART_RING_SIZE * 1) / 4;
! 353: u_int imxuart_rbuf_lowat = (IMXUART_RING_SIZE * 3) / 4;
1.2 matt 354:
1.3.18.1! rmind 355: static struct imxuart_regs imxuconsregs;
! 356: static int imxuconsattached;
! 357: static int imxuconsrate;
! 358: static tcflag_t imxuconscflag;
! 359: static struct cnm_state imxuart_cnm_state;
1.2 matt 360:
1.3.18.1! rmind 361: u_int imxuart_freq = IMXUART_FREQ;
! 362: u_int imxuart_freqdiv = IMXUART_FREQDIV;
1.2 matt 363:
1.3.18.1! rmind 364: #ifdef KGDB
! 365: #include <sys/kgdb.h>
1.2 matt 366:
1.3.18.1! rmind 367: static struct imxuart_regs imxu_kgdb_regs;
! 368: static int imxu_kgdb_attached;
1.2 matt 369:
1.3.18.1! rmind 370: int imxuart_kgdb_getc(void *);
! 371: void imxuart_kgdb_putc(void *, int);
! 372: #endif /* KGDB */
! 373:
! 374: #define IMXUART_UNIT_MASK 0x7ffff
! 375: #define IMXUART_DIALOUT_MASK 0x80000
! 376:
! 377: #define IMXUART_UNIT(x) (minor(x) & IMXUART_UNIT_MASK)
! 378: #define IMXUART_DIALOUT(x) (minor(x) & IMXUART_DIALOUT_MASK)
! 379:
! 380: #define IMXUART_ISALIVE(sc) ((sc)->enabled != 0 && \
! 381: device_is_active((sc)->sc_dev))
! 382:
! 383: #define BR BUS_SPACE_BARRIER_READ
! 384: #define BW BUS_SPACE_BARRIER_WRITE
! 385: #define IMXUART_BARRIER(r, f) \
! 386: bus_space_barrier((r)->ur_iot, (r)->ur_ioh, 0, IMX_UART_SIZE, (f))
! 387:
! 388:
! 389: void
! 390: imxuart_attach_common(device_t parent, device_t self,
! 391: bus_space_tag_t iot, paddr_t iobase, size_t size, int intr, int flags)
1.2 matt 392: {
1.3.18.1! rmind 393: imxuart_softc_t *sc = device_private(self);
! 394: struct imxuart_regs *regsp = &sc->sc_regs;
! 395: struct tty *tp;
! 396: bus_space_handle_t ioh;
1.2 matt 397:
1.3.18.1! rmind 398: aprint_naive("\n");
! 399: aprint_normal("\n");
1.2 matt 400:
1.3.18.1! rmind 401: sc->sc_dev = self;
1.2 matt 402:
1.3.18.1! rmind 403: if (size <= 0)
! 404: size = IMX_UART_SIZE;
1.2 matt 405:
1.3.18.1! rmind 406: sc->sc_intr = intr;
! 407: regsp->ur_iot = iot;
! 408: regsp->ur_iobase = iobase;
1.2 matt 409:
1.3.18.1! rmind 410: if (bus_space_map(iot, regsp->ur_iobase, size, 0, &ioh)) {
! 411: return;
! 412: }
! 413: regsp->ur_ioh = ioh;
! 414:
! 415: callout_init(&sc->sc_diag_callout, 0);
! 416: mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
! 417:
! 418: bus_space_read_region_4(iot, ioh, IMX_UCR1, sc->sc_ucr, 4);
! 419: sc->sc_ucr2_d = sc->sc_ucr2;
! 420:
! 421: /* Disable interrupts before configuring the device. */
! 422: imxuart_disable_all_interrupts(sc);
! 423:
! 424: if (regsp->ur_iobase == imxuconsregs.ur_iobase) {
! 425: imxuconsattached = 1;
! 426:
! 427: /* Make sure the console is always "hardwired". */
! 428: #if 0
! 429: delay(10000); /* wait for output to finish */
! 430: #endif
! 431: SET(sc->sc_hwflags, IMXUART_HW_CONSOLE);
! 432: SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
! 433: }
! 434:
! 435:
! 436: tp = ttymalloc();
! 437: tp->t_oproc = imxustart;
! 438: tp->t_param = imxuparam;
! 439: tp->t_hwiflow = imxuhwiflow;
! 440:
! 441: sc->sc_tty = tp;
! 442: sc->sc_rbuf = malloc(sizeof (*sc->sc_rbuf) * imxuart_rbuf_size,
! 443: M_DEVBUF, M_NOWAIT);
! 444: sc->sc_rbuf_size = imxuart_rbuf_size;
! 445: sc->sc_rbuf_in = sc->sc_rbuf_out = 0;
! 446: if (sc->sc_rbuf == NULL) {
! 447: aprint_error_dev(sc->sc_dev,
! 448: "unable to allocate ring buffer\n");
! 449: return;
! 450: }
! 451:
! 452: sc->sc_txfifo_len = 32;
! 453: sc->sc_txfifo_thresh = 16; /* when USR1.TRDY, fifo has space
! 454: * for this many characters */
! 455:
! 456: tty_attach(tp);
! 457:
! 458: if (ISSET(sc->sc_hwflags, IMXUART_HW_CONSOLE)) {
! 459: int maj;
! 460:
! 461: /* locate the major number */
! 462: maj = cdevsw_lookup_major(&imxcom_cdevsw);
! 463:
! 464: if (maj != NODEVMAJOR) {
! 465: tp->t_dev = cn_tab->cn_dev = makedev(maj,
! 466: device_unit(sc->sc_dev));
! 467:
! 468: aprint_normal_dev(sc->sc_dev, "console\n");
! 469: }
! 470: }
! 471:
! 472: sc->sc_ih = intr_establish(sc->sc_intr, IPL_SERIAL, IST_LEVEL,
! 473: imxuintr, sc);
! 474: if (sc->sc_ih == NULL)
! 475: aprint_error_dev(sc->sc_dev, "intr_establish failed\n");
! 476:
! 477: #ifdef KGDB
! 478: /*
! 479: * Allow kgdb to "take over" this port. If this is
! 480: * not the console and is the kgdb device, it has
! 481: * exclusive use. If it's the console _and_ the
! 482: * kgdb device, it doesn't.
! 483: */
! 484: if (regsp->ur_iobase == imxu_kgdb_regs.ur_iobase) {
! 485: if (!ISSET(sc->sc_hwflags, IMXUART_HW_CONSOLE)) {
! 486: imxu_kgdb_attached = 1;
! 487:
! 488: SET(sc->sc_hwflags, IMXUART_HW_KGDB);
! 489: }
! 490: aprint_normal_dev(sc->sc_dev, "kgdb\n");
! 491: }
! 492: #endif
! 493:
! 494: sc->sc_si = softint_establish(SOFTINT_SERIAL, imxusoft, sc);
! 495:
! 496: #if NRND > 0 && defined(RND_IMXUART)
! 497: rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
! 498: RND_TYPE_TTY, 0);
! 499: #endif
! 500:
! 501: /* if there are no enable/disable functions, assume the device
! 502: is always enabled */
! 503: if (!sc->enable)
! 504: sc->enabled = 1;
! 505:
! 506: imxuart_enable_debugport(sc);
! 507:
! 508: SET(sc->sc_hwflags, IMXUART_HW_DEV_OK);
! 509:
! 510: //shutdownhook_establish(imxuart_shutdownhook, sc);
! 511:
! 512:
! 513: #if 0
! 514: {
! 515: uint32_t reg;
! 516: reg = bus_space_read_4(iot, ioh, IMX_UCR1);
! 517: reg |= IMX_UCR1_TXDMAEN | IMX_UCR1_RXDMAEN;
! 518: bus_space_write_4(iot, ioh, IMX_UCR1, reg);
! 519: }
! 520: #endif
1.2 matt 521: }
522:
523: /*
1.3.18.1! rmind 524: * baudrate = RefFreq / (16 * (UMBR + 1)/(UBIR + 1))
! 525: *
! 526: * (UBIR + 1) / (UBMR + 1) = (16 * BaurdRate) / RefFreq
1.2 matt 527: */
1.3.18.1! rmind 528:
! 529: static long
! 530: gcd(long m, long n)
1.2 matt 531: {
532:
1.3.18.1! rmind 533: if (m < n)
! 534: return gcd(n, m);
! 535:
! 536: if (n <= 0)
! 537: return m;
! 538: return gcd(n, m % n);
1.2 matt 539: }
540:
541:
542: int
1.3.18.1! rmind 543: imxuspeed(long speed, struct imxuart_baudrate_ratio *ratio)
1.2 matt 544: {
1.3.18.1! rmind 545: #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
! 546: long b = 16 * speed;
! 547: long f = imxuart_freq / imxuart_freqdiv;
! 548: long d;
! 549: int err = 0;
! 550:
! 551: /* reduce b/f */
! 552: while ((f > (1<<16) || b > (1<<16)) && (d = gcd(f, b)) > 1) {
! 553: f /= d;
! 554: b /= d;
! 555: }
! 556:
! 557:
! 558: while (f > (1<<16) || b > (1<<16)) {
! 559: f /= 2;
! 560: b /= 2;
! 561: }
! 562: if (f <= 0 || b <= 0)
! 563: return -1;
! 564:
! 565: #ifdef DIAGNOSTIC
! 566: err = divrnd(((uint64_t)imxuart_freq) * 1000 / imxuart_freqdiv,
! 567: (uint64_t)speed * 16 * f / b) - 1000;
! 568: if (err < 0)
! 569: err = -err;
! 570: #endif
! 571:
! 572: ratio->numerator = b-1;
! 573: ratio->modulator = f-1;
1.2 matt 574:
1.3.18.1! rmind 575: if (err > IMXUART_TOLERANCE)
! 576: return -1;
1.2 matt 577:
578: return 0;
1.3.18.1! rmind 579: #undef divrnd
1.2 matt 580: }
581:
1.3.18.1! rmind 582: #ifdef IMXUART_DEBUG
! 583: int imxuart_debug = 0;
! 584:
! 585: void imxustatus(struct imxuart_softc *, const char *);
! 586: void
! 587: imxustatus(struct imxuart_softc *sc, const char *str)
1.2 matt 588: {
1.3.18.1! rmind 589: struct tty *tp = sc->sc_tty;
1.2 matt 590:
1.3.18.1! rmind 591: aprint_normal_dev(sc->sc_dev,
! 592: "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n",
! 593: str,
! 594: ISSET(tp->t_cflag, CLOCAL) ? '+' : '-',
! 595: ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-',
! 596: ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-',
! 597: ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-',
! 598: sc->sc_tx_stopped ? '+' : '-');
! 599:
! 600: aprint_normal_dev(sc->sc_dev,
! 601: "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n",
! 602: str,
! 603: ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-',
! 604: ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-',
! 605: ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-',
! 606: ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-',
! 607: sc->sc_rx_flags);
1.2 matt 608: }
1.3.18.1! rmind 609: #endif
1.2 matt 610:
1.3.18.1! rmind 611: #if 0
1.2 matt 612: int
1.3.18.1! rmind 613: imxuart_detach(device_t self, int flags)
1.2 matt 614: {
1.3.18.1! rmind 615: struct imxuart_softc *sc = device_private(self);
! 616: int maj, mn;
1.2 matt 617:
1.3.18.1! rmind 618: if (ISSET(sc->sc_hwflags, IMXUART_HW_CONSOLE))
! 619: return EBUSY;
! 620:
! 621: /* locate the major number */
! 622: maj = cdevsw_lookup_major(&imxcom_cdevsw);
! 623:
! 624: /* Nuke the vnodes for any open instances. */
! 625: mn = device_unit(self);
! 626: vdevgone(maj, mn, mn, VCHR);
! 627:
! 628: mn |= IMXUART_DIALOUT_MASK;
! 629: vdevgone(maj, mn, mn, VCHR);
! 630:
! 631: if (sc->sc_rbuf == NULL) {
! 632: /*
! 633: * Ring buffer allocation failed in the imxuart_attach_subr,
! 634: * only the tty is allocated, and nothing else.
! 635: */
! 636: ttyfree(sc->sc_tty);
! 637: return 0;
1.2 matt 638: }
639:
1.3.18.1! rmind 640: /* Free the receive buffer. */
! 641: free(sc->sc_rbuf, M_DEVBUF);
1.2 matt 642:
1.3.18.1! rmind 643: /* Detach and free the tty. */
! 644: tty_detach(sc->sc_tty);
! 645: ttyfree(sc->sc_tty);
! 646:
! 647: /* Unhook the soft interrupt handler. */
! 648: softint_disestablish(sc->sc_si);
! 649:
! 650: #if NRND > 0 && defined(RND_IMXU)
! 651: /* Unhook the entropy source. */
! 652: rnd_detach_source(&sc->rnd_source);
! 653: #endif
! 654: callout_destroy(&sc->sc_diag_callout);
! 655:
! 656: /* Destroy the lock. */
! 657: mutex_destroy(&sc->sc_lock);
! 658:
! 659: return (0);
1.2 matt 660: }
1.3.18.1! rmind 661: #endif
1.2 matt 662:
1.3.18.1! rmind 663: #ifdef notyet
1.2 matt 664: int
1.3.18.1! rmind 665: imxuart_activate(device_t self, enum devact act)
1.2 matt 666: {
1.3.18.1! rmind 667: struct imxuart_softc *sc = device_private(self);
! 668: int rv = 0;
1.2 matt 669:
1.3.18.1! rmind 670: switch (act) {
! 671: case DVACT_ACTIVATE:
! 672: rv = EOPNOTSUPP;
! 673: break;
! 674:
! 675: case DVACT_DEACTIVATE:
! 676: if (sc->sc_hwflags & (IMXUART_HW_CONSOLE|IMXUART_HW_KGDB)) {
! 677: rv = EBUSY;
1.2 matt 678: break;
679: }
1.3.18.1! rmind 680:
! 681: if (sc->disable != NULL && sc->enabled != 0) {
! 682: (*sc->disable)(sc);
! 683: sc->enabled = 0;
! 684: }
! 685: break;
1.2 matt 686: }
687:
1.3.18.1! rmind 688: return (rv);
1.2 matt 689: }
690: #endif
691:
1.3.18.1! rmind 692: void
! 693: imxuart_shutdown(struct imxuart_softc *sc)
1.2 matt 694: {
1.3.18.1! rmind 695: struct tty *tp = sc->sc_tty;
1.2 matt 696:
1.3.18.1! rmind 697: mutex_spin_enter(&sc->sc_lock);
! 698:
! 699: /* If we were asserting flow control, then deassert it. */
! 700: SET(sc->sc_rx_flags, IMXUART_RX_IBUF_BLOCKED);
! 701: imxuart_hwiflow(sc);
! 702:
! 703: /* Clear any break condition set with TIOCSBRK. */
! 704: imxuart_break(sc, false);
! 705:
! 706: /*
! 707: * Hang up if necessary. Wait a bit, so the other side has time to
! 708: * notice even if we immediately open the port again.
! 709: * Avoid tsleeping above splhigh().
! 710: */
! 711: if (ISSET(tp->t_cflag, HUPCL)) {
! 712: imxuart_modem(sc, 0);
! 713: mutex_spin_exit(&sc->sc_lock);
! 714: /* XXX will only timeout */
! 715: (void) kpause(ttclos, false, hz, NULL);
! 716: mutex_spin_enter(&sc->sc_lock);
1.2 matt 717: }
1.3.18.1! rmind 718:
! 719: /* Turn off interrupts. */
! 720: imxuart_disable_all_interrupts(sc);
! 721: /* re-enable recv interrupt for console or kgdb port */
! 722: imxuart_enable_debugport(sc);
! 723:
! 724: mutex_spin_exit(&sc->sc_lock);
! 725:
! 726: #ifdef notyet
! 727: if (sc->disable) {
! 728: #ifdef DIAGNOSTIC
! 729: if (!sc->enabled)
! 730: panic("imxuart_shutdown: not enabled?");
! 731: #endif
! 732: (*sc->disable)(sc);
! 733: sc->enabled = 0;
! 734: }
! 735: #endif
1.2 matt 736: }
737:
738: int
1.3.18.1! rmind 739: imxuopen(dev_t dev, int flag, int mode, struct lwp *l)
1.2 matt 740: {
1.3.18.1! rmind 741: struct imxuart_softc *sc;
! 742: struct tty *tp;
! 743: int s;
! 744: int error;
1.2 matt 745:
1.3.18.1! rmind 746: sc = device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 747: if (sc == NULL || !ISSET(sc->sc_hwflags, IMXUART_HW_DEV_OK) ||
! 748: sc->sc_rbuf == NULL)
! 749: return (ENXIO);
! 750:
! 751: if (!device_is_active(sc->sc_dev))
! 752: return (ENXIO);
! 753:
! 754: #ifdef KGDB
! 755: /*
! 756: * If this is the kgdb port, no other use is permitted.
! 757: */
! 758: if (ISSET(sc->sc_hwflags, IMXUART_HW_KGDB))
! 759: return (EBUSY);
1.2 matt 760: #endif
761:
1.3.18.1! rmind 762: tp = sc->sc_tty;
1.2 matt 763:
1.3.18.1! rmind 764: if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
! 765: return (EBUSY);
1.2 matt 766:
1.3.18.1! rmind 767: s = spltty();
! 768:
! 769: /*
! 770: * Do the following iff this is a first open.
! 771: */
! 772: if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
! 773: struct termios t;
! 774:
! 775: tp->t_dev = dev;
! 776:
! 777:
! 778: #ifdef notyet
! 779: if (sc->enable) {
! 780: if ((*sc->enable)(sc)) {
! 781: splx(s);
! 782: aprint_error_dev(sc->sc_dev,
! 783: "device enable failed\n");
! 784: return (EIO);
! 785: }
! 786: sc->enabled = 1;
! 787: }
! 788: #endif
! 789:
! 790: mutex_spin_enter(&sc->sc_lock);
! 791:
! 792: imxuart_disable_all_interrupts(sc);
! 793:
! 794: /* Fetch the current modem control status, needed later. */
! 795:
! 796: #ifdef IMXUART_PPS
! 797: /* Clear PPS capture state on first open. */
! 798: mutex_spin_enter(&timecounter_lock);
! 799: memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state));
! 800: sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
! 801: pps_init(&sc->sc_pps_state);
! 802: mutex_spin_exit(&timecounter_lock);
! 803: #endif
! 804:
! 805: mutex_spin_exit(&sc->sc_lock);
! 806:
! 807: /*
! 808: * Initialize the termios status to the defaults. Add in the
! 809: * sticky bits from TIOCSFLAGS.
! 810: */
! 811: if (ISSET(sc->sc_hwflags, IMXUART_HW_CONSOLE)) {
! 812: t.c_ospeed = imxuconsrate;
! 813: t.c_cflag = imxuconscflag;
! 814: } else {
! 815: t.c_ospeed = TTYDEF_SPEED;
! 816: t.c_cflag = TTYDEF_CFLAG;
! 817: }
! 818: t.c_ispeed = t.c_ospeed;
! 819: if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
! 820: SET(t.c_cflag, CLOCAL);
! 821: if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
! 822: SET(t.c_cflag, CRTSCTS);
! 823: if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
! 824: SET(t.c_cflag, MDMBUF);
! 825: /* Make sure imxuparam() will do something. */
! 826: tp->t_ospeed = 0;
! 827: (void) imxuparam(tp, &t);
! 828: tp->t_iflag = TTYDEF_IFLAG;
! 829: tp->t_oflag = TTYDEF_OFLAG;
! 830: tp->t_lflag = TTYDEF_LFLAG;
! 831: ttychars(tp);
! 832: ttsetwater(tp);
! 833:
! 834: mutex_spin_enter(&sc->sc_lock);
! 835:
! 836: /*
! 837: * Turn on DTR. We must always do this, even if carrier is not
! 838: * present, because otherwise we'd have to use TIOCSDTR
! 839: * immediately after setting CLOCAL, which applications do not
! 840: * expect. We always assert DTR while the device is open
! 841: * unless explicitly requested to deassert it.
! 842: */
! 843: imxuart_modem(sc, 1);
! 844:
! 845: /* Clear the input ring, and unblock. */
! 846: sc->sc_rbuf_in = sc->sc_rbuf_out = 0;
! 847: imxuart_iflush(sc);
! 848: CLR(sc->sc_rx_flags, IMXUART_RX_ANY_BLOCK);
! 849: imxuart_hwiflow(sc);
! 850:
! 851: /* Turn on interrupts. */
! 852: imxuart_control_rxint(sc, true);
! 853:
! 854: #ifdef IMXUART_DEBUG
! 855: if (imxuart_debug)
! 856: imxustatus(sc, "imxuopen ");
! 857: #endif
! 858:
! 859: mutex_spin_exit(&sc->sc_lock);
1.2 matt 860: }
861:
1.3.18.1! rmind 862: splx(s);
1.2 matt 863:
1.3.18.1! rmind 864: #if 0
! 865: error = ttyopen(tp, IMXUART_DIALOUT(dev), ISSET(flag, O_NONBLOCK));
! 866: #else
! 867: error = ttyopen(tp, 1, ISSET(flag, O_NONBLOCK));
! 868: #endif
! 869: if (error)
! 870: goto bad;
! 871:
! 872: error = (*tp->t_linesw->l_open)(dev, tp);
! 873: if (error)
! 874: goto bad;
! 875:
! 876: return (0);
! 877:
! 878: bad:
! 879: if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
! 880: /*
! 881: * We failed to open the device, and nobody else had it opened.
! 882: * Clean up the state as appropriate.
! 883: */
! 884: imxuart_shutdown(sc);
! 885: }
! 886:
! 887: return (error);
1.2 matt 888: }
889:
1.3.18.1! rmind 890: int
! 891: imxuclose(dev_t dev, int flag, int mode, struct lwp *l)
1.2 matt 892: {
1.3.18.1! rmind 893: struct imxuart_softc *sc =
! 894: device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 895: struct tty *tp = sc->sc_tty;
! 896:
! 897: /* XXX This is for cons.c. */
! 898: if (!ISSET(tp->t_state, TS_ISOPEN))
! 899: return (0);
! 900:
! 901: (*tp->t_linesw->l_close)(tp, flag);
! 902: ttyclose(tp);
! 903:
! 904: if (IMXUART_ISALIVE(sc) == 0)
! 905: return (0);
! 906:
! 907: if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
! 908: /*
! 909: * Although we got a last close, the device may still be in
! 910: * use; e.g. if this was the dialout node, and there are still
! 911: * processes waiting for carrier on the non-dialout node.
! 912: */
! 913: imxuart_shutdown(sc);
1.2 matt 914: }
1.3.18.1! rmind 915:
! 916: return (0);
1.2 matt 917: }
918:
1.3.18.1! rmind 919: int
! 920: imxuread(dev_t dev, struct uio *uio, int flag)
1.2 matt 921: {
1.3.18.1! rmind 922: struct imxuart_softc *sc =
! 923: device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 924: struct tty *tp = sc->sc_tty;
1.2 matt 925:
1.3.18.1! rmind 926: if (IMXUART_ISALIVE(sc) == 0)
! 927: return (EIO);
1.2 matt 928:
1.3.18.1! rmind 929: return ((*tp->t_linesw->l_read)(tp, uio, flag));
1.2 matt 930: }
931:
1.3.18.1! rmind 932: int
! 933: imxuwrite(dev_t dev, struct uio *uio, int flag)
1.2 matt 934: {
1.3.18.1! rmind 935: struct imxuart_softc *sc =
! 936: device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 937: struct tty *tp = sc->sc_tty;
! 938:
! 939: if (IMXUART_ISALIVE(sc) == 0)
! 940: return (EIO);
1.2 matt 941:
1.3.18.1! rmind 942: return ((*tp->t_linesw->l_write)(tp, uio, flag));
1.2 matt 943: }
944:
1.3.18.1! rmind 945: int
! 946: imxupoll(dev_t dev, int events, struct lwp *l)
1.2 matt 947: {
1.3.18.1! rmind 948: struct imxuart_softc *sc =
! 949: device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 950: struct tty *tp = sc->sc_tty;
! 951:
! 952: if (IMXUART_ISALIVE(sc) == 0)
! 953: return (POLLHUP);
! 954:
! 955: return ((*tp->t_linesw->l_poll)(tp, events, l));
1.2 matt 956: }
957:
1.3.18.1! rmind 958: struct tty *
! 959: imxutty(dev_t dev)
1.2 matt 960: {
1.3.18.1! rmind 961: struct imxuart_softc *sc =
! 962: device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 963: struct tty *tp = sc->sc_tty;
! 964:
! 965: return (tp);
1.2 matt 966: }
967:
1.3.18.1! rmind 968: int
! 969: imxuioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
1.2 matt 970: {
1.3.18.1! rmind 971: struct imxuart_softc *sc;
! 972: struct tty *tp;
! 973: int error;
! 974:
! 975: sc = device_lookup_private(&imxuart_cd, IMXUART_UNIT(dev));
! 976: if (sc == NULL)
! 977: return ENXIO;
! 978: if (IMXUART_ISALIVE(sc) == 0)
! 979: return (EIO);
! 980:
! 981: tp = sc->sc_tty;
! 982:
! 983: error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
! 984: if (error != EPASSTHROUGH)
! 985: return (error);
! 986:
! 987: error = ttioctl(tp, cmd, data, flag, l);
! 988: if (error != EPASSTHROUGH)
! 989: return (error);
! 990:
! 991: error = 0;
! 992: switch (cmd) {
! 993: case TIOCSFLAGS:
! 994: error = kauth_authorize_device_tty(l->l_cred,
! 995: KAUTH_DEVICE_TTY_PRIVSET, tp);
! 996: break;
! 997: default:
! 998: /* nothing */
! 999: break;
! 1000: }
! 1001: if (error) {
! 1002: return error;
! 1003: }
! 1004:
! 1005: mutex_spin_enter(&sc->sc_lock);
! 1006:
! 1007: switch (cmd) {
! 1008: case TIOCSBRK:
! 1009: imxuart_break(sc, true);
! 1010: break;
! 1011:
! 1012: case TIOCCBRK:
! 1013: imxuart_break(sc, false);
! 1014: break;
! 1015:
! 1016: case TIOCSDTR:
! 1017: imxuart_modem(sc, 1);
! 1018: break;
! 1019:
! 1020: case TIOCCDTR:
! 1021: imxuart_modem(sc, 0);
! 1022: break;
! 1023:
! 1024: case TIOCGFLAGS:
! 1025: *(int *)data = sc->sc_swflags;
! 1026: break;
! 1027:
! 1028: case TIOCSFLAGS:
! 1029: sc->sc_swflags = *(int *)data;
! 1030: break;
! 1031:
! 1032: case TIOCMSET:
! 1033: case TIOCMBIS:
! 1034: case TIOCMBIC:
! 1035: tiocm_to_imxu(sc, cmd, *(int *)data);
! 1036: break;
! 1037:
! 1038: case TIOCMGET:
! 1039: *(int *)data = imxuart_to_tiocm(sc);
! 1040: break;
! 1041:
! 1042: #ifdef notyet
! 1043: case PPS_IOC_CREATE:
! 1044: case PPS_IOC_DESTROY:
! 1045: case PPS_IOC_GETPARAMS:
! 1046: case PPS_IOC_SETPARAMS:
! 1047: case PPS_IOC_GETCAP:
! 1048: case PPS_IOC_FETCH:
! 1049: #ifdef PPS_SYNC
! 1050: case PPS_IOC_KCBIND:
! 1051: #endif
! 1052: mutex_spin_enter(&timecounter_lock);
! 1053: error = pps_ioctl(cmd, data, &sc->sc_pps_state);
! 1054: mutex_spin_exit(&timecounter_lock);
! 1055: break;
! 1056:
! 1057: case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */
! 1058: mutex_spin_enter(&timecounter_lock);
! 1059: #ifndef PPS_TRAILING_EDGE
! 1060: TIMESPEC_TO_TIMEVAL((struct timeval *)data,
! 1061: &sc->sc_pps_state.ppsinfo.assert_timestamp);
! 1062: #else
! 1063: TIMESPEC_TO_TIMEVAL((struct timeval *)data,
! 1064: &sc->sc_pps_state.ppsinfo.clear_timestamp);
! 1065: #endif
! 1066: mutex_spin_exit(&timecounter_lock);
! 1067: break;
! 1068: #endif
! 1069:
! 1070: default:
! 1071: error = EPASSTHROUGH;
! 1072: break;
! 1073: }
! 1074:
! 1075: mutex_spin_exit(&sc->sc_lock);
! 1076:
! 1077: #ifdef IMXUART_DEBUG
! 1078: if (imxuart_debug)
! 1079: imxustatus(sc, "imxuioctl ");
! 1080: #endif
! 1081:
! 1082: return (error);
1.2 matt 1083: }
1084:
1.3.18.1! rmind 1085: integrate void
! 1086: imxuart_schedrx(struct imxuart_softc *sc)
1.2 matt 1087: {
1.3.18.1! rmind 1088: sc->sc_rx_ready = 1;
! 1089:
! 1090: /* Wake up the poller. */
! 1091: softint_schedule(sc->sc_si);
1.2 matt 1092: }
1093:
1.3.18.1! rmind 1094: void
! 1095: imxuart_break(struct imxuart_softc *sc, bool onoff)
1.2 matt 1096: {
1.3.18.1! rmind 1097: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1098: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
1.2 matt 1099:
1.3.18.1! rmind 1100: if (onoff)
! 1101: SET(sc->sc_ucr1, IMX_UCR1_SNDBRK);
! 1102: else
! 1103: CLR(sc->sc_ucr1, IMX_UCR1_SNDBRK);
! 1104:
! 1105: bus_space_write_4(iot, ioh, IMX_UCR1, sc->sc_ucr1);
1.2 matt 1106: }
1107:
1108: void
1.3.18.1! rmind 1109: imxuart_modem(struct imxuart_softc *sc, int onoff)
1.2 matt 1110: {
1.3.18.1! rmind 1111: #ifdef notyet
! 1112: if (sc->sc_mcr_dtr == 0)
! 1113: return;
! 1114:
! 1115: if (onoff)
! 1116: SET(sc->sc_mcr, sc->sc_mcr_dtr);
! 1117: else
! 1118: CLR(sc->sc_mcr, sc->sc_mcr_dtr);
! 1119:
! 1120: if (!sc->sc_heldchange) {
! 1121: if (sc->sc_tx_busy) {
! 1122: sc->sc_heldtbc = sc->sc_tbc;
! 1123: sc->sc_tbc = 0;
! 1124: sc->sc_heldchange = 1;
! 1125: } else
! 1126: imxuart_loadchannelregs(sc);
! 1127: }
! 1128: #endif
1.2 matt 1129: }
1130:
1.3.18.1! rmind 1131: /*
! 1132: * RTS output is controlled by UCR2.CTS bit.
! 1133: * DTR output is controlled by UCR3.DSR bit.
! 1134: * (i.MX reference manual uses names in DCE mode)
! 1135: *
! 1136: * note: if UCR2.CTSC == 1 for automatic HW flow control, UCR2.CTS is ignored.
! 1137: */
1.2 matt 1138: void
1.3.18.1! rmind 1139: tiocm_to_imxu(struct imxuart_softc *sc, u_long how, int ttybits)
1.2 matt 1140: {
1.3.18.1! rmind 1141: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1142: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1143:
! 1144: uint32_t ucr2 = sc->sc_ucr2_d;
! 1145: uint32_t ucr3 = sc->sc_ucr3;
! 1146:
! 1147: uint32_t ucr2_mask = 0;
! 1148: uint32_t ucr3_mask = 0;
! 1149:
! 1150:
! 1151: if (ISSET(ttybits, TIOCM_DTR))
! 1152: ucr3_mask = IMX_UCR3_DSR;
! 1153: if (ISSET(ttybits, TIOCM_RTS))
! 1154: ucr2_mask = IMX_UCR2_CTS;
! 1155:
! 1156: switch (how) {
! 1157: case TIOCMBIC:
! 1158: CLR(ucr2, ucr2_mask);
! 1159: CLR(ucr3, ucr3_mask);
! 1160: break;
! 1161:
! 1162: case TIOCMBIS:
! 1163: SET(ucr2, ucr2_mask);
! 1164: SET(ucr3, ucr3_mask);
! 1165: break;
! 1166:
! 1167: case TIOCMSET:
! 1168: CLR(ucr2, ucr2_mask);
! 1169: CLR(ucr3, ucr3_mask);
! 1170: SET(ucr2, ucr2_mask);
! 1171: SET(ucr3, ucr3_mask);
! 1172: break;
! 1173: }
! 1174:
! 1175: if (ucr3 != sc->sc_ucr3) {
! 1176: bus_space_write_4(iot, ioh, IMX_UCR3, ucr3);
! 1177: sc->sc_ucr3 = ucr3;
! 1178: }
! 1179:
! 1180: if (ucr2 == sc->sc_ucr2_d)
! 1181: return;
! 1182:
! 1183: sc->sc_ucr2_d = ucr2;
! 1184: /* update CTS bit only */
! 1185: ucr2 = (sc->sc_ucr2 & ~IMX_UCR2_CTS) |
! 1186: (ucr2 & IMX_UCR2_CTS);
! 1187:
! 1188: bus_space_write_4(iot, ioh, IMX_UCR2, ucr2);
! 1189: sc->sc_ucr2 = ucr2;
1.2 matt 1190: }
1.3.18.1! rmind 1191:
1.2 matt 1192: int
1.3.18.1! rmind 1193: imxuart_to_tiocm(struct imxuart_softc *sc)
1.2 matt 1194: {
1.3.18.1! rmind 1195: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1196: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1197: int ttybits = 0;
! 1198: uint32_t usr[2];
! 1199:
! 1200: if (ISSET(sc->sc_ucr3, IMX_UCR3_DSR))
! 1201: SET(ttybits, TIOCM_DTR);
! 1202: if (ISSET(sc->sc_ucr2, IMX_UCR2_CTS))
! 1203: SET(ttybits, TIOCM_RTS);
! 1204:
! 1205: bus_space_read_region_4(iot, ioh, IMX_USR1, usr, 2);
! 1206:
! 1207: if (ISSET(usr[0], IMX_USR1_RTSS))
! 1208: SET(ttybits, TIOCM_CTS);
! 1209:
! 1210: if (ISSET(usr[1], IMX_USR2_DCDIN))
! 1211: SET(ttybits, TIOCM_CD);
! 1212:
! 1213: #if 0
! 1214: /* XXXbsh: I couldn't find the way to read ipp_uart_dsr_dte_i signal,
! 1215: although there are bits in UART registers to detect delta of DSR.
! 1216: */
! 1217: if (ISSET(imxubits, MSR_DSR))
! 1218: SET(ttybits, TIOCM_DSR);
! 1219: #endif
! 1220:
! 1221: if (ISSET(usr[1], IMX_USR2_RIIN))
! 1222: SET(ttybits, TIOCM_RI);
! 1223:
! 1224:
! 1225: #ifdef notyet
! 1226: if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC))
! 1227: SET(ttybits, TIOCM_LE);
! 1228: #endif
! 1229:
! 1230: return (ttybits);
! 1231: }
! 1232:
! 1233: static uint32_t
! 1234: cflag_to_ucr2(tcflag_t cflag, uint32_t oldval)
! 1235: {
! 1236: uint32_t val = oldval;
! 1237:
! 1238: CLR(val,IMX_UCR2_WS|IMX_UCR2_PREN|IMX_UCR2_PROE|IMX_UCR2_STPB);
! 1239:
! 1240: switch (cflag & CSIZE) {
! 1241: case CS5:
! 1242: case CS6:
! 1243: /* not suppreted. use 7-bits */
! 1244: case CS7:
! 1245: break;
! 1246: case CS8:
! 1247: SET(val, IMX_UCR2_WS);
! 1248: break;
! 1249: }
! 1250:
! 1251:
! 1252: if (ISSET(cflag, PARENB)) {
! 1253: SET(val, IMX_UCR2_PREN);
! 1254:
! 1255: /* odd parity */
! 1256: if (!ISSET(cflag, PARODD))
! 1257: SET(val, IMX_UCR2_PROE);
! 1258: }
! 1259:
! 1260: if (ISSET(cflag, CSTOPB))
! 1261: SET(val, IMX_UCR2_STPB);
! 1262:
! 1263: val |= IMX_UCR2_TXEN| IMX_UCR2_RXEN|IMX_UCR2_SRST;
! 1264:
! 1265: return val;
1.2 matt 1266: }
1267:
1.3.18.1! rmind 1268: int
! 1269: imxuparam(struct tty *tp, struct termios *t)
! 1270: {
! 1271: struct imxuart_softc *sc =
! 1272: device_lookup_private(&imxuart_cd, IMXUART_UNIT(tp->t_dev));
! 1273: struct imxuart_baudrate_ratio ratio;
! 1274: uint32_t ucr2;
! 1275: bool change_speed = tp->t_ospeed != t->c_ospeed;
! 1276:
! 1277: if (IMXUART_ISALIVE(sc) == 0)
! 1278: return (EIO);
! 1279:
! 1280: /* Check requested parameters. */
! 1281: if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
! 1282: return (EINVAL);
! 1283:
! 1284: /*
! 1285: * For the console, always force CLOCAL and !HUPCL, so that the port
! 1286: * is always active.
! 1287: */
! 1288: if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
! 1289: ISSET(sc->sc_hwflags, IMXUART_HW_CONSOLE)) {
! 1290: SET(t->c_cflag, CLOCAL);
! 1291: CLR(t->c_cflag, HUPCL);
! 1292: }
! 1293:
! 1294: /*
! 1295: * If there were no changes, don't do anything. This avoids dropping
! 1296: * input and improves performance when all we did was frob things like
! 1297: * VMIN and VTIME.
! 1298: */
! 1299: if ( !change_speed && tp->t_cflag == t->c_cflag)
! 1300: return (0);
! 1301:
! 1302: if (change_speed) {
! 1303: /* calculate baudrate modulator value */
! 1304: if (imxuspeed(t->c_ospeed, &ratio) < 0)
! 1305: return (EINVAL);
! 1306: sc->sc_ratio = ratio;
! 1307: }
! 1308:
! 1309: ucr2 = cflag_to_ucr2(t->c_cflag, sc->sc_ucr2_d);
! 1310:
! 1311: mutex_spin_enter(&sc->sc_lock);
! 1312:
! 1313: #if 0 /* flow control stuff. not yet */
! 1314: /*
! 1315: * If we're not in a mode that assumes a connection is present, then
! 1316: * ignore carrier changes.
! 1317: */
! 1318: if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
! 1319: sc->sc_msr_dcd = 0;
! 1320: else
! 1321: sc->sc_msr_dcd = MSR_DCD;
! 1322: /*
! 1323: * Set the flow control pins depending on the current flow control
! 1324: * mode.
! 1325: */
! 1326: if (ISSET(t->c_cflag, CRTSCTS)) {
! 1327: sc->sc_mcr_dtr = MCR_DTR;
! 1328: sc->sc_mcr_rts = MCR_RTS;
! 1329: sc->sc_msr_cts = MSR_CTS;
! 1330: sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS;
! 1331: } else if (ISSET(t->c_cflag, MDMBUF)) {
! 1332: /*
! 1333: * For DTR/DCD flow control, make sure we don't toggle DTR for
! 1334: * carrier detection.
! 1335: */
! 1336: sc->sc_mcr_dtr = 0;
! 1337: sc->sc_mcr_rts = MCR_DTR;
! 1338: sc->sc_msr_cts = MSR_DCD;
! 1339: sc->sc_efr = 0;
! 1340: } else {
! 1341: /*
! 1342: * If no flow control, then always set RTS. This will make
! 1343: * the other side happy if it mistakenly thinks we're doing
! 1344: * RTS/CTS flow control.
! 1345: */
! 1346: sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
! 1347: sc->sc_mcr_rts = 0;
! 1348: sc->sc_msr_cts = 0;
! 1349: sc->sc_efr = 0;
! 1350: if (ISSET(sc->sc_mcr, MCR_DTR))
! 1351: SET(sc->sc_mcr, MCR_RTS);
! 1352: else
! 1353: CLR(sc->sc_mcr, MCR_RTS);
! 1354: }
! 1355: sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
! 1356: #endif
! 1357:
! 1358: /* And copy to tty. */
! 1359: tp->t_ispeed = t->c_ospeed;
! 1360: tp->t_ospeed = t->c_ospeed;
! 1361: tp->t_cflag = t->c_cflag;
! 1362:
! 1363: if (!change_speed && ucr2 == sc->sc_ucr2_d) {
! 1364: /* noop */
! 1365: }
! 1366: else if (!sc->sc_pending && !sc->sc_tx_busy) {
! 1367: if (ucr2 != sc->sc_ucr2_d) {
! 1368: sc->sc_ucr2_d = ucr2;
! 1369: imxuart_load_params(sc);
! 1370: }
! 1371: if (change_speed)
! 1372: imxuart_load_speed(sc);
! 1373: }
! 1374: else {
! 1375: if (!sc->sc_pending) {
! 1376: sc->sc_heldtbc = sc->sc_tbc;
! 1377: sc->sc_tbc = 0;
! 1378: }
! 1379: sc->sc_pending |=
! 1380: (ucr2 == sc->sc_ucr2_d ? 0 : IMXUART_PEND_PARAM) |
! 1381: (change_speed ? 0 : IMXUART_PEND_SPEED);
! 1382: sc->sc_ucr2_d = ucr2;
! 1383: }
! 1384:
! 1385: if (!ISSET(t->c_cflag, CHWFLOW)) {
! 1386: /* Disable the high water mark. */
! 1387: sc->sc_r_hiwat = 0;
! 1388: sc->sc_r_lowat = 0;
! 1389: if (ISSET(sc->sc_rx_flags, IMXUART_RX_TTY_OVERFLOWED)) {
! 1390: CLR(sc->sc_rx_flags, IMXUART_RX_TTY_OVERFLOWED);
! 1391: imxuart_schedrx(sc);
! 1392: }
! 1393: if (ISSET(sc->sc_rx_flags,
! 1394: IMXUART_RX_TTY_BLOCKED|IMXUART_RX_IBUF_BLOCKED)) {
! 1395: CLR(sc->sc_rx_flags,
! 1396: IMXUART_RX_TTY_BLOCKED|IMXUART_RX_IBUF_BLOCKED);
! 1397: imxuart_hwiflow(sc);
! 1398: }
! 1399: } else {
! 1400: sc->sc_r_hiwat = imxuart_rbuf_hiwat;
! 1401: sc->sc_r_lowat = imxuart_rbuf_lowat;
! 1402: }
! 1403:
! 1404: mutex_spin_exit(&sc->sc_lock);
! 1405:
! 1406: #if 0
! 1407: /*
! 1408: * Update the tty layer's idea of the carrier bit, in case we changed
! 1409: * CLOCAL or MDMBUF. We don't hang up here; we only do that by
! 1410: * explicit request.
! 1411: */
! 1412: (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
! 1413: #else
! 1414: /* XXX: always report that we have DCD */
! 1415: (void) (*tp->t_linesw->l_modem)(tp, 1);
! 1416: #endif
! 1417:
! 1418: #ifdef IMXUART_DEBUG
! 1419: if (imxuart_debug)
! 1420: imxustatus(sc, "imxuparam ");
! 1421: #endif
! 1422:
! 1423: if (!ISSET(t->c_cflag, CHWFLOW)) {
! 1424: if (sc->sc_tx_stopped) {
! 1425: sc->sc_tx_stopped = 0;
! 1426: imxustart(tp);
! 1427: }
! 1428: }
! 1429:
! 1430: return (0);
! 1431: }
! 1432:
! 1433: void
! 1434: imxuart_iflush(struct imxuart_softc *sc)
! 1435: {
! 1436: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1437: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1438: #ifdef DIAGNOSTIC
! 1439: uint32_t reg = 0xffff;
! 1440: #endif
! 1441: int timo;
! 1442:
! 1443: timo = 50000;
! 1444: /* flush any pending I/O */
! 1445: while (ISSET(bus_space_read_4(iot, ioh, IMX_USR2), IMX_USR2_RDR)
! 1446: && --timo)
! 1447: #ifdef DIAGNOSTIC
! 1448: reg =
! 1449: #else
! 1450: (void)
! 1451: #endif
! 1452: bus_space_read_4(iot, ioh, IMX_URXD);
! 1453: #ifdef DIAGNOSTIC
! 1454: if (!timo)
! 1455: aprint_error_dev(sc->sc_dev, "imxuart_iflush timeout %02x\n", reg);
! 1456: #endif
! 1457: }
! 1458:
! 1459: int
! 1460: imxuhwiflow(struct tty *tp, int block)
! 1461: {
! 1462: struct imxuart_softc *sc =
! 1463: device_lookup_private(&imxuart_cd, IMXUART_UNIT(tp->t_dev));
! 1464:
! 1465: if (IMXUART_ISALIVE(sc) == 0)
! 1466: return (0);
! 1467:
! 1468: #ifdef notyet
! 1469: if (sc->sc_mcr_rts == 0)
! 1470: return (0);
! 1471: #endif
! 1472:
! 1473: mutex_spin_enter(&sc->sc_lock);
! 1474:
! 1475: if (block) {
! 1476: if (!ISSET(sc->sc_rx_flags, IMXUART_RX_TTY_BLOCKED)) {
! 1477: SET(sc->sc_rx_flags, IMXUART_RX_TTY_BLOCKED);
! 1478: imxuart_hwiflow(sc);
! 1479: }
! 1480: } else {
! 1481: if (ISSET(sc->sc_rx_flags, IMXUART_RX_TTY_OVERFLOWED)) {
! 1482: CLR(sc->sc_rx_flags, IMXUART_RX_TTY_OVERFLOWED);
! 1483: imxuart_schedrx(sc);
! 1484: }
! 1485: if (ISSET(sc->sc_rx_flags, IMXUART_RX_TTY_BLOCKED)) {
! 1486: CLR(sc->sc_rx_flags, IMXUART_RX_TTY_BLOCKED);
! 1487: imxuart_hwiflow(sc);
! 1488: }
! 1489: }
! 1490:
! 1491: mutex_spin_exit(&sc->sc_lock);
! 1492: return (1);
! 1493: }
! 1494:
! 1495: /*
! 1496: * (un)block input via hw flowcontrol
! 1497: */
! 1498: void
! 1499: imxuart_hwiflow(struct imxuart_softc *sc)
! 1500: {
! 1501: #ifdef notyet
! 1502: struct imxuart_regs *regsp= &sc->sc_regs;
! 1503:
! 1504: if (sc->sc_mcr_rts == 0)
! 1505: return;
! 1506:
! 1507: if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
! 1508: CLR(sc->sc_mcr, sc->sc_mcr_rts);
! 1509: CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
! 1510: } else {
! 1511: SET(sc->sc_mcr, sc->sc_mcr_rts);
! 1512: SET(sc->sc_mcr_active, sc->sc_mcr_rts);
! 1513: }
! 1514: UR_WRITE_1(regsp, IMXUART_REG_MCR, sc->sc_mcr_active);
! 1515: #endif
! 1516: }
! 1517:
! 1518:
! 1519: void
! 1520: imxustart(struct tty *tp)
! 1521: {
! 1522: struct imxuart_softc *sc =
! 1523: device_lookup_private(&imxuart_cd, IMXUART_UNIT(tp->t_dev));
! 1524: int s;
! 1525: u_char *tba;
! 1526: int tbc;
! 1527: u_int n;
! 1528: u_int space;
! 1529: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1530: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1531:
! 1532: if (IMXUART_ISALIVE(sc) == 0)
! 1533: return;
! 1534:
! 1535: s = spltty();
! 1536: if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
! 1537: goto out;
! 1538: if (sc->sc_tx_stopped)
! 1539: goto out;
! 1540: if (!ttypull(tp))
! 1541: goto out;
! 1542:
! 1543: /* Grab the first contiguous region of buffer space. */
! 1544: tba = tp->t_outq.c_cf;
! 1545: tbc = ndqb(&tp->t_outq, 0);
! 1546:
! 1547: mutex_spin_enter(&sc->sc_lock);
! 1548:
! 1549: sc->sc_tba = tba;
! 1550: sc->sc_tbc = tbc;
! 1551:
! 1552: SET(tp->t_state, TS_BUSY);
! 1553: sc->sc_tx_busy = 1;
! 1554:
! 1555: space = imxuart_txfifo_space(sc);
! 1556: n = MIN(sc->sc_tbc, space);
! 1557:
! 1558: bus_space_write_multi_1(iot, ioh, IMX_UTXD, sc->sc_tba, n);
! 1559: sc->sc_tbc -= n;
! 1560: sc->sc_tba += n;
! 1561:
! 1562: /* Enable transmit completion interrupts */
! 1563: imxuart_control_txint(sc, true);
! 1564:
! 1565: mutex_spin_exit(&sc->sc_lock);
! 1566: out:
! 1567: splx(s);
! 1568: return;
! 1569: }
! 1570:
! 1571: /*
! 1572: * Stop output on a line.
! 1573: */
! 1574: void
! 1575: imxustop(struct tty *tp, int flag)
! 1576: {
! 1577: struct imxuart_softc *sc =
! 1578: device_lookup_private(&imxuart_cd, IMXUART_UNIT(tp->t_dev));
! 1579:
! 1580: mutex_spin_enter(&sc->sc_lock);
! 1581: if (ISSET(tp->t_state, TS_BUSY)) {
! 1582: /* Stop transmitting at the next chunk. */
! 1583: sc->sc_tbc = 0;
! 1584: sc->sc_heldtbc = 0;
! 1585: if (!ISSET(tp->t_state, TS_TTSTOP))
! 1586: SET(tp->t_state, TS_FLUSH);
! 1587: }
! 1588: mutex_spin_exit(&sc->sc_lock);
! 1589: }
! 1590:
! 1591: void
! 1592: imxudiag(void *arg)
! 1593: {
! 1594: #ifdef notyet
! 1595: struct imxuart_softc *sc = arg;
! 1596: int overflows, floods;
! 1597:
! 1598: mutex_spin_enter(&sc->sc_lock);
! 1599: overflows = sc->sc_overflows;
! 1600: sc->sc_overflows = 0;
! 1601: floods = sc->sc_floods;
! 1602: sc->sc_floods = 0;
! 1603: sc->sc_errors = 0;
! 1604: mutex_spin_exit(&sc->sc_lock);
! 1605:
! 1606: log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
! 1607: device_xname(sc->sc_dev),
! 1608: overflows, overflows == 1 ? "" : "s",
! 1609: floods, floods == 1 ? "" : "s");
! 1610: #endif
! 1611: }
! 1612:
! 1613: integrate void
! 1614: imxuart_rxsoft(struct imxuart_softc *sc, struct tty *tp)
! 1615: {
! 1616: int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
! 1617: u_int cc, scc, outp;
! 1618: uint16_t data;
! 1619: u_int code;
! 1620:
! 1621: scc = cc = IMXUART_RBUF_AVAIL(sc);
! 1622:
! 1623: #if 0
! 1624: if (cc == imxuart_rbuf_size-1) {
! 1625: sc->sc_floods++;
! 1626: if (sc->sc_errors++ == 0)
! 1627: callout_reset(&sc->sc_diag_callout, 60 * hz,
! 1628: imxudiag, sc);
! 1629: }
! 1630: #endif
! 1631:
! 1632: /* If not yet open, drop the entire buffer content here */
! 1633: if (!ISSET(tp->t_state, TS_ISOPEN)) {
! 1634: sc->sc_rbuf_out = sc->sc_rbuf_in;
! 1635: cc = 0;
! 1636: }
! 1637:
! 1638: outp = sc->sc_rbuf_out;
! 1639:
! 1640: #define ERRBITS (IMX_URXD_PRERR|IMX_URXD_BRK|IMX_URXD_FRMERR|IMX_URXD_OVRRUN)
! 1641:
! 1642: while (cc) {
! 1643: data = sc->sc_rbuf[outp];
! 1644: code = data & IMX_URXD_RX_DATA;
! 1645: if (ISSET(data, ERRBITS)) {
! 1646: if (sc->sc_errors.err == 0)
! 1647: callout_reset(&sc->sc_diag_callout,
! 1648: 60 * hz, imxudiag, sc);
! 1649: if (ISSET(data, IMX_URXD_OVRRUN))
! 1650: sc->sc_errors.ovrrun++;
! 1651: if (ISSET(data, IMX_URXD_BRK)) {
! 1652: sc->sc_errors.brk++;
! 1653: SET(code, TTY_FE);
! 1654: }
! 1655: if (ISSET(data, IMX_URXD_FRMERR)) {
! 1656: sc->sc_errors.frmerr++;
! 1657: SET(code, TTY_FE);
! 1658: }
! 1659: if (ISSET(data, IMX_URXD_PRERR)) {
! 1660: sc->sc_errors.prerr++;
! 1661: SET(code, TTY_PE);
! 1662: }
! 1663: }
! 1664: if ((*rint)(code, tp) == -1) {
! 1665: /*
! 1666: * The line discipline's buffer is out of space.
! 1667: */
! 1668: if (!ISSET(sc->sc_rx_flags, IMXUART_RX_TTY_BLOCKED)) {
! 1669: /*
! 1670: * We're either not using flow control, or the
! 1671: * line discipline didn't tell us to block for
! 1672: * some reason. Either way, we have no way to
! 1673: * know when there's more space available, so
! 1674: * just drop the rest of the data.
! 1675: */
! 1676: sc->sc_rbuf_out = sc->sc_rbuf_in;
! 1677: cc = 0;
! 1678: } else {
! 1679: /*
! 1680: * Don't schedule any more receive processing
! 1681: * until the line discipline tells us there's
! 1682: * space available (through imxuhwiflow()).
! 1683: * Leave the rest of the data in the input
! 1684: * buffer.
! 1685: */
! 1686: SET(sc->sc_rx_flags, IMXUART_RX_TTY_OVERFLOWED);
! 1687: }
! 1688: break;
! 1689: }
! 1690: outp = IMXUART_RBUF_INC(sc, outp, 1);
! 1691: cc--;
! 1692: }
! 1693:
! 1694: if (cc != scc) {
! 1695: sc->sc_rbuf_out = outp;
! 1696: mutex_spin_enter(&sc->sc_lock);
! 1697:
! 1698: cc = IMXUART_RBUF_SPACE(sc);
! 1699:
! 1700: /* Buffers should be ok again, release possible block. */
! 1701: if (cc >= sc->sc_r_lowat) {
! 1702: if (ISSET(sc->sc_rx_flags, IMXUART_RX_IBUF_OVERFLOWED)) {
! 1703: CLR(sc->sc_rx_flags, IMXUART_RX_IBUF_OVERFLOWED);
! 1704: imxuart_control_rxint(sc, true);
! 1705: }
! 1706: if (ISSET(sc->sc_rx_flags, IMXUART_RX_IBUF_BLOCKED)) {
! 1707: CLR(sc->sc_rx_flags, IMXUART_RX_IBUF_BLOCKED);
! 1708: imxuart_hwiflow(sc);
! 1709: }
! 1710: }
! 1711: mutex_spin_exit(&sc->sc_lock);
! 1712: }
! 1713: }
! 1714:
! 1715: integrate void
! 1716: imxuart_txsoft(struct imxuart_softc *sc, struct tty *tp)
! 1717: {
! 1718:
! 1719: CLR(tp->t_state, TS_BUSY);
! 1720: if (ISSET(tp->t_state, TS_FLUSH))
! 1721: CLR(tp->t_state, TS_FLUSH);
! 1722: else
! 1723: ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
! 1724: (*tp->t_linesw->l_start)(tp);
! 1725: }
! 1726:
! 1727: integrate void
! 1728: imxuart_stsoft(struct imxuart_softc *sc, struct tty *tp)
! 1729: {
! 1730: #ifdef notyet
! 1731: u_char msr, delta;
! 1732:
! 1733: mutex_spin_enter(&sc->sc_lock);
! 1734: msr = sc->sc_msr;
! 1735: delta = sc->sc_msr_delta;
! 1736: sc->sc_msr_delta = 0;
! 1737: mutex_spin_exit(&sc->sc_lock);
! 1738:
! 1739: if (ISSET(delta, sc->sc_msr_dcd)) {
! 1740: /*
! 1741: * Inform the tty layer that carrier detect changed.
! 1742: */
! 1743: (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
! 1744: }
! 1745:
! 1746: if (ISSET(delta, sc->sc_msr_cts)) {
! 1747: /* Block or unblock output according to flow control. */
! 1748: if (ISSET(msr, sc->sc_msr_cts)) {
! 1749: sc->sc_tx_stopped = 0;
! 1750: (*tp->t_linesw->l_start)(tp);
! 1751: } else {
! 1752: sc->sc_tx_stopped = 1;
! 1753: }
! 1754: }
! 1755:
! 1756: #endif
! 1757: #ifdef IMXUART_DEBUG
! 1758: if (imxuart_debug)
! 1759: imxustatus(sc, "imxuart_stsoft");
! 1760: #endif
! 1761: }
! 1762:
! 1763: void
! 1764: imxusoft(void *arg)
! 1765: {
! 1766: struct imxuart_softc *sc = arg;
! 1767: struct tty *tp;
! 1768:
! 1769: if (IMXUART_ISALIVE(sc) == 0)
! 1770: return;
! 1771:
! 1772: tp = sc->sc_tty;
! 1773:
! 1774: if (sc->sc_rx_ready) {
! 1775: sc->sc_rx_ready = 0;
! 1776: imxuart_rxsoft(sc, tp);
! 1777: }
! 1778:
! 1779: if (sc->sc_st_check) {
! 1780: sc->sc_st_check = 0;
! 1781: imxuart_stsoft(sc, tp);
! 1782: }
! 1783:
! 1784: if (sc->sc_tx_done) {
! 1785: sc->sc_tx_done = 0;
! 1786: imxuart_txsoft(sc, tp);
! 1787: }
! 1788: }
! 1789:
! 1790: int
! 1791: imxuintr(void *arg)
! 1792: {
! 1793: struct imxuart_softc *sc = arg;
! 1794: uint32_t usr1, usr2;
! 1795: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1796: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1797:
! 1798:
! 1799: if (IMXUART_ISALIVE(sc) == 0)
! 1800: return (0);
! 1801:
! 1802: mutex_spin_enter(&sc->sc_lock);
! 1803:
! 1804: usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
! 1805:
! 1806:
! 1807: do {
! 1808: bus_space_write_4(iot, ioh, IMX_USR2,
! 1809: usr2 & (IMX_USR2_BRCD|IMX_USR2_ORE));
! 1810: if (usr2 & IMX_USR2_BRCD) {
! 1811: /* Break signal detected */
! 1812: int cn_trapped = 0;
! 1813:
! 1814: cn_check_magic(sc->sc_tty->t_dev,
! 1815: CNC_BREAK, imxuart_cnm_state);
! 1816: if (cn_trapped)
! 1817: continue;
! 1818: #if defined(KGDB) && !defined(DDB)
! 1819: if (ISSET(sc->sc_hwflags, IMXUART_HW_KGDB)) {
! 1820: kgdb_connect(1);
! 1821: continue;
! 1822: }
! 1823: #endif
! 1824: }
! 1825:
! 1826: if (usr2 & IMX_USR2_RDR)
! 1827: imxuintr_read(sc);
! 1828:
! 1829: #ifdef IMXUART_PPS
! 1830: {
! 1831: u_char msr, delta;
! 1832:
! 1833: msr = CSR_READ_1(regsp, IMXUART_REG_MSR);
! 1834: delta = msr ^ sc->sc_msr;
! 1835: sc->sc_msr = msr;
! 1836: if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) &&
! 1837: (delta & MSR_DCD)) {
! 1838: mutex_spin_enter(&timecounter_lock);
! 1839: pps_capture(&sc->sc_pps_state);
! 1840: pps_event(&sc->sc_pps_state,
! 1841: (msr & MSR_DCD) ?
! 1842: PPS_CAPTUREASSERT :
! 1843: PPS_CAPTURECLEAR);
! 1844: mutex_spin_exit(&timecounter_lock);
! 1845: }
! 1846: }
! 1847: #endif
! 1848:
! 1849: #ifdef notyet
! 1850: /*
! 1851: * Process normal status changes
! 1852: */
! 1853: if (ISSET(delta, sc->sc_msr_mask)) {
! 1854: SET(sc->sc_msr_delta, delta);
! 1855:
! 1856: /*
! 1857: * Stop output immediately if we lose the output
! 1858: * flow control signal or carrier detect.
! 1859: */
! 1860: if (ISSET(~msr, sc->sc_msr_mask)) {
! 1861: sc->sc_tbc = 0;
! 1862: sc->sc_heldtbc = 0;
! 1863: #ifdef IMXUART_DEBUG
! 1864: if (imxuart_debug)
! 1865: imxustatus(sc, "imxuintr ");
! 1866: #endif
! 1867: }
! 1868:
! 1869: sc->sc_st_check = 1;
! 1870: }
! 1871: #endif
! 1872:
! 1873: usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
! 1874: } while (usr2 & (IMX_USR2_RDR|IMX_USR2_BRCD));
! 1875:
! 1876: usr1 = bus_space_read_4(iot, ioh, IMX_USR1);
! 1877: if (usr1 & IMX_USR1_TRDY)
! 1878: imxuintr_send(sc);
! 1879:
! 1880: mutex_spin_exit(&sc->sc_lock);
! 1881:
! 1882: /* Wake up the poller. */
! 1883: softint_schedule(sc->sc_si);
! 1884:
! 1885: #if NRND > 0 && defined(RND_COM)
! 1886: rnd_add_uint32(&sc->rnd_source, iir | lsr);
! 1887: #endif
! 1888:
! 1889: return (1);
! 1890: }
! 1891:
! 1892:
! 1893: /*
! 1894: * called when there is least one character in rxfifo
! 1895: *
! 1896: */
! 1897:
! 1898: static void
! 1899: imxuintr_read(struct imxuart_softc *sc)
! 1900: {
! 1901: int cc;
! 1902: uint16_t rd;
! 1903: uint32_t usr2;
! 1904: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1905: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1906:
! 1907: cc = IMXUART_RBUF_SPACE(sc);
! 1908:
! 1909: /* clear aging timer interrupt */
! 1910: bus_space_write_4(iot, ioh, IMX_USR1, IMX_USR1_AGTIM);
! 1911:
! 1912: while (cc > 0) {
! 1913: int cn_trapped = 0;
! 1914:
! 1915:
! 1916: sc->sc_rbuf[sc->sc_rbuf_in] = rd =
! 1917: bus_space_read_4(iot, ioh, IMX_URXD);
! 1918:
! 1919: cn_check_magic(sc->sc_tty->t_dev,
! 1920: rd & 0xff, imxuart_cnm_state);
! 1921:
! 1922: if (!cn_trapped) {
! 1923: sc->sc_rbuf_in = IMXUART_RBUF_INC(sc, sc->sc_rbuf_in, 1);
! 1924: cc--;
! 1925: }
! 1926:
! 1927: usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
! 1928: if (!(usr2 & IMX_USR2_RDR))
! 1929: break;
! 1930: }
! 1931:
! 1932: /*
! 1933: * Current string of incoming characters ended because
! 1934: * no more data was available or we ran out of space.
! 1935: * Schedule a receive event if any data was received.
! 1936: * If we're out of space, turn off receive interrupts.
! 1937: */
! 1938: if (!ISSET(sc->sc_rx_flags, IMXUART_RX_TTY_OVERFLOWED))
! 1939: sc->sc_rx_ready = 1;
! 1940: /*
! 1941: * See if we are in danger of overflowing a buffer. If
! 1942: * so, use hardware flow control to ease the pressure.
! 1943: */
! 1944: if (!ISSET(sc->sc_rx_flags, IMXUART_RX_IBUF_BLOCKED) &&
! 1945: cc < sc->sc_r_hiwat) {
! 1946: sc->sc_rx_flags |= IMXUART_RX_IBUF_BLOCKED;
! 1947: imxuart_hwiflow(sc);
! 1948: }
! 1949:
! 1950: /*
! 1951: * If we're out of space, disable receive interrupts
! 1952: * until the queue has drained a bit.
! 1953: */
! 1954: if (!cc) {
! 1955: sc->sc_rx_flags |= IMXUART_RX_IBUF_OVERFLOWED;
! 1956: imxuart_control_rxint(sc, false);
! 1957: }
! 1958: }
! 1959:
! 1960:
! 1961:
! 1962: /*
! 1963: * find how many chars we can put into tx-fifo
! 1964: */
! 1965: static u_int
! 1966: imxuart_txfifo_space(struct imxuart_softc *sc)
! 1967: {
! 1968: uint32_t usr1, usr2;
! 1969: u_int cc;
! 1970: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1971: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1972:
! 1973: usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
! 1974: if (usr2 & IMX_USR2_TXFE)
! 1975: cc = sc->sc_txfifo_len;
! 1976: else {
! 1977: usr1 = bus_space_read_4(iot, ioh, IMX_USR1);
! 1978: if (usr1 & IMX_USR1_TRDY)
! 1979: cc = sc->sc_txfifo_thresh;
! 1980: else
! 1981: cc = 0;
! 1982: }
! 1983:
! 1984: return cc;
! 1985: }
! 1986:
! 1987: void
! 1988: imxuintr_send(struct imxuart_softc *sc)
! 1989: {
! 1990: uint32_t usr2;
! 1991: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 1992: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 1993: int cc = 0;
! 1994:
! 1995: usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
! 1996:
! 1997: if (sc->sc_pending) {
! 1998: if (usr2 & IMX_USR2_TXFE) {
! 1999: imxuart_load_pendings(sc);
! 2000: sc->sc_tbc = sc->sc_heldtbc;
! 2001: sc->sc_heldtbc = 0;
! 2002: }
! 2003: else {
! 2004: /* wait for TX fifo empty */
! 2005: imxuart_control_txint(sc, true);
! 2006: return;
! 2007: }
! 2008: }
! 2009:
! 2010: cc = imxuart_txfifo_space(sc);
! 2011: cc = MIN(cc, sc->sc_tbc);
! 2012:
! 2013: if (cc > 0) {
! 2014: bus_space_write_multi_1(iot, ioh, IMX_UTXD, sc->sc_tba, cc);
! 2015: sc->sc_tbc -= cc;
! 2016: sc->sc_tba += cc;
! 2017: }
! 2018:
! 2019: if (sc->sc_tbc > 0)
! 2020: imxuart_control_txint(sc, true);
! 2021: else {
! 2022: /* no more chars to send.
! 2023: we don't need tx interrupt any more. */
! 2024: imxuart_control_txint(sc, false);
! 2025: if (sc->sc_tx_busy) {
! 2026: sc->sc_tx_busy = 0;
! 2027: sc->sc_tx_done = 1;
! 2028: }
! 2029: }
! 2030: }
! 2031:
! 2032: static void
! 2033: imxuart_disable_all_interrupts(struct imxuart_softc *sc)
! 2034: {
! 2035: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 2036: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 2037:
! 2038: sc->sc_ucr1 &= ~IMXUART_INTRS_UCR1;
! 2039: sc->sc_ucr2 &= ~IMXUART_INTRS_UCR2;
! 2040: sc->sc_ucr3 &= ~IMXUART_INTRS_UCR3;
! 2041: sc->sc_ucr4 &= ~IMXUART_INTRS_UCR4;
! 2042:
! 2043:
! 2044: bus_space_write_region_4(iot, ioh, IMX_UCR1, sc->sc_ucr, 4);
! 2045: }
! 2046:
! 2047: static void
! 2048: imxuart_control_rxint(struct imxuart_softc *sc, bool enable)
! 2049: {
! 2050: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 2051: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 2052: uint32_t ucr1, ucr2;
! 2053:
! 2054: ucr1 = sc->sc_ucr1;
! 2055: ucr2 = sc->sc_ucr2;
! 2056:
! 2057: if (enable) {
! 2058: ucr1 |= IMX_UCR1_RRDYEN;
! 2059: ucr2 |= IMX_UCR2_ATEN;
! 2060: }
! 2061: else {
! 2062: ucr1 &= ~IMX_UCR1_RRDYEN;
! 2063: ucr2 &= ~IMX_UCR2_ATEN;
! 2064: }
! 2065:
! 2066: if (ucr1 != sc->sc_ucr1 || ucr2 != sc->sc_ucr2) {
! 2067: sc->sc_ucr1 = ucr1;
! 2068: sc->sc_ucr2 = ucr2;
! 2069: bus_space_write_region_4(iot, ioh, IMX_UCR1, sc->sc_ucr, 2);
! 2070: }
! 2071: }
! 2072:
! 2073: static void
! 2074: imxuart_control_txint(struct imxuart_softc *sc, bool enable)
! 2075: {
! 2076: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 2077: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 2078: uint32_t ucr1;
! 2079: uint32_t mask;
! 2080:
! 2081: /* if parameter change is pending, get interrupt when Tx fifo
! 2082: is completely empty. otherwise, get interrupt when txfifo
! 2083: has less characters than threshold */
! 2084: mask = sc->sc_pending ? IMX_UCR1_TXMPTYEN : IMX_UCR1_TRDYEN;
! 2085:
! 2086: ucr1 = sc->sc_ucr1;
! 2087:
! 2088: CLR(ucr1, IMX_UCR1_TXMPTYEN|IMX_UCR1_TRDYEN);
! 2089: if (enable)
! 2090: SET(ucr1, mask);
! 2091:
! 2092: if (ucr1 != sc->sc_ucr1) {
! 2093: bus_space_write_4(iot, ioh, IMX_UCR1, ucr1);
! 2094: sc->sc_ucr1 = ucr1;
! 2095: }
! 2096: }
! 2097:
! 2098:
! 2099: static void
! 2100: imxuart_load_params(struct imxuart_softc *sc)
! 2101: {
! 2102: uint32_t ucr2;
! 2103: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 2104: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 2105:
! 2106: ucr2 = (sc->sc_ucr2_d & ~IMX_UCR2_ATEN) |
! 2107: (sc->sc_ucr2 & IMX_UCR2_ATEN);
! 2108:
! 2109: bus_space_write_4(iot, ioh, IMX_UCR2, ucr2);
! 2110: sc->sc_ucr2 = ucr2;
! 2111: }
! 2112:
! 2113: static void
! 2114: imxuart_load_speed(struct imxuart_softc *sc)
! 2115: {
! 2116: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 2117: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 2118: int n, rfdiv, ufcr;
! 2119:
! 2120: #ifdef notyet
! 2121: /*
! 2122: * Set the FIFO threshold based on the receive speed.
! 2123: *
! 2124: * * If it's a low speed, it's probably a mouse or some other
! 2125: * interactive device, so set the threshold low.
! 2126: * * If it's a high speed, trim the trigger level down to prevent
! 2127: * overflows.
! 2128: * * Otherwise set it a bit higher.
! 2129: */
! 2130: if (t->c_ospeed <= 1200)
! 2131: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1;
! 2132: else if (t->c_ospeed <= 38400)
! 2133: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_8;
! 2134: else
! 2135: sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_4;
! 2136: #endif
! 2137:
! 2138: n = 32 - sc->sc_txfifo_thresh;
! 2139: n = MAX(2, n);
! 2140:
! 2141: rfdiv = IMX_UFCR_DIVIDER_TO_RFDIV(imxuart_freqdiv);
! 2142:
! 2143: ufcr = (n << IMX_UFCR_TXTL_SHIFT) |
! 2144: (rfdiv << IMX_UFCR_RFDIV_SHIFT) |
! 2145: (16 << IMX_UFCR_RXTL_SHIFT);
! 2146:
! 2147: /* keep DCE/DTE bit */
! 2148: ufcr |= bus_space_read_4(iot, ioh, IMX_UFCR) & IMX_UFCR_DCEDTE;
! 2149:
! 2150: bus_space_write_4(iot, ioh, IMX_UFCR, ufcr);
! 2151:
! 2152: /* UBIR must updated before UBMR */
! 2153: bus_space_write_4(iot, ioh,
! 2154: IMX_UBIR, sc->sc_ratio.numerator);
! 2155: bus_space_write_4(iot, ioh,
! 2156: IMX_UBMR, sc->sc_ratio.modulator);
! 2157:
! 2158:
! 2159: }
! 2160:
! 2161:
! 2162: static void
! 2163: imxuart_load_pendings(struct imxuart_softc *sc)
! 2164: {
! 2165: if (sc->sc_pending & IMXUART_PEND_PARAM)
! 2166: imxuart_load_params(sc);
! 2167: if (sc->sc_pending & IMXUART_PEND_SPEED)
! 2168: imxuart_load_speed(sc);
! 2169: sc->sc_pending = 0;
! 2170: }
! 2171:
! 2172: #if defined(IMXUARTCONSOLE) || defined(KGDB)
! 2173:
! 2174: /*
! 2175: * The following functions are polled getc and putc routines, shared
! 2176: * by the console and kgdb glue.
! 2177: *
! 2178: * The read-ahead code is so that you can detect pending in-band
! 2179: * cn_magic in polled mode while doing output rather than having to
! 2180: * wait until the kernel decides it needs input.
! 2181: */
! 2182:
! 2183: #define READAHEAD_RING_LEN 16
! 2184: static int imxuart_readahead[READAHEAD_RING_LEN];
! 2185: static int imxuart_readahead_in = 0;
! 2186: static int imxuart_readahead_out = 0;
! 2187: #define READAHEAD_IS_EMPTY() (imxuart_readahead_in==imxuart_readahead_out)
! 2188: #define READAHEAD_IS_FULL() \
! 2189: (((imxuart_readahead_in+1) & (READAHEAD_RING_LEN-1)) ==imxuart_readahead_out)
! 2190:
! 2191: int
! 2192: imxuart_common_getc(dev_t dev, struct imxuart_regs *regsp)
! 2193: {
! 2194: int s = splserial();
! 2195: u_char c;
! 2196: bus_space_tag_t iot = regsp->ur_iot;
! 2197: bus_space_handle_t ioh = regsp->ur_ioh;
! 2198: uint32_t usr2;
! 2199:
! 2200: /* got a character from reading things earlier */
! 2201: if (imxuart_readahead_in != imxuart_readahead_out) {
! 2202:
! 2203: c = imxuart_readahead[imxuart_readahead_out];
! 2204: imxuart_readahead_out = (imxuart_readahead_out + 1) &
! 2205: (READAHEAD_RING_LEN-1);
! 2206: splx(s);
! 2207: return (c);
! 2208: }
! 2209:
! 2210: /* block until a character becomes available */
! 2211: while (!((usr2 = bus_space_read_4(iot, ioh, IMX_USR2)) & IMX_USR2_RDR))
! 2212: ;
! 2213:
! 2214: c = 0xff & bus_space_read_4(iot, ioh, IMX_URXD);
! 2215:
! 2216: {
! 2217: int cn_trapped = 0; /* unused */
! 2218: #ifdef DDB
! 2219: extern int db_active;
! 2220: if (!db_active)
! 2221: #endif
! 2222: cn_check_magic(dev, c, imxuart_cnm_state);
! 2223: }
! 2224: splx(s);
! 2225: return (c);
! 2226: }
! 2227:
! 2228: void
! 2229: imxuart_common_putc(dev_t dev, struct imxuart_regs *regsp, int c)
! 2230: {
! 2231: int s = splserial();
! 2232: int cin, timo;
! 2233: bus_space_tag_t iot = regsp->ur_iot;
! 2234: bus_space_handle_t ioh = regsp->ur_ioh;
! 2235: uint32_t usr2;
! 2236:
! 2237: if (!READAHEAD_IS_FULL() &&
! 2238: ((usr2 = bus_space_read_4(iot, ioh, IMX_USR2)) & IMX_USR2_RDR)) {
! 2239:
! 2240: int cn_trapped = 0;
! 2241: cin = bus_space_read_4(iot, ioh, IMX_URXD);
! 2242: cn_check_magic(dev, cin & 0xff, imxuart_cnm_state);
! 2243: imxuart_readahead_in = (imxuart_readahead_in + 1) &
! 2244: (READAHEAD_RING_LEN-1);
! 2245: }
! 2246:
! 2247: /* wait for any pending transmission to finish */
! 2248: timo = 150000;
! 2249: do {
! 2250: if (bus_space_read_4(iot, ioh, IMX_USR1) & IMX_USR1_TRDY) {
! 2251: bus_space_write_4(iot, ioh, IMX_UTXD, c);
! 2252: break;
! 2253: }
! 2254: } while(--timo > 0);
! 2255:
! 2256: IMXUART_BARRIER(regsp, BR | BW);
! 2257:
! 2258: splx(s);
! 2259: }
! 2260:
! 2261: /*
! 2262: * Initialize UART for use as console or KGDB line.
! 2263: */
! 2264: int
! 2265: imxuart_init(struct imxuart_regs *regsp, int rate, tcflag_t cflag)
! 2266: {
! 2267: struct imxuart_baudrate_ratio ratio;
! 2268: int rfdiv = IMX_UFCR_DIVIDER_TO_RFDIV(imxuart_freqdiv);
! 2269: uint32_t ufcr;
! 2270:
! 2271: if (bus_space_map(regsp->ur_iot, regsp->ur_iobase, IMX_UART_SIZE, 0,
! 2272: ®sp->ur_ioh))
! 2273: return ENOMEM; /* ??? */
! 2274:
! 2275: if (imxuspeed(rate, &ratio) < 0)
! 2276: return EINVAL;
! 2277:
! 2278: /* UBIR must updated before UBMR */
! 2279: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh,
! 2280: IMX_UBIR, ratio.numerator);
! 2281: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh,
! 2282: IMX_UBMR, ratio.modulator);
! 2283:
! 2284:
! 2285: /* XXX: DTREN, DPEC */
! 2286: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UCR3,
! 2287: IMX_UCR3_DSR|IMX_UCR3_RXDMUXSEL);
! 2288:
! 2289: ufcr = (8 << IMX_UFCR_TXTL_SHIFT) | (rfdiv << IMX_UFCR_RFDIV_SHIFT) |
! 2290: (1 << IMX_UFCR_RXTL_SHIFT);
! 2291: /* XXX: keep DCE/DTE bit */
! 2292: ufcr |= bus_space_read_4(regsp->ur_iot, regsp->ur_ioh, IMX_UFCR) &
! 2293: IMX_UFCR_DCEDTE;
! 2294:
! 2295: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UFCR, ufcr);
! 2296:
! 2297: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_ONEMS,
! 2298: imxuart_freq / imxuart_freqdiv / 1000);
! 2299:
! 2300: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UCR2,
! 2301: IMX_UCR2_IRTS|
! 2302: IMX_UCR2_CTSC|
! 2303: IMX_UCR2_WS|IMX_UCR2_TXEN|
! 2304: IMX_UCR2_RXEN|IMX_UCR2_SRST);
! 2305: /* clear status registers */
! 2306: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_USR1, 0xffff);
! 2307: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_USR2, 0xffff);
! 2308:
! 2309:
! 2310: bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UCR1,
! 2311: IMX_UCR1_UARTEN);
! 2312:
! 2313: return (0);
! 2314: }
! 2315:
! 2316:
! 2317: #endif
! 2318:
! 2319:
! 2320: #ifdef IMXUARTCONSOLE
! 2321: /*
! 2322: * Following are all routines needed for UART to act as console
! 2323: */
! 2324: struct consdev imxucons = {
! 2325: NULL, NULL, imxucngetc, imxucnputc, imxucnpollc, NULL, NULL, NULL,
! 2326: NODEV, CN_NORMAL
! 2327: };
! 2328:
! 2329:
! 2330: int
! 2331: imxuart_cons_attach(bus_space_tag_t iot, paddr_t iobase, u_int rate,
! 2332: tcflag_t cflag)
! 2333: {
! 2334: struct imxuart_regs regs;
! 2335: int res;
! 2336:
! 2337: regs.ur_iot = iot;
! 2338: regs.ur_iobase = iobase;
! 2339:
! 2340: res = imxuart_init(®s, rate, cflag);
! 2341: if (res)
! 2342: return (res);
! 2343:
! 2344: cn_tab = &imxucons;
! 2345: cn_init_magic(&imxuart_cnm_state);
! 2346: cn_set_magic("\047\001"); /* default magic is BREAK */
! 2347:
! 2348: imxuconsrate = rate;
! 2349: imxuconscflag = cflag;
! 2350:
! 2351: imxuconsregs = regs;
! 2352:
! 2353: return 0;
! 2354: }
! 2355:
! 2356: int
! 2357: imxucngetc(dev_t dev)
! 2358: {
! 2359: return (imxuart_common_getc(dev, &imxuconsregs));
! 2360: }
! 2361:
! 2362: /*
! 2363: * Console kernel output character routine.
! 2364: */
! 2365: void
! 2366: imxucnputc(dev_t dev, int c)
! 2367: {
! 2368: imxuart_common_putc(dev, &imxuconsregs, c);
! 2369: }
! 2370:
! 2371: void
! 2372: imxucnpollc(dev_t dev, int on)
! 2373: {
! 2374:
! 2375: }
! 2376:
! 2377: #endif /* IMXUARTCONSOLE */
! 2378:
! 2379: #ifdef KGDB
! 2380: int
! 2381: imxuart_kgdb_attach(bus_space_tag_t iot, paddr_t iobase, u_int rate,
! 2382: tcflag_t cflag)
! 2383: {
! 2384: int res;
! 2385:
! 2386: if (iot == imxuconsregs.ur_iot &&
! 2387: iobase == imxuconsregs.ur_iobase) {
! 2388: #if !defined(DDB)
! 2389: return (EBUSY); /* cannot share with console */
! 2390: #else
! 2391: imxu_kgdb_regs.ur_iot = iot;
! 2392: imxu_kgdb_regs.ur_ioh = imxuconsregs.ur_ioh;
! 2393: imxu_kgdb_regs.ur_iobase = iobase;
! 2394: #endif
! 2395: } else {
! 2396: imxu_kgdb_regs.ur_iot = iot;
! 2397: imxu_kgdb_regs.ur_iobase = iobase;
! 2398:
! 2399: res = imxuart_init(&imxu_kgdb_regs, rate, cflag);
! 2400: if (res)
! 2401: return (res);
! 2402:
! 2403: /*
! 2404: * XXXfvdl this shouldn't be needed, but the cn_magic goo
! 2405: * expects this to be initialized
! 2406: */
! 2407: cn_init_magic(&imxuart_cnm_state);
! 2408: cn_set_magic("\047\001");
! 2409: }
! 2410:
! 2411: kgdb_attach(imxuart_kgdb_getc, imxuart_kgdb_putc, &imxu_kgdb_regs);
! 2412: kgdb_dev = 123; /* unneeded, only to satisfy some tests */
! 2413:
! 2414: return (0);
! 2415: }
! 2416:
! 2417: /* ARGSUSED */
! 2418: int
! 2419: imxuart_kgdb_getc(void *arg)
! 2420: {
! 2421: struct imxuart_regs *regs = arg;
! 2422:
! 2423: return (imxuart_common_getc(NODEV, regs));
! 2424: }
! 2425:
! 2426: /* ARGSUSED */
! 2427: void
! 2428: imxuart_kgdb_putc(void *arg, int c)
! 2429: {
! 2430: struct imxuart_regs *regs = arg;
! 2431:
! 2432: imxuart_common_putc(NODEV, regs, c);
! 2433: }
! 2434: #endif /* KGDB */
! 2435:
! 2436: /* helper function to identify the imxu ports used by
! 2437: console or KGDB (and not yet autoconf attached) */
! 2438: int
! 2439: imxuart_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh)
! 2440: {
! 2441: bus_space_handle_t help;
! 2442:
! 2443: if (!imxuconsattached &&
! 2444: iot == imxuconsregs.ur_iot && iobase == imxuconsregs.ur_iobase)
! 2445: help = imxuconsregs.ur_ioh;
! 2446: #ifdef KGDB
! 2447: else if (!imxu_kgdb_attached &&
! 2448: iot == imxu_kgdb_regs.ur_iot && iobase == imxu_kgdb_regs.ur_iobase)
! 2449: help = imxu_kgdb_regs.ur_ioh;
! 2450: #endif
! 2451: else
! 2452: return (0);
! 2453:
! 2454: if (ioh)
! 2455: *ioh = help;
! 2456: return (1);
! 2457: }
! 2458:
! 2459: #ifdef notyet
! 2460:
! 2461: bool
! 2462: imxuart_cleanup(device_t self, int how)
! 2463: {
! 2464: /*
! 2465: * this routine exists to serve as a shutdown hook for systems that
! 2466: * have firmware which doesn't interact properly with a imxuart device in
! 2467: * FIFO mode.
! 2468: */
! 2469: struct imxuart_softc *sc = device_private(self);
! 2470:
! 2471: if (ISSET(sc->sc_hwflags, IMXUART_HW_FIFO))
! 2472: UR_WRITE_1(&sc->sc_regs, IMXUART_REG_FIFO, 0);
! 2473:
! 2474: return true;
! 2475: }
! 2476: #endif
! 2477:
! 2478: #ifdef notyet
! 2479: bool
! 2480: imxuart_suspend(device_t self PMF_FN_ARGS)
! 2481: {
! 2482: struct imxuart_softc *sc = device_private(self);
! 2483:
! 2484: UR_WRITE_1(&sc->sc_regs, IMXUART_REG_IER, 0);
! 2485: (void)CSR_READ_1(&sc->sc_regs, IMXUART_REG_IIR);
! 2486:
! 2487: return true;
! 2488: }
! 2489: #endif
! 2490:
! 2491: #ifdef notyet
! 2492: bool
! 2493: imxuart_resume(device_t self PMF_FN_ARGS)
! 2494: {
! 2495: struct imxuart_softc *sc = device_private(self);
! 2496:
! 2497: mutex_spin_enter(&sc->sc_lock);
! 2498: imxuart_loadchannelregs(sc);
! 2499: mutex_spin_exit(&sc->sc_lock);
! 2500:
! 2501: return true;
! 2502: }
! 2503: #endif
! 2504:
! 2505: static void
! 2506: imxuart_enable_debugport(struct imxuart_softc *sc)
! 2507: {
! 2508: bus_space_tag_t iot = sc->sc_regs.ur_iot;
! 2509: bus_space_handle_t ioh = sc->sc_regs.ur_ioh;
! 2510:
! 2511: if (sc->sc_hwflags & (IMXUART_HW_CONSOLE|IMXUART_HW_KGDB)) {
! 2512:
! 2513: /* Turn on line break interrupt, set carrier. */
! 2514:
! 2515: sc->sc_ucr3 |= IMX_UCR3_DSR;
! 2516: bus_space_write_4(iot, ioh, IMX_UCR3, sc->sc_ucr3);
! 2517:
! 2518: sc->sc_ucr4 |= IMX_UCR4_BKEN;
! 2519: bus_space_write_4(iot, ioh, IMX_UCR4, sc->sc_ucr4);
! 2520:
! 2521: sc->sc_ucr2 |= IMX_UCR2_TXEN|IMX_UCR2_RXEN|
! 2522: IMX_UCR2_CTS;
! 2523: bus_space_write_4(iot, ioh, IMX_UCR2, sc->sc_ucr2);
! 2524:
! 2525: sc->sc_ucr1 |= IMX_UCR1_UARTEN;
! 2526: bus_space_write_4(iot, ioh, IMX_UCR1, sc->sc_ucr1);
! 2527: }
! 2528: }
! 2529:
! 2530:
! 2531: void
! 2532: imxuart_set_frequency(u_int freq, u_int div)
! 2533: {
! 2534: imxuart_freq = freq;
! 2535: imxuart_freqdiv = div;
! 2536: }
CVSweb <webmaster@jp.NetBSD.org>
![[BACK]](/icons/back.gif){kind=icon}
Return to imxuart.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [cvs.NetBSD.org] / src / sys / arch / arm / imx