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Revision 1.47.8.3 / (download) - annotate - [select for diffs], Mon Jul 31 14:26:25 2023 UTC (8 months, 2 weeks ago) by martin
Branch: netbsd-8
Changes since 1.47.8.2: +6 -1
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Diff to previous 1.47.8.2 (colored) to branchpoint 1.47 (colored) next main 1.48 (colored)
Pull up following revision(s) (requested by riastradh in ticket #1859): sys/arch/ia64/ia64/vm_machdep.c: revision 1.18 sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67 sys/arch/aarch64/aarch64/locore.S: revision 1.91 sys/arch/mips/include/asm.h: revision 1.74 sys/arch/hppa/include/cpu.h: revision 1.13 sys/arch/arm/arm/armv6_start.S: revision 1.38 (applied also to sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/a9_mpsubr.S, sys/arch/arm/cortex/cortex_init.S) sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2 sys/arch/mips/mips/locore.S: revision 1.229 sys/arch/alpha/include/asm.h: revision 1.45 (applied to sys/arch/alpha/alpha/multiproc.s) sys/arch/sparc64/sparc64/locore.s: revision 1.432 sys/arch/vax/vax/subr.S: revision 1.42 sys/arch/mips/mips/locore_mips3.S: revision 1.116 sys/arch/ia64/ia64/machdep.c: revision 1.44 sys/arch/arm/arm32/cpuswitch.S: revision 1.106 sys/arch/sparc/sparc/locore.s: revision 1.284 (all via patch) aarch64: Add missing barriers in cpu_switchto. Details in comments. Note: This is a conservative change that inserts a barrier where there was a comment saying none is needed, which is probably correct. The goal of this change is to systematically add barriers to be confident in correctness; subsequent changes may remove some bariers, as an optimization, with an explanation of why each barrier is not needed. PR kern/57240 alpha: Add missing barriers in cpu_switchto. Details in comments. arm32: Add missing barriers in cpu_switchto. Details in comments. hppa: Add missing barriers in cpu_switchto. Not sure hppa has ever had working MULTIPROCESSOR, so maybe no pullups needed? ia64: Add missing barriers in cpu_switchto. (ia64 has never really worked, so no pullups needed, right?) mips: Add missing barriers in cpu_switchto. Details in comments. powerpc: Add missing barriers in cpu_switchto. Details in comments. sparc: Add missing barriers in cpu_switchto. sparc64: Add missing barriers in cpu_switchto. Details in comments. vax: Note where cpu_switchto needs barriers. Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not even sure how to spell store-before-load barriers on VAX, so no functional change for now.
Revision 1.57.2.1, Mon Jun 10 22:05:52 2019 UTC (4 years, 10 months ago) by christos
Branch: phil-wifi
Changes since 1.57: +1 -1
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FILE REMOVED
Sync with HEAD
Revision 1.59, Sat May 18 08:49:23 2019 UTC (4 years, 11 months ago) by skrll
Branch: MAIN
CVS Tags: thorpej-futex-base,
phil-wifi-20200421,
phil-wifi-20200411,
phil-wifi-20200406,
cjep_sun2x-base,
cjep_sun2x,
cjep_staticlib_x-base1,
cjep_staticlib_x-base,
cjep_staticlib_x,
bouyer-xenpvh-base2,
bouyer-xenpvh-base1,
bouyer-xenpvh-base,
bouyer-xenpvh,
bouyer-sunxi-drm-base,
bouyer-sunxi-drm,
ad-namecache-base3,
ad-namecache-base2,
ad-namecache-base1,
ad-namecache-base,
ad-namecache,
HEAD
Changes since 1.58: +1 -1
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FILE REMOVED
Convert remaining armv7 kernels to generic start and remove a bunch of code including a9_mpsubr.S. Thanks to Lwazi Dube for testing PANDABOARD and BEAGLEBONE.
Revision 1.55.2.2 / (download) - annotate - [select for diffs], Sun Sep 30 01:45:37 2018 UTC (5 years, 6 months ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.55.2.1: +2 -1
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Diff to previous 1.55.2.1 (colored) to branchpoint 1.55 (colored) next main 1.56 (colored)
Ssync with HEAD
Revision 1.58 / (download) - annotate - [select for diffs], Fri Sep 21 12:04:06 2018 UTC (5 years, 6 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-compat-20190127,
pgoyette-compat-20190118,
pgoyette-compat-1226,
pgoyette-compat-1126,
pgoyette-compat-1020,
pgoyette-compat-0930,
isaki-audio2-base,
isaki-audio2
Changes since 1.57: +2 -1
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Diff to previous 1.57 (colored)
Centralise defparam CONSADDR, CONSPEED, CONMODE and CONADDR into opt_console.h and adjust.
Revision 1.55.2.1 / (download) - annotate - [select for diffs], Sat Jul 28 04:37:27 2018 UTC (5 years, 8 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.55: +29 -1
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Diff to previous 1.55 (colored)
Sync with HEAD
Revision 1.57 / (download) - annotate - [select for diffs], Wed Jun 27 11:12:14 2018 UTC (5 years, 9 months ago) by ryo
Branch: MAIN
CVS Tags: phil-wifi-base,
pgoyette-compat-0906,
pgoyette-compat-0728
Branch point for: phil-wifi
Changes since 1.56: +26 -1
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Diff to previous 1.56 (colored)
on evbarm/RPI,RPI2, VERBOSE_INIT_ARM had broken. XPUTC() of evbarm/rpi/rpi*_start.S uses bcm283[567]_platform_early_putchar() and it requires stack. fixed to allocate stack when starting from rpi*_start.S and a9_mpsubr.S if needed. to work XPUTC(), need to define VERBOSE_INIT_ARM and EARLYCONS option.
Revision 1.56 / (download) - annotate - [select for diffs], Wed Jun 27 11:05:50 2018 UTC (5 years, 9 months ago) by ryo
Branch: MAIN
Changes since 1.55: +4 -1
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Diff to previous 1.55 (colored)
keep stack pointer even if chainging CPU mode.
Revision 1.55 / (download) - annotate - [select for diffs], Thu Jan 18 12:49:09 2018 UTC (6 years, 2 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-compat-base,
pgoyette-compat-0625,
pgoyette-compat-0521,
pgoyette-compat-0502,
pgoyette-compat-0422,
pgoyette-compat-0415,
pgoyette-compat-0407,
pgoyette-compat-0330,
pgoyette-compat-0322,
pgoyette-compat-0315
Branch point for: pgoyette-compat
Changes since 1.54: +2 -2
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Diff to previous 1.54 (colored)
Use r0 in the tlbiall instruction to avoid confusion. From Ramakrishna Rao Desetti
Revision 1.47.8.1.2.1 / (download) - annotate - [select for diffs], Wed Dec 13 01:04:52 2017 UTC (6 years, 4 months ago) by matt
Branch: matt-nb8-mediatek
Changes since 1.47.8.1: +18 -11
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Diff to previous 1.47.8.1 (colored) next main 1.47.8.2 (colored)
Add Cortex-A35 and make VIRT support simplier
Revision 1.54 / (download) - annotate - [select for diffs], Sun Dec 10 21:38:26 2017 UTC (6 years, 4 months ago) by skrll
Branch: MAIN
Changes since 1.53: +5 -5
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Diff to previous 1.53 (colored)
FDTise RapberryPI support. Thanks for jmcneill for a lot of help with this. The kernel image that the RPI firmware boots is now netbsd.img in the kernel build directory. XXX fdtbus_get_reg needs reworking
Revision 1.3.2.4 / (download) - annotate - [select for diffs], Sun Dec 3 11:35:52 2017 UTC (6 years, 4 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.3.2.3: +164 -65
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Diff to previous 1.3.2.3 (colored) to branchpoint 1.3 (colored) next main 1.4 (colored)
update from HEAD
Revision 1.18.2.6 / (download) - annotate - [select for diffs], Sun Dec 3 10:29:12 2017 UTC (6 years, 4 months ago) by snj
Branch: netbsd-7
CVS Tags: netbsd-7-2-RELEASE
Changes since 1.18.2.5: +5 -1
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Diff to previous 1.18.2.5 (colored) to branchpoint 1.18 (colored) next main 1.19 (colored)
Pull up following revision(s) (requested by skrll in ticket #1524): sys/arch/arm/cortex/a9_mpsubr.S: revision 1.52 Ensure CNTVOFF is 0 before dropping out of Hyp mode
Revision 1.47.8.2 / (download) - annotate - [select for diffs], Fri Nov 17 15:07:16 2017 UTC (6 years, 4 months ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-2-RELEASE,
netbsd-8-1-RELEASE,
netbsd-8-1-RC1,
netbsd-8-0-RELEASE,
netbsd-8-0-RC2,
netbsd-8-0-RC1
Changes since 1.47.8.1: +5 -1
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Diff to previous 1.47.8.1 (colored) to branchpoint 1.47 (colored)
Pull up following revision(s) (requested by skrll in ticket #351): sys/arch/arm/cortex/a9_mpsubr.S: revision 1.52 Ensure CNTVOFF is 0 before dropping out of Hyp mode
Revision 1.53 / (download) - annotate - [select for diffs], Fri Nov 10 22:54:20 2017 UTC (6 years, 5 months ago) by matt
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202
Changes since 1.52: +11 -11
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Diff to previous 1.52 (colored)
Add #define CPU_CORTEDVIRT to reduce copied complex ifdef. Shrink HYP test
Revision 1.52 / (download) - annotate - [select for diffs], Sat Nov 4 17:09:55 2017 UTC (6 years, 5 months ago) by skrll
Branch: MAIN
Changes since 1.51: +5 -1
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Diff to previous 1.51 (colored)
Ensure CNTVOFF is 0 before dropping out of Hyp mode CVS ----------------------------------------------------------------------
Revision 1.51 / (download) - annotate - [select for diffs], Fri Sep 22 06:31:02 2017 UTC (6 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.50: +2 -2
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Diff to previous 1.50 (colored)
Typo
Revision 1.50 / (download) - annotate - [select for diffs], Wed Sep 6 18:08:35 2017 UTC (6 years, 7 months ago) by jmcneill
Branch: MAIN
Changes since 1.49: +3 -4
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Diff to previous 1.49 (colored)
Clear TEX Remap Enable in SCTLR. U-Boot with CONFIG_ARMV8_SWITCH_TO_EL1 sets it since it is RES1 when TTBCR.EAE=1, but we are still using the short descriptor format and don't currently support TEX remap. ok skrll@
Revision 1.24.2.6 / (download) - annotate - [select for diffs], Mon Aug 28 17:51:30 2017 UTC (6 years, 7 months ago) by skrll
Branch: nick-nhusb
Changes since 1.24.2.5: +6 -1
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Diff to previous 1.24.2.5 (colored) to branchpoint 1.24 (colored) next main 1.25 (colored)
Sync with HEAD
Revision 1.49 / (download) - annotate - [select for diffs], Mon Jul 24 19:37:41 2017 UTC (6 years, 8 months ago) by joerg
Branch: MAIN
CVS Tags: nick-nhusb-base-20170825
Changes since 1.48: +5 -1
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Diff to previous 1.48 (colored)
Replace assembler flags with .arch* annotation.
Revision 1.18.2.5 / (download) - annotate - [select for diffs], Sat Jul 8 17:01:52 2017 UTC (6 years, 9 months ago) by snj
Branch: netbsd-7
Changes since 1.18.2.4: +2 -1
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Diff to previous 1.18.2.4 (colored) to branchpoint 1.18 (colored)
Pull up following revision(s) (requested by skrll in ticket #1444): sys/arch/arm/cortex/a9_mpsubr.S: revision 1.48 Make fp 0 on entry to idle_stack to ensure we mark that we're top of stack
Revision 1.47.8.1 / (download) - annotate - [select for diffs], Thu Jul 6 05:28:43 2017 UTC (6 years, 9 months ago) by martin
Branch: netbsd-8
CVS Tags: matt-nb8-mediatek-base
Branch point for: matt-nb8-mediatek
Changes since 1.47: +2 -1
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Diff to previous 1.47 (colored)
Pull up following revision(s) (requested by skrll in ticket #99): sys/arch/arm/cortex/a9_mpsubr.S: revision 1.48 Make fp 0 on entry to idle_stack to ensure we mark that we're top of stack
Revision 1.48 / (download) - annotate - [select for diffs], Wed Jul 5 20:53:40 2017 UTC (6 years, 9 months ago) by skrll
Branch: MAIN
CVS Tags: perseant-stdc-iso10646-base,
perseant-stdc-iso10646
Changes since 1.47: +2 -1
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Diff to previous 1.47 (colored)
Make fp 0 on entry to idle_stack to ensure we mark that we're top of stack
Revision 1.24.2.5 / (download) - annotate - [select for diffs], Mon Dec 5 10:54:50 2016 UTC (7 years, 4 months ago) by skrll
Branch: nick-nhusb
Changes since 1.24.2.4: +8 -6
lines
Diff to previous 1.24.2.4 (colored) to branchpoint 1.24 (colored)
Sync with HEAD
Revision 1.46.2.1 / (download) - annotate - [select for diffs], Fri Nov 4 14:48:58 2016 UTC (7 years, 5 months ago) by pgoyette
Branch: pgoyette-localcount
Changes since 1.46: +8 -6
lines
Diff to previous 1.46 (colored) next main 1.47 (colored)
Sync with HEAD
Revision 1.47 / (download) - annotate - [select for diffs], Tue Oct 4 15:18:23 2016 UTC (7 years, 6 months ago) by kiyohara
Branch: MAIN
CVS Tags: prg-localcount2-base3,
prg-localcount2-base2,
prg-localcount2-base1,
prg-localcount2-base,
prg-localcount2,
pgoyette-localcount-20170426,
pgoyette-localcount-20170320,
pgoyette-localcount-20170107,
pgoyette-localcount-20161104,
nick-nhusb-base-20170204,
nick-nhusb-base-20161204,
netbsd-8-base,
jdolecek-ncq-base,
jdolecek-ncq,
bouyer-socketcan-base1,
bouyer-socketcan-base,
bouyer-socketcan
Branch point for: netbsd-8
Changes since 1.46: +8 -6
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Diff to previous 1.46 (colored)
Don't touch ACTLR on CORTEX A9, if ACTLR.SMP=1. like Linux. Tested on Gumstix DuoVero(OMAP 4430).
Revision 1.18.2.4 / (download) - annotate - [select for diffs], Fri Feb 26 22:52:53 2016 UTC (8 years, 1 month ago) by snj
Branch: netbsd-7
CVS Tags: netbsd-7-nhusb-base-20170116,
netbsd-7-nhusb-base,
netbsd-7-nhusb,
netbsd-7-1-RELEASE,
netbsd-7-1-RC2,
netbsd-7-1-RC1,
netbsd-7-1-2-RELEASE,
netbsd-7-1-1-RELEASE,
netbsd-7-1
Changes since 1.18.2.3: +25 -3
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Diff to previous 1.18.2.3 (colored) to branchpoint 1.18 (colored)
Pull up following revision(s) (requested by skrll in ticket #1107): external/broadcom/rpi-firmware/dist/LICENCE.broadcom: revision 1.2 external/broadcom/rpi-firmware/dist/bootcode.bin: revision 1.8 external/broadcom/rpi-firmware/dist/fixup.dat: revision 1.8 external/broadcom/rpi-firmware/dist/fixup_cd.dat: revision 1.8 external/broadcom/rpi-firmware/dist/start.elf: revision 1.8 external/broadcom/rpi-firmware/dist/start_cd.elf: revision 1.8 sys/arch/arm/broadcom/bcm2835_emmc.c: revision 1.29 sys/arch/arm/broadcom/bcm2835_gpio.c: revision 1.3 sys/arch/arm/broadcom/bcm2835_gpio_subr.c: revision 1.4 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.9, 1.10 sys/arch/arm/broadcom/bcm2835reg.h: patch sys/arch/arm/cortex/a9_mpsubr.S: revisions 1.45, 1.46 sys/arch/evbarm/conf/CUBIEBOARD: revision 1.45 sys/arch/evbarm/conf/std.awin: revision 1.9 sys/arch/evbarm/rpi/rpi2_start.S: revision 1.3 sys/arch/evbarm/rpi/rpi_machdep.c: revision 1.68 Check for hypervisor mode in cortex_init and exit if the cpu started there. Needed by latest RPI firmware. -- Fix up bus_space_map for latest RPI firmware which now passes the FB address in the mailbox properties as a bus address. -- Update RPI firmware to version after the following commit commit 224c75602b8bae1a9e942b4f1c7ed3aa8e0f0ec8 Author: popcornmix<popcornmix@gmail.com> Date: Tue Dec 8 14:48:57 2015 +0000 -- Deal with kernel builds where virtualisation isn't available -- Tweak CPUFLAGS to cover all CPUs -- Fix up bcm283[56] bus_space(4) to really use bus addresses for peripherals, etc Simplifies the code in various places and uses the abstraction in more places. (bcm2835_gpio_subr.c still doesn't)
Revision 1.24.2.4 / (download) - annotate - [select for diffs], Sun Dec 27 12:09:30 2015 UTC (8 years, 3 months ago) by skrll
Branch: nick-nhusb
Changes since 1.24.2.3: +25 -3
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Diff to previous 1.24.2.3 (colored) to branchpoint 1.24 (colored)
Sync with HEAD (as of 26th Dec)
Revision 1.46 / (download) - annotate - [select for diffs], Sat Dec 19 13:27:29 2015 UTC (8 years, 3 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-localcount-base,
pgoyette-localcount-20160806,
pgoyette-localcount-20160726,
nick-nhusb-base-20161004,
nick-nhusb-base-20160907,
nick-nhusb-base-20160529,
nick-nhusb-base-20160422,
nick-nhusb-base-20160319,
nick-nhusb-base-20151226,
localcount-20160914
Branch point for: pgoyette-localcount
Changes since 1.45: +7 -2
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Diff to previous 1.45 (colored)
Deal with kernel builds where virtualisation isn't available
Revision 1.45 / (download) - annotate - [select for diffs], Thu Dec 17 08:02:42 2015 UTC (8 years, 4 months ago) by skrll
Branch: MAIN
Changes since 1.44: +21 -4
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Diff to previous 1.44 (colored)
Check for hypervisor mode in cortex_init and exit if the cpu started there. Needed by latest RPI firmware.
Revision 1.44 / (download) - annotate - [select for diffs], Wed Nov 25 08:39:45 2015 UTC (8 years, 4 months ago) by skrll
Branch: MAIN
Changes since 1.43: +1 -5
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Diff to previous 1.43 (colored)
G/C TEGRAK1_PMAP_WORKAROUND. Using XN (eXecute Never) properly means speculative reads from devices aren't done. Pretty sure this was the cause of the wedges.
Revision 1.43 / (download) - annotate - [select for diffs], Thu Oct 15 07:13:50 2015 UTC (8 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.42: +5 -1
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Diff to previous 1.42 (colored)
Setting actlr.bit15=1 (Force in order issue in the branch execution unit) makes my jetson tk1 stable. Apply this workaround until we figure out what the real problem is.
Revision 1.24.2.3 / (download) - annotate - [select for diffs], Tue Sep 22 12:05:37 2015 UTC (8 years, 6 months ago) by skrll
Branch: nick-nhusb
Changes since 1.24.2.2: +3 -3
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Diff to previous 1.24.2.2 (colored) to branchpoint 1.24 (colored)
Sync with HEAD
Revision 1.42 / (download) - annotate - [select for diffs], Tue Jun 9 08:08:14 2015 UTC (8 years, 10 months ago) by skrll
Branch: MAIN
CVS Tags: nick-nhusb-base-20150921
Changes since 1.41: +3 -3
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Diff to previous 1.41 (colored)
Use TTBR_[UM]PATTR in a9_mpsubr.S as well as cpufunc_asm_armv7 Prompted by matt@
Revision 1.24.2.2 / (download) - annotate - [select for diffs], Sat Jun 6 14:39:55 2015 UTC (8 years, 10 months ago) by skrll
Branch: nick-nhusb
Changes since 1.24.2.1: +87 -47
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Diff to previous 1.24.2.1 (colored) to branchpoint 1.24 (colored)
Sync with HEAD
Revision 1.41 / (download) - annotate - [select for diffs], Sun May 31 00:02:16 2015 UTC (8 years, 10 months ago) by matt
Branch: MAIN
CVS Tags: nick-nhusb-base-20150606
Changes since 1.40: +16 -22
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Diff to previous 1.40 (colored)
Add CALL macro to hide ugliness of calling when KERNEL_BASE_VOFFSET is non-0
Revision 1.40 / (download) - annotate - [select for diffs], Sat May 30 21:44:38 2015 UTC (8 years, 10 months ago) by matt
Branch: MAIN
Changes since 1.39: +31 -11
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Diff to previous 1.39 (colored)
Call armv7_dcache_l1inv_all in mpstart Make sure ACTRL<31> is set on A15 with 3+ cores.
Revision 1.39 / (download) - annotate - [select for diffs], Thu May 28 02:23:18 2015 UTC (8 years, 10 months ago) by matt
Branch: MAIN
Changes since 1.38: +9 -1
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Diff to previous 1.38 (colored)
A15 change for > 2 cores.
Revision 1.38 / (download) - annotate - [select for diffs], Sun May 17 06:12:40 2015 UTC (8 years, 11 months ago) by matt
Branch: MAIN
Changes since 1.37: +2 -2
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Diff to previous 1.37 (colored)
Add a missing defined(CORTEX_A15)
Revision 1.37 / (download) - annotate - [select for diffs], Fri May 15 10:57:55 2015 UTC (8 years, 11 months ago) by skrll
Branch: MAIN
Changes since 1.36: +5 -5
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Diff to previous 1.36 (colored)
Make sure TLB is invalidated and ACTLR.SMP is set on ARM A15. ACTLR.SMP enables the processor to receive instruction cache, BTB and TLB main- tenance operations from other processors
Revision 1.36 / (download) - annotate - [select for diffs], Sun May 3 16:18:51 2015 UTC (8 years, 11 months ago) by matt
Branch: MAIN
Changes since 1.35: +15 -1
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Diff to previous 1.35 (colored)
On secondary cores, invalidate the caches to make them clean.
Revision 1.35 / (download) - annotate - [select for diffs], Mon Apr 27 07:13:44 2015 UTC (8 years, 11 months ago) by skrll
Branch: MAIN
Changes since 1.34: +2 -2
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Diff to previous 1.34 (colored)
Remove unused label
Revision 1.34 / (download) - annotate - [select for diffs], Mon Apr 27 06:54:12 2015 UTC (8 years, 11 months ago) by skrll
Branch: MAIN
Changes since 1.33: +11 -11
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Diff to previous 1.33 (colored)
ARM spells the System Control Register SCTLR
Revision 1.33 / (download) - annotate - [select for diffs], Sun Apr 26 16:22:57 2015 UTC (8 years, 11 months ago) by jmcneill
Branch: MAIN
Changes since 1.32: +3 -1
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Diff to previous 1.32 (colored)
isb between TTBCR write and TLBIALL
Revision 1.32 / (download) - annotate - [select for diffs], Mon Apr 20 23:12:56 2015 UTC (8 years, 11 months ago) by jmcneill
Branch: MAIN
Changes since 1.31: +3 -1
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Diff to previous 1.31 (colored)
Restore "#if !defined(CPU_CORTEXA5)" accidentally removed in previous commit -- hi skrll@
Revision 1.31 / (download) - annotate - [select for diffs], Sat Apr 18 09:47:13 2015 UTC (9 years ago) by skrll
Branch: MAIN
Changes since 1.30: +22 -22
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Diff to previous 1.30 (colored)
Use character constants instead of ascii values for readability
Revision 1.24.2.1 / (download) - annotate - [select for diffs], Mon Apr 6 15:17:52 2015 UTC (9 years ago) by skrll
Branch: nick-nhusb
Changes since 1.24: +24 -8
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Diff to previous 1.24 (colored)
Sync with HEAD
Revision 1.18.2.3 / (download) - annotate - [select for diffs], Sat Mar 21 08:51:18 2015 UTC (9 years ago) by snj
Branch: netbsd-7
CVS Tags: netbsd-7-0-RELEASE,
netbsd-7-0-RC3,
netbsd-7-0-RC2,
netbsd-7-0-RC1,
netbsd-7-0-2-RELEASE,
netbsd-7-0-1-RELEASE,
netbsd-7-0
Changes since 1.18.2.2: +20 -8
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Diff to previous 1.18.2.2 (colored) to branchpoint 1.18 (colored)
Pull up following revision(s) (requested by jmcneill in ticket #598):
sys/arch/arm/amlogic/amlogic_board.c: up to revision 1.9
sys/arch/arm/amlogic/amlogic_canvasreg.h: revision 1.1
sys/arch/arm/amlogic/amlogic_com.c: up to revision 1.4
sys/arch/arm/amlogic/amlogic_comreg.h: up to revision 1.3
sys/arch/arm/amlogic/amlogic_comvar.h: revision 1.1
sys/arch/arm/amlogic/amlogic_cpufreq.c: up to revision 1.2
sys/arch/arm/amlogic/amlogic_crureg.h: up to revision 1.7
sys/arch/arm/amlogic/amlogic_dwctwo.c: up to revision 1.2
sys/arch/arm/amlogic/amlogic_genfb.c: revision 1.1
sys/arch/arm/amlogic/amlogic_gmac.c: up to revision 1.2
sys/arch/arm/amlogic/amlogic_hdmireg.h: revision 1.1
sys/arch/arm/amlogic/amlogic_intr.h: up to revision 1.5
sys/arch/arm/amlogic/amlogic_io.c: up to revision 1.7
sys/arch/arm/amlogic/amlogic_reg.h: up to revision 1.9
sys/arch/arm/amlogic/amlogic_rng.c: revision 1.1
sys/arch/arm/amlogic/amlogic_sdhc.c: up to revision 1.3
sys/arch/arm/amlogic/amlogic_sdhcreg.h: revision 1.1
sys/arch/arm/amlogic/amlogic_space.c: revision 1.1
sys/arch/arm/amlogic/amlogic_var.h: up to revision 1.8
sys/arch/arm/amlogic/amlogic_vpureg.h: revision 1.1
sys/arch/arm/arm/bootconfig.c: revisions 1.7-1.8
sys/arch/arm/conf/files.arm: revision 1.129
sys/arch/arm/cortex/pl310.c: revisions 1.16-1.17
sys/arch/arm/cortex/a9_mpsubr.S: revisions 1.25-1.29
sys/arch/arm/cortex/a9tmr.c: revisions 1.8-1.12
sys/arch/arm/cortex/a9tmr_var.h: revision 1.4
sys/arch/arm/cortex/a9wdt.c: revisions 1.3-1.4
sys/arch/arm/cortex/armperiph.c: revisions 1.5-1.7
sys/arch/arm/arm/cpufunc.c: revision 1.151
sys/arch/arm/include/bootconfig.h: revision 1.7
sys/arch/arm/include/locore.h: revision 1.19
sys/arch/evbarm/amlogic/amlogic_machdep.c: up to revision 1.17
sys/arch/evbarm/amlogic/amlogic_start.S: up to revision 1.2
sys/arch/evbarm/amlogic/genassym.cf: revision 1.1
sys/arch/evbarm/amlogic/platform.h: revision 1.1
sys/arch/evbarm/conf/files.amlogic: up to revision 1.8
sys/arch/evbarm/conf/std.amlogic: up to revision 1.2
sys/arch/evbarm/conf/mk.amlogic: revision 1.1
sys/arch/evbarm/conf/ODROID-C1: up to revision 1.12
sys/arch/evarm/conf/ODROID-C1_INSTALL: revision 1.1
Don't use not as a variable since it's reserved in C++.
--
clean the a9 l2 cache before turning it on.
--
Add Cortex-A17 support
--
Fix CORTEXA17 support
--
Let the "cbar" device property override the cbar value, to work around
broken bootloaders
--
add a helper to update a9tmr frequency
--
detach and re-attach timecounter when updating freq, and reinit timer on
each cpu
--
fix typo
--
add BOOTOPT_TYPE_MACADDR for parsing mac address parameters
--
make sure we set ACTLR.SMP=1 for CPU_CORTEXA5 in !MP case, ok matt@
--
According to the Cortex-A5 TRM, the CBAR register is not implemented and
always reads as 0x00000000. Add ARM_CBAR option to set this in kernel
config.
--
skip a TLBIALL on Cortex-A5 that stops my odroid-c1 from booting, ok matt
--
match on Cortex-A5
--
match on Cortex-A5
--
allow arml2cc to be used on Cortex-A5 if the "offset" property is specified
--
print "A5" instead of "A9" at attach time if running on a Cortex-A5
--
Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland
--
Work-in-progress Odroid-C1 support.
--
no need to override ARM_CBAR, remove unused COM_16750 option
--
Add basic serial console support.
--
add dwctwo and usb devices
--
ODROID-C1 SMP support.
--
auto-detect RAM size
--
ODROID-C1 onboard ethernet support.
--
add amlogicrng, add commented-out genfb placeholder
--
enable amlogicsdhc
--
add ODROID-C1 install kernel
--
Add CPUFREQ option to set boot CPU frequency. ODROID-C1 is advertised
as quad-core 1.5GHz but boots up at 1.2GHz; add CPUFREQ=1512 to config
and make sure to set the correct speed before attaching CPUs.
The speed can still be scaled down with machdep.cpu sysctls.
--
disable DEBUG, LOCKDEBUG, VERBOSE_INIT_ARM
--
Basic framebuffer console support. Work in progress.
Revision 1.18.2.2 / (download) - annotate - [select for diffs], Wed Mar 11 20:22:55 2015 UTC (9 years, 1 month ago) by snj
Branch: netbsd-7
Changes since 1.18.2.1: +5 -1
lines
Diff to previous 1.18.2.1 (colored) to branchpoint 1.18 (colored)
Pull up following revision(s) (requested by skrll in ticket #582): distrib/utils/embedded/conf/rpi.conf: revision 1.27 etc/etc.evbarm/Makefile.inc: revision 1.70 sys/arch/arm/broadcom/bcm2835_intr.c: revision 1.5-1.7 sys/arch/arm/broadcom/bcm2835_obio.c: revision 1.23, 1.24 sys/arch/arm/broadcom/bcm2835_space.c: revision 1.8 sys/arch/arm/broadcom/bcm2835reg.h: revision 1.14 sys/arch/arm/broadcom/bcm2835var.h: revision 1.2 sys/arch/arm/broadcom/files.bcm2835: revision 1.24 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.30 sys/arch/arm/cortex/armperiph.c: revision 1.8, 1.9 sys/arch/arm/cortex/gtmr.c: revision 1.9 sys/arch/arm/cortex/gtmr_var.h: revision 1.5 sys/arch/arm/cortex/mpcore_var.h: revision 1.3 sys/arch/arm/include/cpu.h: revision 1.84 sys/arch/evbarm/conf/RPI2: revision 1.1, 1.2 sys/arch/evbarm/conf/RPI2_INSTALL: revision 1.1 sys/arch/evbarm/conf/RPI: revision 1.59, 1.60 sys/arch/evbarm/conf/mk.rpi: revision 1.4 sys/arch/evbarm/conf/std.rpi: revisions 1.16-1.19 via patch sys/arch/evbarm/rpi/genassym.cf: revision 1.2 sys/arch/evbarm/rpi/rpi.h: revision 1.4 sys/arch/evbarm/rpi/rpi2_start.S: revision 1.1 sys/arch/evbarm/rpi/rpi_machdep.c: revision 1.57, 1.58 via patch sys/arch/evbarm/rpi/rpi_start.S: revision 1.13 Move some options into std.rpi -- Add __HAVE_MM_MD_CACHE_ALIASING Pull up following revision(s) (requested by skrll in ticket #582): Fix TPIDRPRW_IS_CURLWP builds. -- A MULTIPROCESSOR kernel requires TPIDRPRW_IS_CURCPU. -- Use TPIDRPRW_IS_CURLWP as it's a slight code reduction and performance improvement. Initial RPI2 support - it doesn't work yet. The generic timer gets messed up somehow. This commit changes the KVA layout of the RPI. -- Make this compile where gtmr isn't used. -- Spin up the non-boot CPUs, but don't allow cpu_boot_secondary_processors to see them for now. RPI2 nows works well with only the boot cpu. -- Appease a KASSERT - will be remove when MULTIPROCESSOR RPI2 is fixed. -- Add RPI2 to kernels build for both earmv[67]. Use the earmv6 built kernels to create an image that can be used on both RPI and RPI2 -- Add an RPI2_INSTALL
Revision 1.30 / (download) - annotate - [select for diffs], Wed Mar 4 17:02:17 2015 UTC (9 years, 1 month ago) by skrll
Branch: MAIN
CVS Tags: nick-nhusb-base-20150406
Changes since 1.29: +5 -1
lines
Diff to previous 1.29 (colored)
Spin up the non-boot CPUs, but don't allow cpu_boot_secondary_processors to see them for now. RPI2 nows works well with only the boot cpu.
Revision 1.29 / (download) - annotate - [select for diffs], Fri Feb 27 18:52:20 2015 UTC (9 years, 1 month ago) by jmcneill
Branch: MAIN
Changes since 1.28: +3 -1
lines
Diff to previous 1.28 (colored)
skip a TLBIALL on Cortex-A5 that stops my odroid-c1 from booting, ok matt
Revision 1.28 / (download) - annotate - [select for diffs], Sat Feb 7 17:14:32 2015 UTC (9 years, 2 months ago) by jmcneill
Branch: MAIN
Changes since 1.27: +11 -1
lines
Diff to previous 1.27 (colored)
According to the Cortex-A5 TRM, the CBAR register is not implemented and always reads as 0x00000000. Add ARM_CBAR option to set this in kernel config.
Revision 1.27 / (download) - annotate - [select for diffs], Sat Feb 7 02:39:56 2015 UTC (9 years, 2 months ago) by jmcneill
Branch: MAIN
Changes since 1.26: +2 -2
lines
Diff to previous 1.26 (colored)
make sure we set ACTLR.SMP=1 for CPU_CORTEXA5 in !MP case, ok matt@
Revision 1.26 / (download) - annotate - [select for diffs], Tue Dec 2 22:57:08 2014 UTC (9 years, 4 months ago) by matt
Branch: MAIN
Changes since 1.25: +2 -2
lines
Diff to previous 1.25 (colored)
Fix CORTEXA17 support
Revision 1.25 / (download) - annotate - [select for diffs], Tue Dec 2 22:42:04 2014 UTC (9 years, 4 months ago) by matt
Branch: MAIN
Changes since 1.24: +8 -8
lines
Diff to previous 1.24 (colored)
Add Cortex-A17 support
Revision 1.18.2.1 / (download) - annotate - [select for diffs], Sun Nov 9 16:05:25 2014 UTC (9 years, 5 months ago) by martin
Branch: netbsd-7
Changes since 1.18: +25 -14
lines
Diff to previous 1.18 (colored)
Pull up following revision(s) (requested by skrll in ticket #188): sys/arch/arm/include/arm32/pmap.h: revision 1.136 sys/arch/arm/include/armreg.h: revision 1.100 sys/arch/arm/cortex/gic.c: revision 1.11 sys/arch/arm/arm32/db_interface.c: revision 1.54 sys/arch/arm/include/armreg.h: revision 1.101 sys/arch/arm/cortex/gic.c: revision 1.12 sys/arch/arm/arm32/arm32_machdep.c: revision 1.107 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20 sys/arch/evbarm/conf/BPI: revision 1.5 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21 sys/arch/arm/arm32/pmap.c: revision 1.306 sys/arch/arm/arm32/db_machdep.c: revision 1.22 sys/arch/arm/arm32/arm32_tlb.c: revision 1.3 sys/arch/arm/arm/undefined.c: revision 1.55 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22 sys/arch/arm/arm32/pmap.c: revision 1.307 sys/arch/arm/arm32/arm32_tlb.c: revision 1.4 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23 sys/arch/arm/arm32/arm32_tlb.c: revision 1.5 sys/arch/evbarm/conf/BPI: revision 1.8 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24 sys/arch/arm/arm32/arm32_tlb.c: revision 1.6 sys/arch/arm/arm32/arm32_tlb.c: revision 1.7 sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5 sys/arch/arm/pic/pic.c: revision 1.23 sys/arch/arm/pic/pic.c: revision 1.24 sys/arch/arm/pic/picvar.h: revision 1.11 sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20 sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16 sys/arch/arm/arm32/pmap.c: revision 1.298 sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17 sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5 sys/arch/arm/arm32/pmap.c: revision 1.310 sys/arch/arm/arm32/pmap.c: revision 1.311 sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32 sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19 sys/arch/arm/arm32/arm32_boot.c: revision 1.10 sys/arch/arm/arm/ast.c: revision 1.25 sys/arch/arm/include/armreg.h: revision 1.98 sys/uvm/pmap/pmap_tlb.c: revision 1.10 sys/arch/arm/arm32/arm32_boot.c: revision 1.8 sys/arch/arm/arm32/arm32_boot.c: revision 1.9 sys/arch/arm/arm/arm_machdep.c: revision 1.43 Various ARM MP fixes.
Revision 1.24 / (download) - annotate - [select for diffs], Thu Sep 25 04:59:15 2014 UTC (9 years, 6 months ago) by ryo
Branch: MAIN
CVS Tags: nick-nhusb-base
Branch point for: nick-nhusb
Changes since 1.23: +2 -2
lines
Diff to previous 1.23 (colored)
Always set CORTEXA9_AUXCTL_SMP on the CortexA9 as well as A7
Revision 1.23 / (download) - annotate - [select for diffs], Tue Sep 16 22:29:09 2014 UTC (9 years, 7 months ago) by matt
Branch: MAIN
Changes since 1.22: +4 -2
lines
Diff to previous 1.22 (colored)
Always set SMP on the A7 since it's needed for ldrex/strex
Revision 1.22 / (download) - annotate - [select for diffs], Tue Sep 16 22:00:22 2014 UTC (9 years, 7 months ago) by matt
Branch: MAIN
Changes since 1.21: +7 -1
lines
Diff to previous 1.21 (colored)
Enable L2 prefetch on A9 if MP
Revision 1.21 / (download) - annotate - [select for diffs], Mon Sep 15 19:02:38 2014 UTC (9 years, 7 months ago) by skrll
Branch: MAIN
Changes since 1.20: +13 -10
lines
Diff to previous 1.20 (colored)
Don't set CORTEXA9_AUXCTL_FW on A7. It's undefined. Misc. cleanup while I'm here.
Revision 1.20 / (download) - annotate - [select for diffs], Mon Sep 15 11:49:01 2014 UTC (9 years, 7 months ago) by ryo
Branch: MAIN
Changes since 1.19: +4 -4
lines
Diff to previous 1.19 (colored)
fix to invalidate all way of own processor
Revision 1.19 / (download) - annotate - [select for diffs], Mon Sep 15 00:35:37 2014 UTC (9 years, 7 months ago) by matt
Branch: MAIN
Changes since 1.18: +2 -2
lines
Diff to previous 1.18 (colored)
Make sure to read SCTRL no matter way CPU we are on.
Revision 1.3.2.3 / (download) - annotate - [select for diffs], Wed Aug 20 00:02:45 2014 UTC (9 years, 7 months ago) by tls
Branch: tls-maxphys
Changes since 1.3.2.2: +564 -299
lines
Diff to previous 1.3.2.2 (colored) to branchpoint 1.3 (colored)
Rebase to HEAD as of a few days ago.
Revision 1.14.2.1 / (download) - annotate - [select for diffs], Sun Aug 10 06:53:51 2014 UTC (9 years, 8 months ago) by tls
Branch: tls-earlyentropy
Changes since 1.14: +23 -39
lines
Diff to previous 1.14 (colored) next main 1.15 (colored)
Rebase.
Revision 1.3.4.4 / (download) - annotate - [select for diffs], Thu May 22 11:39:31 2014 UTC (9 years, 10 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.3.4.3: +584 -292
lines
Diff to previous 1.3.4.3 (colored) to branchpoint 1.3 (colored) next main 1.4 (colored)
sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
Revision 1.18 / (download) - annotate - [select for diffs], Wed May 21 01:02:45 2014 UTC (9 years, 10 months ago) by ozaki-r
Branch: MAIN
CVS Tags: tls-maxphys-base,
tls-earlyentropy-base,
netbsd-7-base
Branch point for: netbsd-7
Changes since 1.17: +2 -2
lines
Diff to previous 1.17 (colored)
Fix wrong instruction; mrc => mcr
Revision 1.6.2.2 / (download) - annotate - [select for diffs], Sun May 18 17:44:57 2014 UTC (9 years, 11 months ago) by rmind
Branch: rmind-smpnet
Changes since 1.6.2.1: +563 -303
lines
Diff to previous 1.6.2.1 (colored) to branchpoint 1.6 (colored) next main 1.7 (colored)
sync with head
Revision 1.17 / (download) - annotate - [select for diffs], Fri Apr 11 16:32:12 2014 UTC (10 years ago) by matt
Branch: MAIN
CVS Tags: yamt-pagecache-base9,
rmind-smpnet-nbase,
rmind-smpnet-base
Changes since 1.16: +7 -7
lines
Diff to previous 1.16 (colored)
whitespace cleanup
Revision 1.16 / (download) - annotate - [select for diffs], Fri Apr 11 02:37:45 2014 UTC (10 years ago) by matt
Branch: MAIN
Changes since 1.15: +14 -30
lines
Diff to previous 1.15 (colored)
Simplify calls into .text by using KERNEL_BASE_VOFFSET.
Revision 1.15 / (download) - annotate - [select for diffs], Thu Apr 10 16:07:50 2014 UTC (10 years ago) by skrll
Branch: MAIN
Changes since 1.14: +3 -3
lines
Diff to previous 1.14 (colored)
Fix a typo - it's "#define". Use defined(foo) rather than just foo in preprocessor conditional. ok matt@
Revision 1.14 / (download) - annotate - [select for diffs], Sun Mar 30 15:20:54 2014 UTC (10 years ago) by matt
Branch: MAIN
CVS Tags: riastradh-xf86-video-intel-2-7-1-pre-2-21-15
Branch point for: tls-earlyentropy
Changes since 1.13: +461 -302
lines
Diff to previous 1.13 (colored)
Improve MP startup code. We now use a two stage startup, after creating the initial L1PT and turning on the MMU/caches, we spinup the secondary CPUs waiting for them to get the same state as the boot processor. Once the real L1PT is initialized and used, the secondary CPUs are kicked so they can use it (and the initial L1PT is discarded). Finally, wait until NetBSD kicks the secondary CPUs then load the stack from the idlelwp and then hatch the cpu and then jump to idle_loop.
Revision 1.12.2.6 / (download) - annotate - [select for diffs], Thu Mar 27 23:21:36 2014 UTC (10 years ago) by matt
Branch: matt-nb5-mips64
Changes since 1.12.2.5: +11 -4
lines
Diff to previous 1.12.2.5 (colored) next main 1.13 (colored)
Don't = since that isn't BE8 friendly
Revision 1.12.2.5 / (download) - annotate - [select for diffs], Wed Mar 26 02:13:54 2014 UTC (10 years ago) by matt
Branch: matt-nb5-mips64
Changes since 1.12.2.4: +12 -2
lines
Diff to previous 1.12.2.4 (colored)
flush the icache after enabling the SCU
Revision 1.12.2.4 / (download) - annotate - [select for diffs], Mon Mar 24 18:44:13 2014 UTC (10 years ago) by matt
Branch: matt-nb5-mips64
Changes since 1.12.2.3: +22 -4
lines
Diff to previous 1.12.2.3 (colored)
Allow A7 to use this.
Revision 1.13 / (download) - annotate - [select for diffs], Fri Feb 21 22:22:48 2014 UTC (10 years, 1 month ago) by matt
Branch: MAIN
CVS Tags: riastradh-drm2-base3
Changes since 1.12: +183 -102
lines
Diff to previous 1.12 (colored)
Rework PIC method to be simplier. Change be more cortex neutral.
Revision 1.12.2.3 / (download) - annotate - [select for diffs], Thu Feb 20 20:36:29 2014 UTC (10 years, 1 month ago) by matt
Branch: matt-nb5-mips64
Changes since 1.12.2.2: +2 -2
lines
Diff to previous 1.12.2.2 (colored)
Use right register when setting ttbr
Revision 1.12.2.2 / (download) - annotate - [select for diffs], Sat Feb 15 16:18:36 2014 UTC (10 years, 2 months ago) by matt
Branch: matt-nb5-mips64
Changes since 1.12.2.1: +529 -0
lines
Diff to previous 1.12.2.1 (colored)
Merge armv7 support from HEAD, specifically support for the BCM5301X and BCM56340 evbarm kernels.
Revision 1.12.2.1, Fri Jan 24 05:14:11 2014 UTC (10 years, 2 months ago) by matt
Branch: matt-nb5-mips64
Changes since 1.12: +0 -504
lines
FILE REMOVED
file a9_mpsubr.S was added on branch matt-nb5-mips64 on 2014-02-15 16:18:36 +0000
Revision 1.12 / (download) - annotate - [select for diffs], Fri Jan 24 05:14:11 2014 UTC (10 years, 2 months ago) by matt
Branch: MAIN
Branch point for: matt-nb5-mips64
Changes since 1.11: +38 -3
lines
Diff to previous 1.11 (colored)
Deal with writing bswapped com registers at COM_MULT register widths.
Revision 1.11 / (download) - annotate - [select for diffs], Thu Dec 26 00:19:07 2013 UTC (10 years, 3 months ago) by joerg
Branch: MAIN
Changes since 1.10: +2 -2
lines
Diff to previous 1.10 (colored)
dsb is preferred for post-armv7 CPUs.
Revision 1.10 / (download) - annotate - [select for diffs], Tue Nov 12 17:10:39 2013 UTC (10 years, 5 months ago) by matt
Branch: MAIN
Changes since 1.9: +7 -2
lines
Diff to previous 1.9 (colored)
Deal with ARM32_DISABLE_ALIGNMENT_FAULTS
Revision 1.9 / (download) - annotate - [select for diffs], Sat Sep 7 00:33:32 2013 UTC (10 years, 7 months ago) by matt
Branch: MAIN
Changes since 1.8: +2 -6
lines
Diff to previous 1.8 (colored)
Remove brain fart with TTBCR
Revision 1.6.2.1 / (download) - annotate - [select for diffs], Wed Aug 28 23:59:11 2013 UTC (10 years, 7 months ago) by rmind
Branch: rmind-smpnet
Changes since 1.6: +6 -1
lines
Diff to previous 1.6 (colored)
sync with head
Revision 1.8 / (download) - annotate - [select for diffs], Mon Aug 5 00:59:19 2013 UTC (10 years, 8 months ago) by matt
Branch: MAIN
Changes since 1.7: +4 -4
lines
Diff to previous 1.7 (colored)
Turn on CPU_CONTROL_EX_BEND for big endian in exceptions, not CPU_CONTROL_BEND_ENABLE.
Revision 1.7 / (download) - annotate - [select for diffs], Sun Aug 4 01:20:08 2013 UTC (10 years, 8 months ago) by matt
Branch: MAIN
Changes since 1.6: +6 -1
lines
Diff to previous 1.6 (colored)
Make sure CPU_CONTROL_BEND_ENABLE is set on BE systems.
Revision 1.3.2.2 / (download) - annotate - [select for diffs], Sun Jun 23 06:20:00 2013 UTC (10 years, 9 months ago) by tls
Branch: tls-maxphys
Changes since 1.3.2.1: +42 -15
lines
Diff to previous 1.3.2.1 (colored) to branchpoint 1.3 (colored)
resync from head
Revision 1.6 / (download) - annotate - [select for diffs], Thu Jun 20 05:29:01 2013 UTC (10 years, 9 months ago) by matt
Branch: MAIN
CVS Tags: riastradh-drm2-base2,
riastradh-drm2-base1,
riastradh-drm2-base,
riastradh-drm2
Branch point for: rmind-smpnet
Changes since 1.5: +8 -1
lines
Diff to previous 1.5 (colored)
Set caching bits on the TTBR for ARMv7 Make sure TTCR is 0
Revision 1.5 / (download) - annotate - [select for diffs], Mon Jun 17 04:38:51 2013 UTC (10 years, 10 months ago) by matt
Branch: MAIN
Changes since 1.4: +35 -15
lines
Diff to previous 1.4 (colored)
Make this a little more generic. Make sure to turn on branch prediction.
Revision 1.3.6.3 / (download) - annotate - [select for diffs], Tue Mar 12 21:20:04 2013 UTC (11 years, 1 month ago) by matt
Branch: matt-nb6-plus
Changes since 1.3.6.2: +6 -5
lines
Diff to previous 1.3.6.2 (colored) to branchpoint 1.3 (colored) next main 1.4 (colored)
Busy wait in a WFI loop until told to exit.
Revision 1.3.2.1 / (download) - annotate - [select for diffs], Mon Feb 25 00:28:26 2013 UTC (11 years, 1 month ago) by tls
Branch: tls-maxphys
Changes since 1.3: +3 -3
lines
Diff to previous 1.3 (colored)
resync with head
Revision 1.3.4.3 / (download) - annotate - [select for diffs], Wed Jan 16 05:32:46 2013 UTC (11 years, 3 months ago) by yamt
Branch: yamt-pagecache
CVS Tags: yamt-pagecache-tag8
Changes since 1.3.4.2: +3 -3
lines
Diff to previous 1.3.4.2 (colored) to branchpoint 1.3 (colored)
sync with (a bit old) head
Revision 1.4 / (download) - annotate - [select for diffs], Wed Nov 28 22:48:13 2012 UTC (11 years, 4 months ago) by matt
Branch: MAIN
CVS Tags: yamt-pagecache-base8,
yamt-pagecache-base7,
khorben-n900,
agc-symver-base,
agc-symver
Changes since 1.3: +3 -3
lines
Diff to previous 1.3 (colored)
Make these compile with gcc4.1 and binutils 2.16
Revision 1.3.6.2 / (download) - annotate - [select for diffs], Wed Nov 28 22:40:25 2012 UTC (11 years, 4 months ago) by matt
Branch: matt-nb6-plus
Changes since 1.3.6.1: +436 -0
lines
Diff to previous 1.3.6.1 (colored) to branchpoint 1.3 (colored)
Merge improved arm support (especially Cortex) from HEAD including OMAP and BCM53xx support.
Revision 1.3.4.2 / (download) - annotate - [select for diffs], Tue Oct 30 17:19:00 2012 UTC (11 years, 5 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.3.4.1: +436 -0
lines
Diff to previous 1.3.4.1 (colored) to branchpoint 1.3 (colored)
sync with head
Revision 1.3.6.1, Wed Sep 5 00:21:30 2012 UTC (11 years, 7 months ago) by matt
Branch: matt-nb6-plus
Changes since 1.3: +0 -436
lines
FILE REMOVED
file a9_mpsubr.S was added on branch matt-nb6-plus on 2012-11-28 22:40:25 +0000
Revision 1.3.4.1, Wed Sep 5 00:21:30 2012 UTC (11 years, 7 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.3: +0 -436
lines
FILE REMOVED
file a9_mpsubr.S was added on branch yamt-pagecache on 2012-10-30 17:19:00 +0000
Revision 1.3 / (download) - annotate - [select for diffs], Wed Sep 5 00:21:30 2012 UTC (11 years, 7 months ago) by matt
Branch: MAIN
CVS Tags: yamt-pagecache-base6
Branch point for: yamt-pagecache,
tls-maxphys,
matt-nb6-plus
Changes since 1.2: +6 -2
lines
Diff to previous 1.2 (colored)
Force TTBCR to 0
Revision 1.2 / (download) - annotate - [select for diffs], Sun Sep 2 05:01:54 2012 UTC (11 years, 7 months ago) by matt
Branch: MAIN
Changes since 1.1: +61 -30
lines
Diff to previous 1.1 (colored)
Cleanup and bring forwards from bcm53xx_start.S Use more symbolic names ...
Revision 1.1 / (download) - annotate - [select for diffs], Sat Sep 1 00:03:14 2012 UTC (11 years, 7 months ago) by matt
Branch: MAIN
Add Cortex-A9 support including the ARM Generic Interrupt Controller and the A9 Global Timer / Watchdog.