CVS log for src/sys/arch/arm/arm/undefined.c

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Keyword substitution: kv
Default branch: MAIN

Arrange to update cached LWP credentials in userret() rather than during
syscall/trap entry, eliminating a test+branch on every syscall/trap.

This wasn't possible in the 3.99.x timeframe when l->l_cred came about
because there wasn't a reliable/timely way to force an ONPROC LWP running on
a remote CPU into the kernel (which is just about the only new thing in
this scheme).

KNF

Make VERBOSE_ARM32 compile again and reduce #ifdefs while I'm here

Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.

The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.

Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.

The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.

gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.

Tested on RPI3, Apple M1, QEMU, and lx2k

Fixes PR port-arm/56264:
   diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3

Remove stale comment

KNF and remove (some) unnecessary #includes

Use designated initialisers for static handlers and reduce the kernel size
a little.

G/C FAST_FPE

Pull up following revision(s) (requested by skrll in ticket #1092):

	sys/arch/arm/arm/undefined.c: revision 1.67

Allow an undefined instruction to use lr (r14) as Rt. New gcc emits this
with TPIDRURO read.

Not sure why the exception handler cares if sp or pc are used as Rt

Allow an undefined instruction to use lr (r14) as Rt. New gcc emits this
with TPIDRURO read.

Not sure why the exception handler cares if sp or pc are used as Rt

Mostly merge changes from HEAD upto 20200411

in many device attach paths, allocate memory with KM_SLEEP instead of KM_NOSLEEP
and remove code to handle failures that can no longer happen.

Sync with HEAD

Overhaul the API used to fetch and store individual memory cells in
userspace.  The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms.  The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).

Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.

Welcome to NetBSD 8.99.37.

Fixup a comment

Style and whitespace. NFC.

Sync with HEAD

merge a new version of the CDDL dtrace and ZFS code.
this changes the upstream vendor from OpenSolaris to FreeBSD,
and this version is based on FreeBSD svn r315983.

in addition to the 10 years of improvements from upstream,
this version also has these NetBSD-specific enhancements:
 - dtrace FBT probes can now be placed in kernel modules.
 - ZFS now supports mmap().

Remove port-acorn26

OK core@

update from HEAD

Sync with HEAD

Consistency around the user trapframe for all LWPs and there's no need to
keep assigning it in kernel entry points.

Sync with HEAD

KNF

Sync with HEAD

Sync with HEAD

apply changes equivalent to freebsd r256822, r267759 and r298171:
fix the dtrace "args" variable to return correct values.
simplify the invop handlers a bit by changing the second argument
from a pointer into the stack to a pointer to the trapframe.

Trailing whitespace

Sync with HEAD

Remove FAST_FPE code

Pull up following revision(s) (requested by skrll in ticket #188):
	sys/arch/arm/include/arm32/pmap.h: revision 1.136
	sys/arch/arm/include/armreg.h: revision 1.100
	sys/arch/arm/cortex/gic.c: revision 1.11
	sys/arch/arm/arm32/db_interface.c: revision 1.54
	sys/arch/arm/include/armreg.h: revision 1.101
	sys/arch/arm/cortex/gic.c: revision 1.12
	sys/arch/arm/arm32/arm32_machdep.c: revision 1.107
	sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19
	sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20
	sys/arch/evbarm/conf/BPI: revision 1.5
	sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21
	sys/arch/arm/arm32/pmap.c: revision 1.306
	sys/arch/arm/arm32/db_machdep.c: revision 1.22
	sys/arch/arm/arm32/arm32_tlb.c: revision 1.3
	sys/arch/arm/arm/undefined.c: revision 1.55
	sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22
	sys/arch/arm/arm32/pmap.c: revision 1.307
	sys/arch/arm/arm32/arm32_tlb.c: revision 1.4
	sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23
	sys/arch/arm/arm32/arm32_tlb.c: revision 1.5
	sys/arch/evbarm/conf/BPI: revision 1.8
	sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24
	sys/arch/arm/arm32/arm32_tlb.c: revision 1.6
	sys/arch/arm/arm32/arm32_tlb.c: revision 1.7
	sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5
	sys/arch/arm/pic/pic.c: revision 1.23
	sys/arch/arm/pic/pic.c: revision 1.24
	sys/arch/arm/pic/picvar.h: revision 1.11
	sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20
	sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16
	sys/arch/arm/arm32/pmap.c: revision 1.298
	sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17
	sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5
	sys/arch/arm/arm32/pmap.c: revision 1.310
	sys/arch/arm/arm32/pmap.c: revision 1.311
	sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32
	sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19
	sys/arch/arm/arm32/arm32_boot.c: revision 1.10
	sys/arch/arm/arm/ast.c: revision 1.25
	sys/arch/arm/include/armreg.h: revision 1.98
	sys/uvm/pmap/pmap_tlb.c: revision 1.10
	sys/arch/arm/arm32/arm32_boot.c: revision 1.8
	sys/arch/arm/arm32/arm32_boot.c: revision 1.9
	sys/arch/arm/arm/arm_machdep.c: revision 1.43
Various ARM MP fixes.

Use KM_NOSLEEP in install_coproc_handler.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Move undefined evcnt's to cpu_info.

Add a trap handler for DTrace FBT provider

frame -> tf
printf out the insn, faulting pc, lr, sp when we get an undefined insn
int the kernel.

Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.

Add read_insn and read_thumb_insn inlines to hide the endianness of
instructions and use them as appropriate.

sync with head

Properly recognize Thumb2 instructions.
(a thumb2 FP programs correctly runs now).

Move parts of cpu.h that are not needed by MI code in <arm/locore.h>
Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h>
Use <arm/asm.h> instead of <machine/arm.h>

sync with (a bit old) head

Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.

Resync to 2012-11-19 00:00:00 UTC

C99 types

sync with head

small rototill.
pcb_flags is dead.  PCB_NOALIGNFLT is now in stored l_md.md_flags as
MDLWP_NOALIGNFLT.  This avoids a few loads of the PCB in exception handling.
pcb_tf has been moved to l_md.md_tf.  Again this avoids a lot of pcb
references just to access or set this.  It also means that pcb doesn't
need to accessed by MI code.
Move pcb_onfault to after the pcb union.
Add pcb_sp macro to make code prettier.
Add lwp_settrapframe(l, tf) to set the l_md.md_tf field.
Use lwp_trapframe to access it (was process_frame but that name was changed
in a previous commit).
Kill off curpcb in acorn26.
Kill the checks for curlwp being NULL.
Move TRAP_USERMODE from arm32/fault.c to frame.h and a __PROG26 version.
Replace tests for usermode with that macro.

Rework VFP support to use PCU.
Add emulation of instruction which save/restore the VFP FPSCR.
Add a sysarch hook to VFP FPSCR manipulation.

[The emulation will be used by libc to store/fetch exception modes and
rounding mode on a per-thread basis.]

Make sure to advance the PC after emulating an instruction.

Add event counters for undefined instruction and cp15 instruction emulation.

sync with head

Semicolons are not optional :)

Make sure to advance past the instruction we just emulated.

Sync with HEAD.

sync with head

Add a cp15 trapper to emulate the mrc/mcr instructions for the thread id
registers.

sync with head

Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits.  Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

sync with head

- Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places.  Reduce sys/user.h inclusions.

Use lwp_getpcb() on ARM (and acorn26/32), clean from struct user usage.

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

ansify function definitions

Sync with HEAD.

Sync with HEAD.

kill MALLOC and FREE macros.

Update haad-dm branch to haad-dm-base2.

Add some KASSERTS and tests for I32_bit to include F32_bit

Sync w/ -current. 34 merge conflicts to follow.

sync with head

Sync with HEAD.

Remove unneeded playing about with kernel_lock.

sync with head.

sync with head.

Merge kernel changes in matt-armv6 to HEAD.

Sync with HEAD.

Sync with HEAD.

Sync with HEAD.

sync with head.

Sync with HEAD

sync with HEAD

Sync with HEAD.

Don't set l_usrpri / spc_curpriority here. mi_userret() does it.

Sync with HEAD.

sync with head.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Sync with head.

sync with head.

Sync with HEAD

Sync with HEAD.

Make want_resched a member of cpu_info.

Deal with new world order.

- sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.

sync with head.

Changes for newlock2.

Merge newlock2 to head.

Remove support for SA. Ok core@.

sync with head.

sync with head

sync with head

- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.

sync with head.

Sync with head.

Give THUMB_CODE its own 'struct undefined_handler' so we don't try to
install the same handler structure twice (for difference coprocs).

Spotted by dbj@ using QUEUEDEBUG.

Sync with HEAD.

Fix the argument to KERNEL_PROC_LOCK/KERNEL_PROC_UNLOCK.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD.

Convert the coprocessor defines into an enum to avoid excessive
preprocessor hackery.  If supporting Thumb add an 18th undefined
handler for undefined instruction traps taken in Thumb state.  Kill
MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead.

Add support for breakpoints set in Thumb code and hand them off to
GDB as required.

Sync with HEAD.

Don't overload the unknown instruction handling for the core onto CP0.
Instead, add a seventeenth 'co-processor' specifically for the core.
Add support for ARMv5 unknown instructions in the 'NV' space.

Sync with HEAD

Use kdb_trap() rather than Debugger() to deal with unhandled undefined
instructions in the kernel, so that DDB gets a useful trapframe.  Also
panic if this happens when DDB's not around.

Check alignment of the fault PC before de-referencing it.
Give the process a Illegal Instruction fault if the PC is misaligned.

Reduce code duplication by adding mi_userret() in sys/userret.h
containing signal posting, kernel-exit handling and sa_upcall processing.

XXX the pc532, sparc, sparc64 and vax ports should have their
XXX userret() code rearranged to use this.

* Shuffle some data structures so, and add a flags word to ksiginfo_t.
  Right now the only flag is used to indicate if a ksiginfo_t is a
  result of a trap.  Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap.  Expands to 0 if the ksiginfo_t was
  not the result of a trap.  This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
  Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
  the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern.  Reviewed and OK's by Christos.

Add SA_SIGINFO support for ARM (from Chris Gilbert).

Add arm32 machine-specific remote kgdb support.  Largely
from PR port-arm/15530 by bsh@, but with some updates from
me, including a fresh arm32/kgdb_machdep.c--ported from pc532.

Merge the nathanw_sa branch.

In the SA universe, the switch-to-this-LWP decision is made at a
different level than where preempt() calls are made, which renders
the "newlwp" argument useless.  Replace it with a "more work to do"
boolean argument.  Returning to userspace preempt() calls pass 0.
"Voluntary" preemptions in e.g. uiomove() pass 1.  This will be used
to indicate to the SA subsystem that the LWP is not yet finished in
the kernel.

Collapse the SA vs. non-SA cases of preempt() together, making the
conditional code block much smaller, and don't call sa_preempt() if
more work is to come.

NOTE: THIS IS NOT A COMPLETE FIX TO THE preempt()-in-uiomove() PROBLEM
THAT CURRENTLY EXISTS FOR SA PROCESSES.

Lock the kernel when handling page faults and undefined instructions.

Change "if (l->l_flag & L_SA_UPCALL)" to "while (l->l_flag & L_SA_UPCALL)"
in userret() functions or equivalent, to permit delivery of multiple upcalls
in a single kernel entry.

XXX It's getting crowded in here. Collapsing posting signals, upcalls, and
XXX kernel-exit handling into one mechanism would be nice.

No longer need to pull in lwp.h; proc.h pulls it in for us.

Do p->p_userret handling rather than the old P_WEXIT check in the
FAST_FPE case of undefinedinstruction().

Curproc->curlwp renaming.

Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".

"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).

catch up with -current on kqueue branch

Catch up to -current.

Make it compile when VERBOSE_ARM32 is defined.

Catch up to -current.

Centralize ARM CPU configuration information by adding a new header
file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines
the following:
* CPU_NTYPES -- now many CPU types are configured into the kernel.  What
  you really want to know is "== 1" or "> 1".
* Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending
  on which ARM architecture versions are configured (based on CPU_*
  options).  Also defines ARM_NARCH to determins how many architecture
  versions are configured.
* Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on
  which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS
  to determine how many MMU classes are configured.

Remove the needless inclusion of "opt_cputypes.h" in several places.
Convert remaining users to <arm/cpuconf.h>.

Catch up to -current.
(CVS: It's not just a program. It's an adventure!)

arm26->acorn26 transition.

Sync kqueue branch with -current.

Catch up to -current.

* Share a common vector page between arm26 and arm32.
* Use a common set of exception handlers for all arm32 platforms.
* New FIQ framework based on discussions with Ben Harris, shared
  between arm26 and arm32.

cpu_upcall() -> sa_upcall_userret().

Use <arm/undefined.h> instead of <machine/undefined.h>.

Add 26-bit and 32-bit types.h files, which indicate the programming
model in use for a given platform (__PROG26 vs __PROG32), then pulls
in <arm/types.h>.  Change each ARM port to pull in <arm/arm26/types.h>
or <arm/arm32/types.h> as appropriate.  Change all references to PROG26
and PROG32 to __PROG26 and __PROG32.  Eliminate the opt_progmode.h
header file.

Machine-dependent kernel mods for scheduler activations on
32-bit ARM processors.  Kernel boots multi-user on an XScale,
but upcalls not yet tested.

file undefined.c was added on branch nathanw_sa on 2001-11-15 06:39:21 +0000

Recognize GDB's default breakpoint instruction (as of GDB 5.0), in addition to
the instruction we used with GDB 4.x.  The new instruction has the advantage
of fitting the pattern that ARM recommend using for instructions that need to
stay undefined.

Catch up with -current.

Sync with HEAD.

Create an ARM2-specific undefined-instruction handler which deals with the
undef/SWI bug and handles emulating SWP.

Untested bacuse my ARM2 machine isn't currently set up.

Change the value of tf_pc in undefined-instruction handlers on arm32.  It now
always points to the undefined instruction in question.  It's up to the
handler to advance it to the next instruction if it wants execution to
continue there.  This is how things have always worked on arm26.

Separate out the SIGTRAP (gdb breakpoint) generator from undefinedinstruction()
so it's no longer a special case.

Sync with HEAD.

file undefined.c was added on branch thorpej_scsipi on 2001-03-12 13:27:19 +0000

Change undefined instruction handler to use a linked list for each
co-processor.  This is necessary so we can have several handlers for
CP0 (used as a catch-all for non-CP instructions).

Handlers are now removed using remove_coproc_handler(), rather than by calling
install_coproc_handler() with a NULL handler.

Because install_coproc_handler() can now allocate memory, there's a version
for use at boot time that doesn't.

Use the same undefined-instuction handler on both arm26 and arm32.  The handler
is derived mostly from the arm32 version, but with a check for an obscure ARM2
bug thrown in.

arm26 fpu and cpu drivers use the new interface for catching undefined
instructions.

General prettification (mostly comments).

ANSIfy.

Move undefined.c from sys/arch/{arm32/arm32,hpcarm/hpcarm} to sys/arch/arm/arm
in preparation for making it usable on arm26 as well.