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CVS log for src/sys/arch/arm/arm/cpu_subr.c

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Default branch: MAIN


Revision 1.5 / (download) - annotate - [select for diffs], Sun Nov 14 16:56:32 2021 UTC (14 months, 1 week ago) by riastradh
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm, HEAD
Changes since 1.4: +9 -5 lines
Diff to previous 1.4 (colored)

arm: Fix CPU startup synchronization.

- Use load-acquire instead of (wrong) membar_consumer then load in
  cpu_boot_secondary_processors and cpu_hatched_p.

  => (Could use load then membar_consumer instead but load-acquire is
     shorter.)

- Issue  dmb ish  before setting or clearing the bit in
  cpu_set_hatched and cpu_clr_mbox to effect a store-release.

  => (Could use membar_exit, which is semantically weaker than  dmb ish
     but on arm is just implemented as  dmb ish.)

  => (Could use stlr except we don't have atomic_ops(9) to do that.)

This way, everything before cpu_set_hatched or cpu_clr_mbox is
guaranteed to happen before everything after
cpu_boot_secondary_processors, which was previously not guaranteed.

Revision 1.4 / (download) - annotate - [select for diffs], Sun Oct 31 16:23:47 2021 UTC (14 months, 3 weeks ago) by skrll
Branch: MAIN
Changes since 1.3: +4 -7 lines
Diff to previous 1.3 (colored)

Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.

The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.

Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.

The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.

gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.

Tested on RPI3, Apple M1, QEMU, and lx2k

Fixes PR port-arm/56264:
   diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3

Revision 1.1.10.1 / (download) - annotate - [select for diffs], Mon Dec 14 14:37:47 2020 UTC (2 years, 1 month ago) by thorpej
Branch: thorpej-futex
Changes since 1.1: +8 -4 lines
Diff to previous 1.1 (colored) next main 1.2 (colored)

Sync w/ HEAD.

Revision 1.3 / (download) - annotate - [select for diffs], Thu Dec 3 07:45:52 2020 UTC (2 years, 1 month ago) by skrll
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.2: +4 -4 lines
Diff to previous 1.2 (colored)

Provide and use a sev() macro for the sev instruction.

While here use the correct barrier to ensure completion of memory accesses
before a couple of the sev() calls.

Revision 1.2 / (download) - annotate - [select for diffs], Mon Nov 30 21:06:56 2020 UTC (2 years, 1 month ago) by skrll
Branch: MAIN
Changes since 1.1: +8 -4 lines
Diff to previous 1.1 (colored)

Ensure stores are observed before the 'sev' instructions.

Revision 1.1.6.2 / (download) - annotate - [select for diffs], Wed Apr 8 14:07:27 2020 UTC (2 years, 9 months ago) by martin
Branch: phil-wifi
Changes since 1.1.6.1: +142 -0 lines
Diff to previous 1.1.6.1 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Merge changes from current as of 20200406

Revision 1.1.2.2 / (download) - annotate - [select for diffs], Sat Feb 29 20:18:17 2020 UTC (2 years, 10 months ago) by ad
Branch: ad-namecache
Changes since 1.1.2.1: +142 -0 lines
Diff to previous 1.1.2.1 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Sync with head.

Revision 1.1.6.1, Sat Feb 15 08:16:10 2020 UTC (2 years, 11 months ago) by martin
Branch: phil-wifi
Changes since 1.1: +0 -142 lines
FILE REMOVED

file cpu_subr.c was added on branch phil-wifi on 2020-04-08 14:07:27 +0000

Revision 1.1.2.1, Sat Feb 15 08:16:10 2020 UTC (2 years, 11 months ago) by ad
Branch: ad-namecache
Changes since 1.1: +0 -142 lines
FILE REMOVED

file cpu_subr.c was added on branch ad-namecache on 2020-02-29 20:18:17 +0000

Revision 1.1 / (download) - annotate - [select for diffs], Sat Feb 15 08:16:10 2020 UTC (2 years, 11 months ago) by skrll
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, ad-namecache-base3
Branch point for: thorpej-futex, phil-wifi, ad-namecache

Various updates and improvements to cpu start up on arm/aarch64

- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
  drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
  - a static cpu_info_store array
  - the same arm_cpu_{hatched,mbox}

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