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CVS log for src/sys/arch/arm/arm/armv6_start.S

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Request diff between arbitrary revisions


Default branch: MAIN


Revision 1.14.2.1 / (download) - annotate - [select for diffs], Mon Jul 31 13:44:16 2023 UTC (7 months ago) by martin
Branch: netbsd-9
Changes since 1.14: +6 -1 lines
Diff to previous 1.14 (colored) next main 1.15 (colored)

Pull up following revision(s) (requested by riastradh in ticket #1676):

	sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
	sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
	sys/arch/aarch64/aarch64/locore.S: revision 1.91
	sys/arch/mips/include/asm.h: revision 1.74
	sys/arch/hppa/include/cpu.h: revision 1.13
	sys/arch/arm/arm/armv6_start.S: revision 1.38
	sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
	sys/arch/mips/mips/locore.S: revision 1.229
	sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
	sys/arch/alpha/include/asm.h: revision 1.45
	sys/arch/sparc64/sparc64/locore.s: revision 1.432
	sys/arch/vax/vax/subr.S: revision 1.42
	sys/arch/mips/mips/locore_mips3.S: revision 1.116
	sys/arch/ia64/ia64/machdep.c: revision 1.44
	sys/arch/arm/arm32/cpuswitch.S: revision 1.106
	sys/arch/sparc/sparc/locore.s: revision 1.284
	(all via patch)

aarch64: Add missing barriers in cpu_switchto.
Details in comments.

Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.

PR kern/57240

alpha: Add missing barriers in cpu_switchto.
Details in comments.

arm32: Add missing barriers in cpu_switchto.
Details in comments.

hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?

ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)

mips: Add missing barriers in cpu_switchto.
Details in comments.

powerpc: Add missing barriers in cpu_switchto.
Details in comments.

sparc: Add missing barriers in cpu_switchto.

sparc64: Add missing barriers in cpu_switchto.
Details in comments.

vax: Note where cpu_switchto needs barriers.

Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.

Revision 1.37.4.1 / (download) - annotate - [select for diffs], Mon Jul 31 13:36:31 2023 UTC (7 months ago) by martin
Branch: netbsd-10
CVS Tags: netbsd-10-0-RC5, netbsd-10-0-RC4, netbsd-10-0-RC3, netbsd-10-0-RC2, netbsd-10-0-RC1
Changes since 1.37: +6 -1 lines
Diff to previous 1.37 (colored) next main 1.38 (colored)

Pull up following revision(s) (requested by riastradh in ticket #264):

	sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
	sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
	sys/arch/aarch64/aarch64/locore.S: revision 1.91
	sys/arch/mips/include/asm.h: revision 1.74
	sys/arch/hppa/include/cpu.h: revision 1.13
	sys/arch/arm/arm/armv6_start.S: revision 1.38
	sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
	sys/arch/mips/mips/locore.S: revision 1.229
	sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
	sys/arch/alpha/include/asm.h: revision 1.45
	sys/arch/sparc64/sparc64/locore.s: revision 1.432
	sys/arch/vax/vax/subr.S: revision 1.42
	sys/arch/mips/mips/locore_mips3.S: revision 1.116
	sys/arch/riscv/riscv/cpu_switch.S: revision 1.3
	sys/arch/ia64/ia64/machdep.c: revision 1.44
	sys/arch/arm/arm32/cpuswitch.S: revision 1.106
	sys/arch/sparc/sparc/locore.s: revision 1.284

aarch64: Add missing barriers in cpu_switchto.
Details in comments.

Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.

PR kern/57240

alpha: Add missing barriers in cpu_switchto.
Details in comments.

arm32: Add missing barriers in cpu_switchto.
Details in comments.

hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?

ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)

mips: Add missing barriers in cpu_switchto.
Details in comments.

powerpc: Add missing barriers in cpu_switchto.
Details in comments.

riscv: Add missing barriers in cpu_switchto.
Details in comments.

sparc: Add missing barriers in cpu_switchto.

sparc64: Add missing barriers in cpu_switchto.
Details in comments.

vax: Note where cpu_switchto needs barriers.

Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.

Revision 1.38 / (download) - annotate - [select for diffs], Thu Feb 23 14:55:24 2023 UTC (12 months, 1 week ago) by riastradh
Branch: MAIN
CVS Tags: triaxx-drm, thorpej-ifq-base, thorpej-ifq, thorpej-altq-separation-base, thorpej-altq-separation, HEAD
Changes since 1.37: +6 -1 lines
Diff to previous 1.37 (colored)

arm32: Add missing barriers in cpu_switchto.

Details in comments.

PR kern/57240

XXX pullup-8
XXX pullup-9
XXX pullup-10

Revision 1.37 / (download) - annotate - [select for diffs], Sun Nov 14 16:56:32 2021 UTC (2 years, 3 months ago) by riastradh
Branch: MAIN
CVS Tags: netbsd-10-base, bouyer-sunxi-drm-base, bouyer-sunxi-drm
Branch point for: netbsd-10
Changes since 1.36: +3 -3 lines
Diff to previous 1.36 (colored)

arm: Fix CPU startup synchronization.

- Use load-acquire instead of (wrong) membar_consumer then load in
  cpu_boot_secondary_processors and cpu_hatched_p.

  => (Could use load then membar_consumer instead but load-acquire is
     shorter.)

- Issue  dmb ish  before setting or clearing the bit in
  cpu_set_hatched and cpu_clr_mbox to effect a store-release.

  => (Could use membar_exit, which is semantically weaker than  dmb ish
     but on arm is just implemented as  dmb ish.)

  => (Could use stlr except we don't have atomic_ops(9) to do that.)

This way, everything before cpu_set_hatched or cpu_clr_mbox is
guaranteed to happen before everything after
cpu_boot_secondary_processors, which was previously not guaranteed.

Revision 1.36 / (download) - annotate - [select for diffs], Sun Sep 12 07:14:50 2021 UTC (2 years, 5 months ago) by skrll
Branch: MAIN
Changes since 1.35: +9 -1 lines
Diff to previous 1.35 (colored)

More debug.

Revision 1.35 / (download) - annotate - [select for diffs], Mon Aug 2 12:56:22 2021 UTC (2 years, 7 months ago) by andvar
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-futex2-base, thorpej-futex2
Changes since 1.34: +2 -2 lines
Diff to previous 1.34 (colored)

fix various typos in comments and log messages.

Revision 1.30.2.2 / (download) - annotate - [select for diffs], Sat Apr 3 22:28:16 2021 UTC (2 years, 11 months ago) by thorpej
Branch: thorpej-futex
Changes since 1.30.2.1: +3 -3 lines
Diff to previous 1.30.2.1 (colored) next main 1.31 (colored)

Sync with HEAD.

Revision 1.34 / (download) - annotate - [select for diffs], Wed Jan 27 13:50:17 2021 UTC (3 years, 1 month ago) by skrll
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex-base, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.33: +3 -3 lines
Diff to previous 1.33 (colored)

Trailing whitespace... heh

Revision 1.30.2.1 / (download) - annotate - [select for diffs], Mon Dec 14 14:37:47 2020 UTC (3 years, 2 months ago) by thorpej
Branch: thorpej-futex
Changes since 1.30: +13 -3 lines
Diff to previous 1.30 (colored)

Sync w/ HEAD.

Revision 1.33 / (download) - annotate - [select for diffs], Tue Dec 1 13:11:55 2020 UTC (3 years, 3 months ago) by skrll
Branch: MAIN
Changes since 1.32: +2 -4 lines
Diff to previous 1.32 (colored)

Simplify the simplification... basically always set sctlr.u before setting
cpsr.e

Revision 1.32 / (download) - annotate - [select for diffs], Tue Dec 1 08:35:31 2020 UTC (3 years, 3 months ago) by skrll
Branch: MAIN
Changes since 1.31: +5 -6 lines
Diff to previous 1.31 (colored)

Simplify previous

Revision 1.31 / (download) - annotate - [select for diffs], Tue Dec 1 02:46:19 2020 UTC (3 years, 3 months ago) by rin
Branch: MAIN
Changes since 1.30: +16 -3 lines
Diff to previous 1.30 (colored)

Fix earmv6{,hf}eb start-up routines:

- Turn on U-bit in SCTLR before E-bit is turned on by ``setend be'',
  in order to avoid undefined condition. ARM1176JZF-S, at least, halts
  if only E-bit is turned on.

- Turn on EE-bit in SCTLR instead of B-bit as we've switched to BE8.

Revision 1.30 / (download) - annotate - [select for diffs], Tue Oct 13 21:06:18 2020 UTC (3 years, 4 months ago) by skrll
Branch: MAIN
Branch point for: thorpej-futex
Changes since 1.29: +1 -3 lines
Diff to previous 1.29 (colored)

Remove some XXXNHs

Revision 1.29 / (download) - annotate - [select for diffs], Tue Sep 22 00:55:08 2020 UTC (3 years, 5 months ago) by mrg
Branch: MAIN
Changes since 1.28: +9 -2 lines
Diff to previous 1.28 (colored)

swp is only useful on armv7 uni-processor systems.

we will need the emulation if we want to run old binaries..

Revision 1.28 / (download) - annotate - [select for diffs], Mon Sep 21 21:26:43 2020 UTC (3 years, 5 months ago) by mrg
Branch: MAIN
Changes since 1.27: +2 -1 lines
Diff to previous 1.27 (colored)

turn on CPU_CONTROL_SWP_ENABLE.

this allows armv[67] systems to use 'swp' and 'swpb' instructions,
which means they can run armv[45] software.

arm recommends ldrex/strex for armv6 and newer, and it is not
present in armv8 at all or some armv7.  we emulate it on armv8 and
need to add emulation for the some armv7.  using the hardware is
going to be faster, so, enable this path too.

ok jmcneill.

Revision 1.27 / (download) - annotate - [select for diffs], Fri Aug 28 13:36:52 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.26: +2 -5 lines
Diff to previous 1.26 (colored)

Some KASAN fixes and tweaks

- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
  INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
  arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on

Revision 1.26 / (download) - annotate - [select for diffs], Fri Aug 28 13:15:05 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.25: +1 -16 lines
Diff to previous 1.25 (colored)

Use C rather than assembly

Revision 1.25 / (download) - annotate - [select for diffs], Fri Aug 28 13:00:29 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.24: +8 -2 lines
Diff to previous 1.24 (colored)

Change to the KVA stack address straight after the MMU is turned on

Revision 1.24 / (download) - annotate - [select for diffs], Fri Aug 28 12:56:19 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.23: +16 -16 lines
Diff to previous 1.23 (colored)

#ifdef -> #if defined

Revision 1.23 / (download) - annotate - [select for diffs], Fri Aug 28 11:15:08 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.22: +1 -3 lines
Diff to previous 1.22 (colored)

arm_cpu_topology_set only takes two arguments

Revision 1.22 / (download) - annotate - [select for diffs], Tue Aug 25 15:03:48 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.21: +10 -2 lines
Diff to previous 1.21 (colored)

More debug

Revision 1.21 / (download) - annotate - [select for diffs], Sun Jul 19 11:47:47 2020 UTC (3 years, 7 months ago) by skrll
Branch: MAIN
Changes since 1.20: +2 -2 lines
Diff to previous 1.20 (colored)

Fix RPI boot which needs more early stack

XXX centralise INIT_ARM_STACK_{SHIFT,SIZE}
XXX how to protect against this breaking again?

Revision 1.20 / (download) - annotate - [select for diffs], Fri Jul 10 12:25:08 2020 UTC (3 years, 7 months ago) by skrll
Branch: MAIN
Changes since 1.19: +11 -1 lines
Diff to previous 1.19 (colored)

Add support for KASAN on ARMv[67]

Thanks to maxv for many pointers and reviews.

Revision 1.19 / (download) - annotate - [select for diffs], Thu Jul 9 11:40:54 2020 UTC (3 years, 7 months ago) by skrll
Branch: MAIN
Changes since 1.18: +1 -10 lines
Diff to previous 1.18 (colored)

Remove some newlines

Revision 1.18 / (download) - annotate - [select for diffs], Wed Jul 8 10:17:59 2020 UTC (3 years, 7 months ago) by skrll
Branch: MAIN
Changes since 1.17: +3 -1 lines
Diff to previous 1.17 (colored)

Use the stack provided by armv6_start.S rather than svcstk.  This saves
some bss too.

Revision 1.17 / (download) - annotate - [select for diffs], Fri Jul 3 06:15:27 2020 UTC (3 years, 8 months ago) by skrll
Branch: MAIN
Changes since 1.16: +5 -2 lines
Diff to previous 1.16 (colored)

Wrap a comment

Revision 1.12.4.4 / (download) - annotate - [select for diffs], Mon Apr 13 08:03:32 2020 UTC (3 years, 10 months ago) by martin
Branch: phil-wifi
Changes since 1.12.4.3: +2 -2 lines
Diff to previous 1.12.4.3 (colored) to branchpoint 1.12 (colored) next main 1.13 (colored)

Mostly merge changes from HEAD upto 20200411

Revision 1.12.4.3 / (download) - annotate - [select for diffs], Wed Apr 8 14:07:27 2020 UTC (3 years, 10 months ago) by martin
Branch: phil-wifi
Changes since 1.12.4.2: +59 -20 lines
Diff to previous 1.12.4.2 (colored) to branchpoint 1.12 (colored)

Merge changes from current as of 20200406

Revision 1.16 / (download) - annotate - [select for diffs], Fri Mar 20 19:48:03 2020 UTC (3 years, 11 months ago) by skrll
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh
Changes since 1.15: +5 -5 lines
Diff to previous 1.15 (colored)

Really use armv7 noncache memory attribute for early kernel mapping and
not SO

Revision 1.14.4.1 / (download) - annotate - [select for diffs], Sat Feb 29 20:18:17 2020 UTC (4 years ago) by ad
Branch: ad-namecache
Changes since 1.14: +55 -16 lines
Diff to previous 1.14 (colored) next main 1.15 (colored)

Sync with head.

Revision 1.15 / (download) - annotate - [select for diffs], Sat Feb 15 08:16:10 2020 UTC (4 years ago) by skrll
Branch: MAIN
CVS Tags: is-mlppp-base, is-mlppp, ad-namecache-base3
Changes since 1.14: +55 -16 lines
Diff to previous 1.14 (colored)

Various updates and improvements to cpu start up on arm/aarch64

- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
  drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
  - a static cpu_info_store array
  - the same arm_cpu_{hatched,mbox}

Revision 1.14 / (download) - annotate - [select for diffs], Wed Jun 12 06:53:21 2019 UTC (4 years, 8 months ago) by skrll
Branch: MAIN
CVS Tags: phil-wifi-20191119, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, ad-namecache-base2, ad-namecache-base1, ad-namecache-base
Branch point for: netbsd-9, ad-namecache
Changes since 1.13: +2 -2 lines
Diff to previous 1.13 (colored)

Comment fix

Revision 1.13 / (download) - annotate - [select for diffs], Wed Jun 12 06:51:31 2019 UTC (4 years, 8 months ago) by skrll
Branch: MAIN
Changes since 1.12: +2 -2 lines
Diff to previous 1.12 (colored)

Debug output improvement

Revision 1.12.4.2 / (download) - annotate - [select for diffs], Mon Jun 10 22:05:51 2019 UTC (4 years, 8 months ago) by christos
Branch: phil-wifi
Changes since 1.12.4.1: +1127 -0 lines
Diff to previous 1.12.4.1 (colored) to branchpoint 1.12 (colored)

Sync with HEAD

Revision 1.12.4.1, Mon Apr 8 07:35:32 2019 UTC (4 years, 10 months ago) by christos
Branch: phil-wifi
Changes since 1.12: +0 -1127 lines
FILE REMOVED

file armv6_start.S was added on branch phil-wifi on 2019-06-10 22:05:51 +0000

Revision 1.12 / (download) - annotate - [select for diffs], Mon Apr 8 07:35:32 2019 UTC (4 years, 10 months ago) by skrll
Branch: MAIN
CVS Tags: phil-wifi-20190609, isaki-audio2-base, isaki-audio2
Branch point for: phil-wifi
Changes since 1.11: +5 -2 lines
Diff to previous 1.11 (colored)

Fix a comment.

Revision 1.11 / (download) - annotate - [select for diffs], Thu Apr 4 14:24:20 2019 UTC (4 years, 11 months ago) by skrll
Branch: MAIN
Changes since 1.10: +93 -65 lines
Diff to previous 1.10 (colored)

Restructure so that storing of uboot args (including FDT address) and
virtual to physical offset is done after armv[67]_init where we ensure
MMU and caches are off, and cache is invalidated.

Revision 1.10 / (download) - annotate - [select for diffs], Wed Apr 3 17:55:27 2019 UTC (4 years, 11 months ago) by skrll
Branch: MAIN
Changes since 1.9: +10 -10 lines
Diff to previous 1.9 (colored)

Debug output alignment

Revision 1.9 / (download) - annotate - [select for diffs], Tue Apr 2 20:00:36 2019 UTC (4 years, 11 months ago) by jmcneill
Branch: MAIN
Changes since 1.8: +2 -2 lines
Diff to previous 1.8 (colored)

Whitespace police

Revision 1.8 / (download) - annotate - [select for diffs], Sat Feb 9 07:20:21 2019 UTC (5 years ago) by skrll
Branch: MAIN
Changes since 1.7: +2 -2 lines
Diff to previous 1.7 (colored)

Typo in comment

Revision 1.7 / (download) - annotate - [select for diffs], Sat Feb 9 07:19:02 2019 UTC (5 years ago) by skrll
Branch: MAIN
Changes since 1.6: +4 -1 lines
Diff to previous 1.6 (colored)

Print revidr of BP as well as APs

Revision 1.6 / (download) - annotate - [select for diffs], Wed Feb 6 14:12:25 2019 UTC (5 years ago) by skrll
Branch: MAIN
Changes since 1.5: +17 -17 lines
Diff to previous 1.5 (colored)

Don't VPRINTF until we have stack for our CPU setup properly

Revision 1.1.2.3 / (download) - annotate - [select for diffs], Fri Jan 18 08:50:14 2019 UTC (5 years, 1 month ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.1.2.2: +72 -55 lines
Diff to previous 1.1.2.2 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Synch with HEAD

Revision 1.5 / (download) - annotate - [select for diffs], Thu Jan 3 10:26:41 2019 UTC (5 years, 2 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-compat-20190127, pgoyette-compat-20190118
Changes since 1.4: +63 -29 lines
Diff to previous 1.4 (colored)

Start CPUs more like aarch64 by using a cpu_mpidr array (if populated)
to map MPIDRs to an index for each CPU.

Towards big.LITTLE support.

Revision 1.4 / (download) - annotate - [select for diffs], Wed Jan 2 16:27:04 2019 UTC (5 years, 2 months ago) by skrll
Branch: MAIN
Changes since 1.3: +3 -2 lines
Diff to previous 1.3 (colored)

Whitespace

Revision 1.3 / (download) - annotate - [select for diffs], Wed Jan 2 16:17:15 2019 UTC (5 years, 2 months ago) by skrll
Branch: MAIN
Changes since 1.2: +9 -27 lines
Diff to previous 1.2 (colored)

Misc. tidyup

Revision 1.2 / (download) - annotate - [select for diffs], Wed Jan 2 14:31:33 2019 UTC (5 years, 2 months ago) by skrll
Branch: MAIN
Changes since 1.1: +2 -2 lines
Diff to previous 1.1 (colored)

Fix a ASEND

Revision 1.1.2.2 / (download) - annotate - [select for diffs], Sat Oct 20 06:58:24 2018 UTC (5 years, 4 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.1.2.1: +1076 -0 lines
Diff to previous 1.1.2.1 (colored) to branchpoint 1.1 (colored)

Sync with head

Revision 1.1.2.1, Thu Oct 18 09:01:52 2018 UTC (5 years, 4 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.1: +0 -1076 lines
FILE REMOVED

file armv6_start.S was added on branch pgoyette-compat on 2018-10-20 06:58:24 +0000

Revision 1.1 / (download) - annotate - [select for diffs], Thu Oct 18 09:01:52 2018 UTC (5 years, 4 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020
Branch point for: pgoyette-compat

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors.  AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested.  Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

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