CVS log for src/sys/arch/arm/allwinner/Attic/awin_mmc.c

Up to [cvs.NetBSD.org] / src / sys / arch / arm / allwinner

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Keyword substitution: kv
Default branch: MAIN

Sync with HEAD, resolve some conflicts

Remove old Allwinner port.

update from HEAD

Sync with HEAD (as of 26th Dec)

Pull up following revision(s) (requested by bouyer in ticket #1043):
	sys/arch/arm/allwinner/awin_mmc.c: revision 1.23 via patch
Wait 20ms for the PLL to stabilize after enabling it.
Fixes occasional bogus size report for my SD card.

Wait 20ms for the PLL to stabilize after enabling it.
Fixes occasional bogus size report for my SD card.

Pull up following revision(s) (requested by bouyer in ticket #1006):
	sys/arch/arm/allwinner/awin_mmc.c: revision 1.22
Avoid a divide by 0 when unplugging a sd card.

Pull up following revision(s) (requested by bouyer in ticket #1006):
	sys/arch/arm/allwinner/awin_mmc.c: revision 1.22
Avoid a divide by 0 when unplugging a sd card.

Avoid a divide by 0 when unplugging a sd card.

Sync with HEAD

don't need a full reset to recover from errors, only DMA and FIFO resets

Sync with HEAD

fix typo

Initialize AWIN_MMC_TIMEOUT reg, return ETIMEDOUT on cmd timeout, fix SCF_RSP_BSY handling, specify pullup and drv level on A80 pinsets, report MMC_OCR_HSC

ensure module clk is initialized before attaching

A80 MMC support. Works for SD card slot on Cubie4, but not eMMC yet.

Pull up following revision(s) (requested by jmcneill in ticket #294):
	sys/arch/arm/allwinner/awin_mmc.c: revision 1.16
	sys/arch/arm/allwinner/awin_board.c: revision 1.29
	sys/arch/arm/allwinner/awin_reg.h: revision 1.55,1.57
Add mixer processor regs.
-
Fix some mixer processor definitions, add A31 PLL6 cfg lock bit and
some extra SD CLK bits for A31, when enabling pll, wait for pll to
become stable before returning
-
Clock fixes:
 - Don't rely on U-boot to enable AHB gating
 - Instead of always running at 100MHz (!), calculate proper clk dividers.
 - Replace PLL6 parsing code with a call to awin_pll6_get_rate()

Clock fixes:

 - Don't rely on U-boot to enable AHB gating
 - Instead of always running at 100MHz (!), calculate proper clk dividers.
 - Replace PLL6 parsing code with a call to awin_pll6_get_rate()

Catch up to -current as of ~1 hour ago for sys/arch/arm/allwinner and
sys/arch/evbarm/awin. Requested by skrll in ticket #203.

ensure software reset signal is de-asserted on A31

fix AWIN_MMC_FTRGLEVEL for A31

correct a typo in sd clk reg offsets for mmc>0 and dont bother with pll6_enable

Work-in-progress support for the AllWinner A31 SoC.

Use SDn_CLK_REG instead of MMC_CLKCR to setup bus clock; gives a nearly 2x boost in performance in HS mode. Also, make sure to setup PLL6 before probing clocks.

Make sure the data in the descritors is little endian.

if "dma" property is set to false, fallback to pio mode

do BUS_DMASYNC_POSTWRITE after transfer completes

eliminate most of the polling from awin_mmc_exec_command

use dma for mmc data transfers

replace mmc magic bits with symbolic names

Pull up following revision(s) (requested by skrll in ticket #57):
	sys/arch/arm/allwinner/awin_reg.h: revision 1.15
	sys/arch/arm/allwinner/awin_mmc.c: revision 1.4
Correct the mmc clock.  Banana Pi can now find an SD card.

Correct the mmc clock.  Banana Pi can now find an SD card.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Merge cubie support from HEAD

file awin_mmc.c was added on branch tls-maxphys on 2014-08-20 00:02:44 +0000

file awin_mmc.c was added on branch yamt-pagecache on 2014-05-22 11:39:30 +0000

file awin_mmc.c was added on branch rmind-smpnet on 2014-05-18 17:44:56 +0000

file awin_mmc.c was added on branch matt-nb5-mips64 on 2014-03-24 18:43:15 +0000

implement card detect

blink status LED during data transfers

Add Allwinner SD/MMC driver. No DMA yet.