CVS log for src/sys/arch/arm/acpi/files.acpi

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arm: acpi: Add support for SMCCC based PCI config access.

Sync w/ HEAD.

acpicpu: Add support for ACPI P-states and T-states on Arm.

Support early FB console attachment when booting with a devicetree
(non-ACPI mode). Inform the pciconf code about the framebuffer to
prevent pciconf from changing resources out from under us when framebuffer
memory is in VRAM.

Mostly merge changes from HEAD upto 20200411

Merge changes from current as of 20200406

Sync with head.

Add support for NXP Layerscape PCIe Gen4 (not ECAM compliant)

Sync with head.

Add support for Arm N1 SDP PCIe host controller.

The N1 SDP has a few bugs that we need to work around:
 - PCIe root port config space lives in a non-standard location.
 - Access to PCIe config space of devices that do not exist results in
   an sync SError. Firmware creates a "known devices" table at a fixed
   physical address that we use to filter PCI conf access to only known
   devices.

This change splits the Arm ACPI PCI quirks into separate files for each
host controller, and allows per-segment quirks to be applied.

These changes exposed some bugs in the MI ACPI layer related to
multi-segment support. The MI ACPI PCI code was using a shared PCI
chipset tag to access devices, and these accesses can happen before our
PCI host bridge drivers are attached! The global chipset tag is now gone,
and an MD callback can provide a custom tag on a per-segment basis.

Pull up following revision(s) (requested by jmcneill in ticket #334):

	sys/arch/arm/cortex/gic_v2m.c: revision 1.7
	sys/arch/arm/acpi/gicv3_acpi.c: revision 1.5
	sys/arch/arm/acpi/files.acpi: revision 1.8
	sys/arch/arm/acpi/gic_acpi.c: revision 1.4
	sys/arch/arm/cortex/files.cortex: revision 1.13
	sys/arch/arm/acpi/gic_v2m_acpi.c: revision 1.1
	sys/arch/arm/acpi/gic_v2m_acpi.h: revision 1.1
	sys/arch/arm/cortex/gic_v2m.h: revision 1.2

Add support for Amazon's Graviton MSI controller.

Graviton has a GICv3 with a modified GICv2m (!) for MSIs. Instead of
sending messages to a fixed address with the SPI as data, the Graviton's
GICv2m uses a different address for each vector with "don't care" as data.

Add support for Amazon's Graviton MSI controller.

Graviton has a GICv3 with a modified GICv2m (!) for MSIs. Instead of
sending messages to a fixed address with the SPI as data, the Graviton's
GICv2m uses a different address for each vector with "don't care" as data.

Pull up following revision(s) (requested by jmcneill in ticket #231):

	sys/arch/arm/acpi/acpi_platform.c: revision 1.18
	sys/arch/arm/acpi/files.acpi: revision 1.7
	sys/arch/arm/acpi/acpi_simplefb.c: revision 1.1
	sys/arch/arm/acpi/acpi_simplefb.h: revision 1.1

Use vcons for simplefb preattach to speed up early console messages.

Use vcons for simplefb preattach to speed up early console messages.

Sync with HEAD

Sync with HEAD, resolve a few conflicts

file files.acpi was added on branch phil-wifi on 2019-06-10 22:05:50 +0000

Add support for decoding PCI ID mappings using IO remapping tables (IORT).

Sync with HEAD, resolve a couple of conflicts

Support building kernels with ACPI and no PCI.

Add driver for ARM Server Base System Architecture (SBSA)-compliant
generic watchdog timers.

Add GICv3 ACPI attachment glue.

Sync with head

file files.acpi was added on branch pgoyette-compat on 2018-10-20 06:58:24 +0000

Add ARM ACPI PCI support.

Add ACPI platform glue and basic device drivers (CPU, GIC, Generic Timer,
SBSA UART).