CVS log for src/sys/arch/arm/acpi/acpi_pci_machdep.h

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arm: acpi: Add support for SMCCC based PCI config access.

Mostly merge changes from HEAD upto 20200411

Sync with head.

Add support for NXP Layerscape PCIe Gen4 (not ECAM compliant)

Sync with head.

Add support for Arm N1 SDP PCIe host controller.

The N1 SDP has a few bugs that we need to work around:
 - PCIe root port config space lives in a non-standard location.
 - Access to PCIe config space of devices that do not exist results in
   an sync SError. Firmware creates a "known devices" table at a fixed
   physical address that we use to filter PCI conf access to only known
   devices.

This change splits the Arm ACPI PCI quirks into separate files for each
host controller, and allows per-segment quirks to be applied.

These changes exposed some bugs in the MI ACPI layer related to
multi-segment support. The MI ACPI PCI code was using a shared PCI
chipset tag to access devices, and these accesses can happen before our
PCI host bridge drivers are attached! The global chipset tag is now gone,
and an MD callback can provide a custom tag on a per-segment basis.

Pull up following revision(s) (requested by jmcneill in ticket #332):

	sys/arch/arm/acpi/acpipchb.c: revision 1.10
	sys/arch/arm/acpi/acpipchb.c: revision 1.11
	sys/arch/arm/acpi/acpipchb.c: revision 1.12
	sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.3
	sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.4
	sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.10
	sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.11

Add quirks for Amazon Graviton PCIe root ports. Configuration space for the
root port is found in a child AMZN0001 resource, not the MCFG table.

 -

More Amazon Graviton quirks:
 - Ignore devno > 0 on the PCIe root port.
 - Fixup PCIe bridge bus number register on the root port.
 - Move quirk handling to acpipchb so it can be applied before the bus
   is configured.

 -

Fix detection of root port resources for Graviton and remove no longer required bridge fixup

Amazon Graviton maxdevs quirk no longer required as of pci.c r1.155

More Amazon Graviton quirks:
 - Ignore devno > 0 on the PCIe root port.
 - Fixup PCIe bridge bus number register on the root port.
 - Move quirk handling to acpipchb so it can be applied before the bus
   is configured.

Add quirks for Amazon Graviton PCIe root ports. Configuration space for the
root port is found in a child AMZN0001 resource, not the MCFG table.

Sync with HEAD

Sync with head

file acpi_pci_machdep.h was added on branch phil-wifi on 2019-06-10 22:05:50 +0000

file acpi_pci_machdep.h was added on branch pgoyette-compat on 2018-10-20 06:58:24 +0000

Add support for PCI Segment Groups.

Add ARM ACPI PCI support.