CVS log for src/sys/arch/arm/acpi/acpi_pci_graviton.c
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Keyword substitution: kv
Default branch: MAIN
Revision 1.5: download - view: text, markup, annotated - select for diffs
Sat Oct 15 11:07:38 2022 UTC (2 years, 3 months ago) by jmcneill
Branches: MAIN
CVS tags: thorpej-ifq-base,
thorpej-ifq,
thorpej-altq-separation-base,
thorpej-altq-separation,
perseant-exfatfs-base-20240630,
perseant-exfatfs-base,
perseant-exfatfs,
netbsd-10-base,
netbsd-10-1-RELEASE,
netbsd-10-0-RELEASE,
netbsd-10-0-RC6,
netbsd-10-0-RC5,
netbsd-10-0-RC4,
netbsd-10-0-RC3,
netbsd-10-0-RC2,
netbsd-10-0-RC1,
netbsd-10,
HEAD
Diff to: previous 1.4: preferred, colored
Changes since revision 1.4: +3 -3
lines
Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings
Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
Revision 1.4: download - view: text, markup, annotated - select for diffs
Sat Oct 24 07:08:22 2020 UTC (4 years, 2 months ago) by skrll
Branches: MAIN
CVS tags: thorpej-i2c-spi-conf2-base,
thorpej-i2c-spi-conf2,
thorpej-i2c-spi-conf-base,
thorpej-i2c-spi-conf,
thorpej-futex2-base,
thorpej-futex2,
thorpej-futex-base,
thorpej-futex,
thorpej-cfargs2-base,
thorpej-cfargs2,
thorpej-cfargs-base,
thorpej-cfargs,
cjep_sun2x-base1,
cjep_sun2x-base,
cjep_sun2x,
cjep_staticlib_x-base1,
cjep_staticlib_x-base,
cjep_staticlib_x,
bouyer-sunxi-drm-base,
bouyer-sunxi-drm
Diff to: previous 1.3: preferred, colored
Changes since revision 1.3: +4 -4
lines
Trailing whitespace
Revision 1.3: download - view: text, markup, annotated - select for diffs
Wed Jun 17 06:45:09 2020 UTC (4 years, 7 months ago) by thorpej
Branches: MAIN
Diff to: previous 1.2: preferred, colored
Changes since revision 1.2: +2 -3
lines
<sys/extent.h> not needed here.
Revision 1.2: download - view: text, markup, annotated - select for diffs
Mon Jun 15 18:57:39 2020 UTC (4 years, 7 months ago) by ad
Branches: MAIN
Diff to: previous 1.1: preferred, colored
Changes since revision 1.1: +4 -5
lines
Use sys/cpu.h so that curcpu defined in terms of curlwp->l_cpu works too.
Revision 1.1.6.2: download - view: text, markup, annotated - select for diffs
Wed Apr 8 14:07:27 2020 UTC (4 years, 9 months ago) by martin
Branches: phil-wifi
Diff to: previous 1.1.6.1: preferred, colored; branchpoint 1.1: preferred, colored; next MAIN 1.2: preferred, colored
Changes since revision 1.1.6.1: +144 -0
lines
Merge changes from current as of 20200406
Revision 1.1.2.2: download - view: text, markup, annotated - select for diffs
Fri Jan 17 21:47:23 2020 UTC (5 years ago) by ad
Branches: ad-namecache
Diff to: previous 1.1.2.1: preferred, colored; branchpoint 1.1: preferred, colored; next MAIN 1.2: preferred, colored
Changes since revision 1.1.2.1: +144 -0
lines
Sync with head.
Revision 1.1.6.1
Fri Jan 17 17:06:33 2020 UTC (5 years ago) by martin
Branches: phil-wifi
FILE REMOVED
Changes since revision 1.1: +0 -144
lines
file acpi_pci_graviton.c was added on branch phil-wifi on 2020-04-08 14:07:27 +0000
Revision 1.1.2.1
Fri Jan 17 17:06:33 2020 UTC (5 years ago) by ad
Branches: ad-namecache
FILE REMOVED
Changes since revision 1.1: +0 -144
lines
file acpi_pci_graviton.c was added on branch ad-namecache on 2020-01-17 21:47:23 +0000
Revision 1.1: download - view: text, markup, annotated - select for diffs
Fri Jan 17 17:06:33 2020 UTC (5 years ago) by jmcneill
Branches: MAIN
CVS tags: phil-wifi-20200421,
phil-wifi-20200411,
phil-wifi-20200406,
is-mlppp-base,
is-mlppp,
bouyer-xenpvh-base2,
bouyer-xenpvh-base1,
bouyer-xenpvh-base,
bouyer-xenpvh,
ad-namecache-base3,
ad-namecache-base2,
ad-namecache-base1
Branch point for: phil-wifi,
ad-namecache
Add support for Arm N1 SDP PCIe host controller.
The N1 SDP has a few bugs that we need to work around:
- PCIe root port config space lives in a non-standard location.
- Access to PCIe config space of devices that do not exist results in
an sync SError. Firmware creates a "known devices" table at a fixed
physical address that we use to filter PCI conf access to only known
devices.
This change splits the Arm ACPI PCI quirks into separate files for each
host controller, and allows per-segment quirks to be applied.
These changes exposed some bugs in the MI ACPI layer related to
multi-segment support. The MI ACPI PCI code was using a shared PCI
chipset tag to access devices, and these accesses can happen before our
PCI host bridge drivers are attached! The global chipset tag is now gone,
and an MD callback can provide a custom tag on a per-segment basis.
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