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CVS log for src/sys/arch/amd64/stand/prekern/locore.S

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Default branch: MAIN


Revision 1.8.2.1 / (download) - annotate - [select for diffs], Mon Jun 10 22:05:47 2019 UTC (4 years, 10 months ago) by christos
Branch: phil-wifi
Changes since 1.8: +18 -17 lines
Diff to previous 1.8 (colored) next main 1.9 (colored)

Sync with HEAD

Revision 1.11 / (download) - annotate - [select for diffs], Tue Mar 19 19:15:57 2019 UTC (5 years, 1 month ago) by maxv
Branch: MAIN
CVS Tags: thorpej-ifq-base, thorpej-ifq, thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-futex, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, thorpej-altq-separation-base, thorpej-altq-separation, phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, phil-wifi-20191119, phil-wifi-20190609, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, netbsd-10-base, netbsd-10-0-RELEASE, netbsd-10-0-RC6, netbsd-10-0-RC5, netbsd-10-0-RC4, netbsd-10-0-RC3, netbsd-10-0-RC2, netbsd-10-0-RC1, netbsd-10, isaki-audio2-base, isaki-audio2, is-mlppp-base, is-mlppp, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, bouyer-sunxi-drm-base, bouyer-sunxi-drm, ad-namecache-base3, ad-namecache-base2, ad-namecache-base1, ad-namecache-base, ad-namecache, HEAD
Changes since 1.10: +4 -3 lines
Diff to previous 1.10 (colored)

Fix/remove some half-baked stuff I left in the prekern:

 - Page-align the idt store, to be extra sure.
 - Remove unneeded prototypes.
 - Drop the TSS, we don't care and aren't even using it.
 - Initialize %ss with a default value.
 - Fix three exception handlers, no need to push an error code.

No actual impact, because these things are used only when returning from
exceptions received in the prekern; these exceptions are not supposed to
be ever received, never are, and if they were we wouldn't return anyway.

Revision 1.10 / (download) - annotate - [select for diffs], Sat Mar 9 08:42:25 2019 UTC (5 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.9: +15 -15 lines
Diff to previous 1.9 (colored)

Start replacing the x86 PTE bits.

Revision 1.9 / (download) - annotate - [select for diffs], Thu Mar 7 13:26:24 2019 UTC (5 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.8: +4 -4 lines
Diff to previous 1.8 (colored)

Drop PG_RO, PG_KR and PG_PROT, they are useless and create confusion.

Revision 1.7.2.1 / (download) - annotate - [select for diffs], Mon Jun 25 07:25:38 2018 UTC (5 years, 9 months ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.7: +12 -12 lines
Diff to previous 1.7 (colored) next main 1.8 (colored)

Sync with HEAD

Revision 1.8 / (download) - annotate - [select for diffs], Fri May 25 16:01:31 2018 UTC (5 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625
Branch point for: phil-wifi
Changes since 1.7: +12 -12 lines
Diff to previous 1.7 (colored)

Hide a bunch of local symbols.

Revision 1.7 / (download) - annotate - [select for diffs], Fri Dec 22 07:37:27 2017 UTC (6 years, 3 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-base, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315
Branch point for: pgoyette-compat
Changes since 1.6: +6 -7 lines
Diff to previous 1.6 (colored)

Sync comments with reality.

Revision 1.6.2.2 / (download) - annotate - [select for diffs], Sun Dec 3 11:35:48 2017 UTC (6 years, 4 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.6.2.1: +639 -0 lines
Diff to previous 1.6.2.1 (colored) to branchpoint 1.6 (colored) next main 1.7 (colored)

update from HEAD

Revision 1.6.2.1, Sun Nov 26 10:21:20 2017 UTC (6 years, 4 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.6: +0 -639 lines
FILE REMOVED

file locore.S was added on branch tls-maxphys on 2017-12-03 11:35:48 +0000

Revision 1.6 / (download) - annotate - [select for diffs], Sun Nov 26 10:21:20 2017 UTC (6 years, 4 months ago) by maxv
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202
Branch point for: tls-maxphys
Changes since 1.5: +14 -3 lines
Diff to previous 1.5 (colored)

Add rdrand.

Revision 1.5 / (download) - annotate - [select for diffs], Tue Nov 14 13:58:07 2017 UTC (6 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.4: +3 -3 lines
Diff to previous 1.4 (colored)

Remove XXX: set FRAMESIZE to the kernel value. Verily I don't understand
why we are doing that in the non-kaslr kernels, but let's just reproduce
the behavior.

jump_kernel is changed to use callq, so that the stack alignment is
preserved.

Revision 1.4 / (download) - annotate - [select for diffs], Fri Nov 10 08:05:38 2017 UTC (6 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.3: +28 -1 lines
Diff to previous 1.3 (colored)

Add cpuid and rdseed.

Revision 1.3 / (download) - annotate - [select for diffs], Sun Oct 29 11:28:30 2017 UTC (6 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.2: +4 -3 lines
Diff to previous 1.2 (colored)

Randomize the kernel segments independently. That is to say, put text,
rodata and data at different addresses (and in a random order).

To achieve that, the mapping order in the prekern is changed. Until now,
we were creating the kernel map the following way:
	-> choose a random VA
	-> map [kernpa_start; kernpa_end[ at this VA
	-> parse the ELF structures from there
	-> determine where exactly the kernel segments are located
	-> relocate etc
Now, we are doing:
	-> create a read-only view of [kernpa_start; kernpa_end[
	-> from this view, compute the size of the "head" region
	-> choose a random VA in the HEAD window, and map the head there
	-> for each region in (text, rodata, data, boot)
		-> compute the size of the region from the RO view
		-> choose a random VA in the KASLR window
		-> map the region there
	-> relocate etc

Each time we map a region, we initialize its bootspace fields right away.

The "head" region must be put before the other regions in memory, because
the kernel uses (headva + sh_offset) to get the addresses of the symbols,
and the offset is unsigned.

Given that the head does not have an mcmodel constraint, its location is
randomized in a window located below the KASLR window.

The rest of the regions being in the same window, we need to detect
collisions.

Note that the module map is embedded in the "boot" region, and that
therefore its location is randomized too.

Revision 1.2 / (download) - annotate - [select for diffs], Wed Oct 11 16:18:11 2017 UTC (6 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.1: +3 -5 lines
Diff to previous 1.1 (colored)

Remove this #if, these options belong to the kernel and not the prekern.
No real change since eblob is always here. And I was apparently drunk
when writing some comments.

Revision 1.1 / (download) - annotate - [select for diffs], Tue Oct 10 09:29:14 2017 UTC (6 years, 6 months ago) by maxv
Branch: MAIN

Add the amd64 prekern. It is a kernel relocator used for Kernel ASLR (see
tech-kern@). It works, but is not yet linked to the build system, because
I can't build a distribution right now.

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