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Default branch: MAIN
Revision 1.55 / (download) - annotate - [select for diffs], Sat Jul 30 14:11:00 2022 UTC (19 months, 4 weeks ago) by riastradh
Branch: MAIN
CVS Tags: thorpej-ifq-base,
thorpej-ifq,
thorpej-altq-separation-base,
thorpej-altq-separation,
netbsd-10-base,
netbsd-10-0-RELEASE,
netbsd-10-0-RC6,
netbsd-10-0-RC5,
netbsd-10-0-RC4,
netbsd-10-0-RC3,
netbsd-10-0-RC2,
netbsd-10-0-RC1,
netbsd-10,
bouyer-sunxi-drm-base,
bouyer-sunxi-drm,
HEAD
Changes since 1.54: +1 -2
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Diff to previous 1.54 (colored) to selected 1.27 (colored)
x86: Eliminate mfence hotpatch for membar_sync. The more-compatible LOCK ADD $0,-N(%rsp) turns out to be cheaper than MFENCE anyway. Let's save some space and maintenance and rip out the hotpatching for it.
Revision 1.54 / (download) - annotate - [select for diffs], Sat Apr 9 12:07:00 2022 UTC (23 months, 2 weeks ago) by riastradh
Branch: MAIN
Changes since 1.53: +2 -3
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Diff to previous 1.53 (colored) to selected 1.27 (colored)
x86: Every load is a load-acquire, so membar_consumer is a noop. lfence is only needed for MD logic, such as operations on I/O memory rather than normal cacheable memory, or special instructions like RDTSC -- never for MI synchronization between threads/CPUs. No need for hot-patching to do lfence here. (The x86_lfence function might reasonably be patched on i386 to do lfence for MD logic, but it isn't now and this doesn't change that.)
Revision 1.53 / (download) - annotate - [select for diffs], Sat Apr 17 20:12:55 2021 UTC (2 years, 11 months ago) by rillig
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base,
thorpej-i2c-spi-conf2,
thorpej-i2c-spi-conf-base,
thorpej-i2c-spi-conf,
thorpej-futex2-base,
thorpej-futex2,
thorpej-cfargs2-base,
thorpej-cfargs2,
cjep_sun2x-base1,
cjep_sun2x-base,
cjep_sun2x,
cjep_staticlib_x-base1,
cjep_staticlib_x-base,
cjep_staticlib_x
Changes since 1.52: +2 -2
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Diff to previous 1.52 (colored) to selected 1.27 (colored)
sys/arch/amd64: remove trailing whitespace
Revision 1.52 / (download) - annotate - [select for diffs], Sun Jul 19 07:35:08 2020 UTC (3 years, 8 months ago) by maxv
Branch: MAIN
CVS Tags: thorpej-futex-base,
thorpej-futex,
thorpej-cfargs-base,
thorpej-cfargs
Changes since 1.51: +1 -23
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Diff to previous 1.51 (colored) to selected 1.27 (colored)
Revert most of ad's movs/stos change. Instead do a lot simpler: declare svs_quad_copy() used by SVS only, with no need for instrumentation, because SVS is disabled when sanitizers are on.
Revision 1.51 / (download) - annotate - [select for diffs], Sun Jun 21 16:53:37 2020 UTC (3 years, 9 months ago) by bouyer
Branch: MAIN
Changes since 1.50: +2 -2
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Diff to previous 1.50 (colored) to selected 1.27 (colored)
Fix comment
Revision 1.50 / (download) - annotate - [select for diffs], Mon Jun 1 22:58:06 2020 UTC (3 years, 9 months ago) by ad
Branch: MAIN
Changes since 1.49: +24 -1
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Diff to previous 1.49 (colored) to selected 1.27 (colored)
Reported-by: syzbot+6dd5a230d19f0cbc7814@syzkaller.appspotmail.com Instrument STOS/MOVS for KMSAN to unbreak it.
Revision 1.49 / (download) - annotate - [select for diffs], Sun Apr 26 14:49:17 2020 UTC (3 years, 11 months ago) by maxv
Branch: MAIN
Changes since 1.48: +3 -1
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Diff to previous 1.48 (colored) to selected 1.27 (colored)
Use the hotpatch framework for LFENCE/MFENCE.
Revision 1.48 / (download) - annotate - [select for diffs], Sat Apr 25 15:26:16 2020 UTC (3 years, 11 months ago) by bouyer
Branch: MAIN
Changes since 1.47: +13 -1
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Diff to previous 1.47 (colored) to selected 1.27 (colored)
Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM guests in GENERIC. Xen support can be disabled at runtime with boot -c disable hypervisor
Revision 1.38.2.2 / (download) - annotate - [select for diffs], Mon Apr 13 08:03:30 2020 UTC (3 years, 11 months ago) by martin
Branch: phil-wifi
Changes since 1.38.2.1: +91 -3
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Diff to previous 1.38.2.1 (colored) to branchpoint 1.38 (colored) next main 1.39 (colored) to selected 1.27 (colored)
Mostly merge changes from HEAD upto 20200411
Revision 1.47.6.1 / (download) - annotate - [select for diffs], Sat Apr 11 10:11:30 2020 UTC (3 years, 11 months ago) by bouyer
Branch: bouyer-xenpvh
Changes since 1.47: +13 -1
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Diff to previous 1.47 (colored) next main 1.48 (colored) to selected 1.27 (colored)
Include ci_isources[] for XenPV too. Adjust spllower() to XenPV needs, and switch XenPV to the native spllower(). Remove xen_spllower().
Revision 1.47 / (download) - annotate - [select for diffs], Sun Nov 17 14:07:00 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20200421,
phil-wifi-20200411,
phil-wifi-20200406,
phil-wifi-20191119,
is-mlppp-base,
is-mlppp,
bouyer-xenpvh-base2,
bouyer-xenpvh-base1,
bouyer-xenpvh-base,
ad-namecache-base3,
ad-namecache-base2,
ad-namecache-base1,
ad-namecache-base,
ad-namecache
Branch point for: bouyer-xenpvh
Changes since 1.46: +12 -1
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Diff to previous 1.46 (colored) to selected 1.27 (colored)
Disable KCOV - by raising the interrupt level - in the TLB IPI handler, because this is only noise.
Revision 1.46 / (download) - annotate - [select for diffs], Thu Nov 14 16:23:52 2019 UTC (4 years, 4 months ago) by maxv
Branch: MAIN
Changes since 1.45: +66 -3
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Diff to previous 1.45 (colored) to selected 1.27 (colored)
Add support for Kernel Memory Sanitizer (kMSan). It detects uninitialized memory used by the kernel at run time, and just like kASan and kCSan, it is an excellent feature. It has already detected 38 uninitialized variables in the kernel during my testing, which I have since discreetly fixed. We use two shadows: - "shad", to track uninitialized memory with a bit granularity (1:1). Each bit set to 1 in the shad corresponds to one uninitialized bit of real kernel memory. - "orig", to track the origin of the memory with a 4-byte granularity (1:1). Each uint32_t cell in the orig indicates the origin of the associated uint32_t of real kernel memory. The memory consumption of these shadows is consequent, so at least 4GB of RAM is recommended to run kMSan. The compiler inserts calls to specific __msan_* functions on each memory access, to manage both the shad and the orig and detect uninitialized memory accesses that change the execution flow (like an "if" on an uninitialized variable). We mark as uninit several types of memory buffers (stack, pools, kmem, malloc, uvm_km), and check each buffer passed to copyout, copyoutstr, bwrite, if_transmit_lock and DMA operations, to detect uninitialized memory that leaves the system. This allows us to detect kernel info leaks in a way that is more efficient and also more user-friendly than KLEAK. Contrary to kASan, kMSan requires comprehensive coverage, ie we cannot tolerate having one non-instrumented function, because this could cause false positives. kMSan cannot instrument ASM functions, so I converted most of them to __asm__ inlines, which kMSan is able to instrument. Those that remain receive special treatment. Contrary to kASan again, kMSan uses a TLS, so we must context-switch this TLS during interrupts. We use different contexts depending on the interrupt level. The orig tracks precisely the origin of a buffer. We use a special encoding for the orig values, and pack together in each uint32_t cell of the orig: - a code designating the type of memory (Stack, Pool, etc), and - a compressed pointer, which points either (1) to a string containing the name of the variable associated with the cell, or (2) to an area in the kernel .text section which we resolve to a symbol name + offset. This encoding allows us not to consume extra memory for associating information with each cell, and produces a precise output, that can tell for example the name of an uninitialized variable on the stack, the function in which it was pushed on the stack, and the function where we accessed this uninitialized variable. kMSan is available with LLVM, but not with GCC. The code is organized in a way that is similar to kASan and kCSan, so it means that other architectures than amd64 can be supported.
Revision 1.45 / (download) - annotate - [select for diffs], Sat Oct 12 06:31:03 2019 UTC (4 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.44: +15 -1
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Diff to previous 1.44 (colored) to selected 1.27 (colored)
Rewrite the FPU code on x86. This greatly simplifies the logic and removes the dependency on IPL_HIGH. NVMM is updated accordingly. Posted on port-amd64 a week ago. Bump the kernel version to 9.99.16.
Revision 1.38.2.1 / (download) - annotate - [select for diffs], Mon Jun 10 22:05:47 2019 UTC (4 years, 9 months ago) by christos
Branch: phil-wifi
Changes since 1.38: +40 -7
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Diff to previous 1.38 (colored) to selected 1.27 (colored)
Sync with HEAD
Revision 1.44 / (download) - annotate - [select for diffs], Sat May 18 13:32:12 2019 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20190609,
netbsd-9-base,
netbsd-9-3-RELEASE,
netbsd-9-2-RELEASE,
netbsd-9-1-RELEASE,
netbsd-9-0-RELEASE,
netbsd-9-0-RC2,
netbsd-9-0-RC1,
netbsd-9
Changes since 1.43: +5 -5
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Diff to previous 1.43 (colored) to selected 1.27 (colored)
Two changes in the CPU mitigations: * Micro-optimize: put every mitigation in the same branch. This removes two branches in each exc/int return path, and removes all branches in the syscall return path. * Modify the SpectreV2 mitigation to be compatible with SpectreV4. I recently realized that both couldn't be enabled at the same time on Intel. This is because initially, when there was just SpectreV2, we could reset the whole IA32_SPEC_CTRL MSR. But then Intel added another bit in it for SpectreV4, so it isn't right to reset it entirely anymore. SSBD needs to stay.
Revision 1.20.32.4 / (download) - annotate - [select for diffs], Tue May 14 17:12:19 2019 UTC (4 years, 10 months ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-2-RELEASE,
netbsd-8-1-RELEASE,
netbsd-8-1-RC1
Changes since 1.20.32.3: +14 -1
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Diff to previous 1.20.32.3 (colored) to branchpoint 1.20 (colored) next main 1.21 (colored) to selected 1.27 (colored)
Pull up following revision(s) (requested by maxv in ticket #1269): sys/arch/amd64/amd64/locore.S: revision 1.181 (adapted) sys/arch/amd64/amd64/amd64_trap.S: revision 1.47 (adapted) sys/arch/x86/include/specialreg.h: revision 1.144 (adapted) sys/arch/amd64/include/frameasm.h: revision 1.43 (adapted) sys/arch/x86/x86/spectre.c: revision 1.27 (adapted) Mitigation for INTEL-SA-00233: Microarchitectural Data Sampling (MDS). It requires a microcode update, now available on the Intel website. The microcode modifies the behavior of the VERW instruction, and makes it flush internal CPU buffers. We hotpatch the return-to-userland path to add VERW. Two sysctls are added: machdep.mds.mitigated = {0/1} user-settable machdep.mds.method = {string} constructed by the kernel The kernel will automatically enable the mitigation if the updated microcode is present. If the new microcode is not present, the user can load it via cpuctl, and set machdep.mds.mitigated=1.
Revision 1.43 / (download) - annotate - [select for diffs], Tue May 14 16:59:25 2019 UTC (4 years, 10 months ago) by maxv
Branch: MAIN
Changes since 1.42: +14 -1
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Diff to previous 1.42 (colored) to selected 1.27 (colored)
Mitigation for INTEL-SA-00233: Microarchitectural Data Sampling (MDS). It requires a microcode update, now available on the Intel website. The microcode modifies the behavior of the VERW instruction, and makes it flush internal CPU buffers. We hotpatch the return-to-userland path to add VERW. Two sysctls are added: machdep.mds.mitigated = {0/1} user-settable machdep.mds.method = {string} constructed by the kernel The kernel will automatically enable the mitigation if the updated microcode is present. If the new microcode is not present, the user can load it via cpuctl, and set machdep.mds.mitigated=1.
Revision 1.42 / (download) - annotate - [select for diffs], Mon Feb 11 14:59:32 2019 UTC (5 years, 1 month ago) by cherry
Branch: MAIN
CVS Tags: isaki-audio2-base,
isaki-audio2
Changes since 1.41: +3 -3
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Diff to previous 1.41 (colored) to selected 1.27 (colored)
We reorganise definitions for XEN source support as follows: XEN - common sources required for baseline XEN support. XENPV - sources required for support of XEN in PV mode. XENPVHVM - sources required for support for XEN in HVM mode. XENPVH - sources required for support for XEN in PVH mode.
Revision 1.37.2.3 / (download) - annotate - [select for diffs], Thu Sep 6 06:55:24 2018 UTC (5 years, 6 months ago) by pgoyette
Branch: pgoyette-compat
CVS Tags: pgoyette-compat-merge-20190127
Changes since 1.37.2.2: +2 -2
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Diff to previous 1.37.2.2 (colored) to branchpoint 1.37 (colored) next main 1.38 (colored) to selected 1.27 (colored)
Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes)
Revision 1.41 / (download) - annotate - [select for diffs], Sun Aug 12 13:31:16 2018 UTC (5 years, 7 months ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-20190127,
pgoyette-compat-20190118,
pgoyette-compat-1226,
pgoyette-compat-1126,
pgoyette-compat-1020,
pgoyette-compat-0930,
pgoyette-compat-0906
Changes since 1.40: +2 -2
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Diff to previous 1.40 (colored) to selected 1.27 (colored)
Move the PCPU area from slot 384 to slot 510, to avoid creating too much fragmentation in the slot space (384 is in the middle of the kernel half of the VA).
Revision 1.37.2.2 / (download) - annotate - [select for diffs], Sat Jul 28 04:37:26 2018 UTC (5 years, 8 months ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.37.2.1: +21 -1
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Diff to previous 1.37.2.1 (colored) to branchpoint 1.37 (colored) to selected 1.27 (colored)
Sync with HEAD
Revision 1.40 / (download) - annotate - [select for diffs], Fri Jul 13 14:11:02 2018 UTC (5 years, 8 months ago) by martin
Branch: MAIN
CVS Tags: pgoyette-compat-0728
Changes since 1.39: +3 -1
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Diff to previous 1.39 (colored) to selected 1.27 (colored)
Provide empty SVS_ENTER_NMI/SVS_LEAVE_NMI for kernels w/o options SVS
Revision 1.39 / (download) - annotate - [select for diffs], Thu Jul 12 19:48:16 2018 UTC (5 years, 8 months ago) by maxv
Branch: MAIN
Changes since 1.38: +19 -1
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Diff to previous 1.38 (colored) to selected 1.27 (colored)
Handle NMIs correctly when SVS is enabled. We store the kernel's CR3 at the top of the NMI stack, and we unconditionally switch to it, because we don't know with which page tables we received the NMI. Hotpatch the whole thing as usual. This restores the ability to use PMCs on Intel CPUs.
Revision 1.20.32.3 / (download) - annotate - [select for diffs], Sat Apr 14 10:11:49 2018 UTC (5 years, 11 months ago) by martin
Branch: netbsd-8
CVS Tags: netbsd-8-0-RELEASE,
netbsd-8-0-RC2,
netbsd-8-0-RC1
Changes since 1.20.32.2: +12 -1
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Diff to previous 1.20.32.2 (colored) to branchpoint 1.20 (colored) to selected 1.27 (colored)
Pullup the following revisions via patch, requested by maxv in ticket #748: sys/arch/amd64/amd64/copy.S 1.29 (adapted, via patch) sys/arch/amd64/amd64/amd64_trap.S 1.16,1.19 (partial) (via patch) sys/arch/amd64/amd64/trap.c 1.102,1.106 (partial),1.110 (via patch) sys/arch/amd64/include/frameasm.h 1.22,1.24 (via patch) sys/arch/x86/x86/cpu.c 1.137 (via patch) sys/arch/x86/x86/patch.c 1.23,1.26 (partial) (via patch) Backport of SMAP support.
Revision 1.37.2.1 / (download) - annotate - [select for diffs], Fri Mar 30 06:20:11 2018 UTC (6 years ago) by pgoyette
Branch: pgoyette-compat
Changes since 1.37: +24 -1
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Diff to previous 1.37 (colored) to selected 1.27 (colored)
Resolve conflicts between branch and HEAD
Revision 1.38 / (download) - annotate - [select for diffs], Wed Mar 28 16:02:49 2018 UTC (6 years ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-base,
pgoyette-compat-0625,
pgoyette-compat-0521,
pgoyette-compat-0502,
pgoyette-compat-0422,
pgoyette-compat-0415,
pgoyette-compat-0407,
pgoyette-compat-0330
Branch point for: phil-wifi
Changes since 1.37: +24 -1
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Diff to previous 1.37 (colored) to selected 1.27 (colored)
Add the IBRS mitigation for SpectreV2 on amd64. Different operations are performed during context transitions: user->kernel: IBRS <- 1 kernel->user: IBRS <- 0 And during context switches: user->user: IBPB <- 0 kernel->user: IBPB <- 0 [user->kernel:IBPB <- 0 this one may not be needed] We use two macros, IBRS_ENTER and IBRS_LEAVE, to set the IBRS bit. The thing is hotpatched for better performance, like SVS. The idea is that IBRS is a "privileged" bit, which is set to 1 in kernel mode and 0 in user mode. To protect the branch predictor between user processes (which are of the same privilege), we use the IBPB barrier. The Intel manual also talks about (MWAIT/HLT)+HyperThreading, and says that when using either of the two instructions IBRS must be disabled for better performance on the core. I'm not totally sure about this part, so I'm not adding it now. IBRS is available only when the Intel microcode update is applied. The mitigation must be enabled manually with machdep.spectreV2.mitigated. Tested by msaitoh a week ago (but I adapted a few things since). Probably more changes to come.
Revision 1.20.32.2 / (download) - annotate - [select for diffs], Thu Mar 22 16:59:03 2018 UTC (6 years ago) by martin
Branch: netbsd-8
Changes since 1.20.32.1: +69 -8
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Pull up the following revisions, requested by maxv in ticket #652: sys/arch/amd64/amd64/amd64_trap.S upto 1.39 (partial, patch) sys/arch/amd64/amd64/db_machdep.c 1.6 (patch) sys/arch/amd64/amd64/genassym.cf 1.65,1.66,1.67 (patch) sys/arch/amd64/amd64/locore.S upto 1.159 (partial, patch) sys/arch/amd64/amd64/machdep.c 1.299-1.302 (patch) sys/arch/amd64/amd64/trap.c upto 1.113 (partial, patch) sys/arch/amd64/amd64/amd64/vector.S upto 1.61 (partial, patch) sys/arch/amd64/conf/GENERIC 1.477,1.478 (patch) sys/arch/amd64/conf/kern.ldscript 1.26 (patch) sys/arch/amd64/include/frameasm.h upto 1.37 (partial, patch) sys/arch/amd64/include/param.h 1.25 (patch) sys/arch/amd64/include/pmap.h 1.41,1.43,1.44 (patch) sys/arch/x86/conf/files.x86 1.91,1.93 (patch) sys/arch/x86/include/cpu.h 1.88,1.89 (patch) sys/arch/x86/include/pmap.h 1.75 (patch) sys/arch/x86/x86/cpu.c 1.144,1.146,1.148,1.149 (patch) sys/arch/x86/x86/pmap.c upto 1.289 (partial, patch) sys/arch/x86/x86/vm_machdep.c 1.31,1.32 (patch) sys/arch/x86/x86/x86_machdep.c 1.104,1.106,1.108 (patch) sys/arch/x86/x86/svs.c 1.1-1.14 sys/arch/xen/conf/files.compat 1.30 (patch) Backport SVS. Not enabled yet.
Revision 1.20.32.1 / (download) - annotate - [select for diffs], Wed Mar 7 14:50:57 2018 UTC (6 years ago) by martin
Branch: netbsd-8
Changes since 1.20: +4 -19
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Pull up the following revisions (via patch), requested by maxv in ticket #610: sys/arch/amd64/amd64/amd64_trap.S 1.8,1.10,1.12 (partial),1.13-1.15, 1.19 (partial),1.20,1.21,1.22,1.24 (via patch) sys/arch/amd64/amd64/locore.S 1.129 (partial),1.132 (via patch) sys/arch/amd64/amd64/trap.c 1.97 (partial),1.111 (via patch) sys/arch/amd64/amd64/vector.S 1.54,1.55 (via patch) sys/arch/amd64/include/frameasm.h 1.21,1.23 (via patch) sys/arch/x86/x86/cpu.c 1.138 (via patch) sys/arch/xen/conf/Makefile.xen 1.45 (via patch) Rename and reorder several things in amd64_trap.S. Compile amd64_trap.S as a file. Introduce nmitrap and doubletrap. Have the CPU clear PSL_D automatically in the syscall entry point.
Revision 1.37 / (download) - annotate - [select for diffs], Sun Feb 25 13:14:27 2018 UTC (6 years, 1 month ago) by maxv
Branch: MAIN
CVS Tags: pgoyette-compat-base,
pgoyette-compat-0322,
pgoyette-compat-0315
Branch point for: pgoyette-compat
Changes since 1.36: +4 -8
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Diff to previous 1.36 (colored) to selected 1.27 (colored)
Remove INTRENTRY_L, it's not used anymore.
Revision 1.36 / (download) - annotate - [select for diffs], Thu Feb 22 10:42:11 2018 UTC (6 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.35: +17 -9
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Make the machdep.svs_enabled sysctl writable, and add the kernel code needed to disable SVS at runtime. We set 'svs_enabled' to false, and hotpatch the kernel entry/exit points to eliminate the context switch code. We need to make sure there is no remote CPU that is executing the code we are hotpatching. So we use two barriers: * After the first one each CPU is guaranteed to be executing in svs_disable_cpu with interrupts disabled (this way it can't leave this place). * After the second one it is guaranteed that SVS is disabled, so we flush the cache, enable interrupts and continue execution normally. Between the two barriers, cpu0 will disable SVS (svs_enabled=false and hotpatch), and each CPU will restore the generic syscall entry point. Three notes: * We should call svs_pgg_update(true) afterwards, to put back PG_G on the kernel pages (for better performance). This will be done in another commit. * The fact that we disable interrupts does not prevent us from receiving an NMI, and it would be problematic. So we need to add some code to verify that PMCs are disabled before hotpatching. This will be done in another commit. * In svs_disable() we expect each CPU to be online. We need to add a check to make sure they indeed are. The sysctl allows only a 1->0 transition. There is no point in doing 0->1 transitions anyway, and it would be complicated to implement because we need to re-synchronize the CPU user page tables with the current ones (we lost track of them in the last 1->0 transition).
Revision 1.35 / (download) - annotate - [select for diffs], Thu Feb 22 08:56:51 2018 UTC (6 years, 1 month ago) by maxv
Branch: MAIN
Changes since 1.34: +22 -20
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Add a dynamic detection for SVS. The SVS_* macros are now compiled as skip-noopt. When the system boots, if the cpu is from Intel, they are hotpatched to their real content. Typically: jmp 1f int3 int3 int3 ... int3 ... 1: gets hotpatched to: movq SVS_UTLS+UTLS_KPDIRPA,%rax movq %rax,%cr3 movq CPUVAR(KRSP0),%rsp These two chunks of code being of the exact same size. We put int3 (0xCC) to make sure we never execute there. In the non-SVS (ie non-Intel) case, all it costs is one jump. Given that the SVS_* macros are small, this jump will likely leave us in the same icache line, so it's pretty fast. The syscall entry point is special, because there we use a scratch uint64_t not in curcpu but in the UTLS page, and it's difficult to hotpatch this properly. So instead of hotpatching we declare the entry point as an ASM macro, and define two functions: syscall and syscall_svs, the latter being the one used in the SVS case. While here 'syscall' is optimized not to contain an SVS_ENTER - this way we don't even need to do a jump on the non-SVS case. When adding pages in the user page tables, make sure we don't have PG_G, now that it's dynamic. A read-only sysctl is added, machdep.svs_enabled, that tells whether the kernel uses SVS or not. More changes to come, svs_init() is not very clean.
Revision 1.34 / (download) - annotate - [select for diffs], Sat Jan 27 18:27:08 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.33: +2 -3
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Put the default %cs value in INTR_RECURSE_HWFRAME. Pushing an immediate costs less than reading the %cs register and pushing its value. This value is not allowed to be != GSEL(GCODE_SEL,SEL_KPL) in all cases.
Revision 1.33 / (download) - annotate - [select for diffs], Sat Jan 27 18:17:57 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.32: +6 -1
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Diff to previous 1.32 (colored) to selected 1.27 (colored)
Declare and use INTR_RECURSE_ENTRY, an optimized version of INTRENTRY. When processing deferred interrupts, we are always entering the new handler in kernel mode, so there is no point performing the userland checks. Saves several instructions.
Revision 1.32 / (download) - annotate - [select for diffs], Sat Jan 27 08:12:27 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.31: +1 -7
lines
Diff to previous 1.31 (colored) to selected 1.27 (colored)
Remove DO_DEFERRED_SWITCH and DO_DEFERRED_SWITCH_RETRY, unused.
Revision 1.31 / (download) - annotate - [select for diffs], Sun Jan 21 11:21:40 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.30: +4 -1
lines
Diff to previous 1.30 (colored) to selected 1.27 (colored)
Unmap the kernel from userland in SVS, and leave only the needed trampolines. As explained below, SVS should now completely mitigate Meltdown on GENERIC kernels, even though it needs some more tweaking for GENERIC_KASLR. Until now the kernel entry points looked like: FUNC(intr) pushq $ERR pushq $TRAPNO INTRENTRY ... handle interrupt ... INTRFASTEXIT END(intr) With this change they are split and become: FUNC(handle) ... handle interrupt ... INTRFASTEXIT END(handle) TEXT_USER_BEGIN FUNC(intr) pushq $ERR pushq $TRAPNO INTRENTRY jmp handle END(intr) TEXT_USER_END A new section is introduced, .text.user, that contains minimal kernel entry/exit points. In order to choose what to put in this section, two macros are introduced, TEXT_USER_BEGIN and TEXT_USER_END. The section is mapped in userland with normal 4K pages. In GENERIC, the section is 4K-page-aligned and embedded in .text, which is mapped with large pages. That is to say, when an interrupt comes in, the CPU has the user page tables loaded and executes the 'intr' functions on 4K pages; after calling SVS_ENTER (in INTRENTRY) these 4K pages become 2MB large pages, and remain so when executing in kernel mode. In GENERIC_KASLR, the section is 4K-page-aligned and independent from the other kernel texts. The prekern just picks it up and maps it at a random address. In GENERIC, SVS should now completely mitigate Meltdown: what we put in .text.user is not secret. In GENERIC_KASLR, SVS would have to be improved a bit more: the 'jmp handle' instruction is actually secret, since it leaks the address of the section we are jumping into. By exploiting Meltdown on Intel, this theoretically allows a local user to reconstruct the address of the first text section. But given that our KASLR produces several texts, and that each section is not correlated with the others, the level of protection KASLR provides is still good.
Revision 1.30 / (download) - annotate - [select for diffs], Sat Jan 20 14:39:21 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.29: +3 -3
lines
Diff to previous 1.29 (colored) to selected 1.27 (colored)
Use .pushsection/.popsection, we will soon embed macros in several layers of nested sections.
Revision 1.29 / (download) - annotate - [select for diffs], Thu Jan 18 07:25:34 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.28: +34 -21
lines
Diff to previous 1.28 (colored) to selected 1.27 (colored)
Unmap the kernel heap from the user page tables (SVS). This implementation is optimized and organized in such a way that we don't need to copy the kernel stack to a safe place during user<->kernel transitions. We create two VAs that point to the same physical page; one will be mapped in userland and is offset in order to contain only the trapframe, the other is mapped in the kernel and maps the entire stack. Sent on tech-kern@ a week ago.
Revision 1.28 / (download) - annotate - [select for diffs], Thu Jan 11 09:00:04 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.27: +13 -1
lines
Diff to previous 1.27 (colored)
Declare new SVS_* variants: SVS_ENTER_NOSTACK and SVS_LEAVE_NOSTACK. Use SVS_ENTER_NOSTACK in the syscall entry point, and put it before the code that touches curlwp. (curlwp is located in the direct map.) Then, disable __HAVE_CPU_UAREA_ROUTINES (to be removed later). This moves the kernel stack into pmap_kernel(), and not the direct map. That's a change I've always wanted to make: because of the direct map we can't add a redzone on the stack, and basically, a stack overflow can go very far in memory without being detected (as far as erasing all of the system's memory). Finally, unmap the direct map from userland.
Revision 1.27 / (download) - annotate - [selected], Sun Jan 7 16:10:16 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.26: +19 -1
lines
Diff to previous 1.26 (colored)
Add a new option, SVS (for Separate Virtual Space), that unmaps kernel pages when running in userland. For now, only the PTE area is unmapped. Sent on tech-kern@.
Revision 1.26 / (download) - annotate - [select for diffs], Sun Jan 7 13:43:23 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.25: +5 -4
lines
Diff to previous 1.25 (colored) to selected 1.27 (colored)
Switch x86_retpatch[] -> HOTPATCH().
Revision 1.25 / (download) - annotate - [select for diffs], Sun Jan 7 13:15:23 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.24: +2 -1
lines
Diff to previous 1.24 (colored) to selected 1.27 (colored)
Switch x86_lockpatch[] -> HOTPATCH().
Revision 1.24 / (download) - annotate - [select for diffs], Sun Jan 7 12:42:46 2018 UTC (6 years, 2 months ago) by maxv
Branch: MAIN
Changes since 1.23: +21 -2
lines
Diff to previous 1.23 (colored) to selected 1.27 (colored)
Implement a real hotpatch feature. Define a HOTPATCH() macro, that puts a label and additional information in the new .rodata.hotpatch kernel section. In patch.c, scan the section and patch what needs to be. Now it is possible to hotpatch the content of a macro. SMAP is switched to use this new system; this saves a call+ret in each kernel entry/exit point. Many other operating systems do the same.
Revision 1.20.2.1 / (download) - annotate - [select for diffs], Sun Dec 3 11:35:47 2017 UTC (6 years, 3 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.20: +5 -13
lines
Diff to previous 1.20 (colored) next main 1.21 (colored) to selected 1.27 (colored)
update from HEAD
Revision 1.23 / (download) - annotate - [select for diffs], Tue Oct 17 07:33:44 2017 UTC (6 years, 5 months ago) by maxv
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202
Changes since 1.22: +3 -3
lines
Diff to previous 1.22 (colored) to selected 1.27 (colored)
Have the cpu clear PSL_D automatically when entering the kernel via a syscall. Then, don't clear PSL_D and PSL_AC in the syscall entry point, they are now both cleared by the cpu (faster). However they still need to be manually cleared in the interrupt/trap entry points.
Revision 1.22 / (download) - annotate - [select for diffs], Tue Oct 17 06:58:15 2017 UTC (6 years, 5 months ago) by maxv
Branch: MAIN
Changes since 1.21: +3 -2
lines
Diff to previous 1.21 (colored) to selected 1.27 (colored)
Add support for SMAP on amd64. PSL_AC is cleared from %rflags in each kernel entry point. In the copy sections, a copy window is opened and the kernel can touch userland pages. This window is closed when the kernel is done, either at the end of the copy sections or in the fault-recover functions. This implementation is not optimized yet, due to the fact that INTRENTRY is a macro, and we can't hotpatch macros. Sent on tech-kern@ a month or two ago, tested on a Kabylake.
Revision 1.21 / (download) - annotate - [select for diffs], Fri Sep 15 17:32:12 2017 UTC (6 years, 6 months ago) by maxv
Branch: MAIN
Changes since 1.20: +2 -11
lines
Diff to previous 1.20 (colored) to selected 1.27 (colored)
Declare INTRFASTEXIT as a function, so that there is only one iretq in the kernel. Then, check %rip against the address of this iretq instead of disassembling (%rip) - which could fault again, or point at some random address which happens to contain the iretq opcode. The same is true for gs below, but I'll fix that in another commit.
Revision 1.16.2.2 / (download) - annotate - [select for diffs], Tue Oct 30 17:18:45 2012 UTC (11 years, 5 months ago) by yamt
Branch: yamt-pagecache
CVS Tags: yamt-pagecache-tag8
Changes since 1.16.2.1: +6 -4
lines
Diff to previous 1.16.2.1 (colored) to branchpoint 1.16 (colored) next main 1.17 (colored) to selected 1.27 (colored)
sync with head
Revision 1.20 / (download) - annotate - [select for diffs], Sun Jul 15 15:17:56 2012 UTC (11 years, 8 months ago) by dsl
Branch: MAIN
CVS Tags: yamt-pagecache-base9,
yamt-pagecache-base8,
yamt-pagecache-base7,
yamt-pagecache-base6,
tls-maxphys-base,
tls-earlyentropy-base,
tls-earlyentropy,
rmind-smpnet-nbase,
rmind-smpnet-base,
rmind-smpnet,
riastradh-xf86-video-intel-2-7-1-pre-2-21-15,
riastradh-drm2-base3,
riastradh-drm2-base2,
riastradh-drm2-base1,
riastradh-drm2-base,
riastradh-drm2,
prg-localcount2-base3,
prg-localcount2-base2,
prg-localcount2-base1,
prg-localcount2-base,
prg-localcount2,
pgoyette-localcount-base,
pgoyette-localcount-20170426,
pgoyette-localcount-20170320,
pgoyette-localcount-20170107,
pgoyette-localcount-20161104,
pgoyette-localcount-20160806,
pgoyette-localcount-20160726,
pgoyette-localcount,
perseant-stdc-iso10646-base,
perseant-stdc-iso10646,
nick-nhusb-base-20170825,
nick-nhusb-base-20170204,
nick-nhusb-base-20161204,
nick-nhusb-base-20161004,
nick-nhusb-base-20160907,
nick-nhusb-base-20160529,
nick-nhusb-base-20160422,
nick-nhusb-base-20160319,
nick-nhusb-base-20151226,
nick-nhusb-base-20150921,
nick-nhusb-base-20150606,
nick-nhusb-base-20150406,
nick-nhusb-base,
nick-nhusb,
netbsd-8-base,
netbsd-7-nhusb-base-20170116,
netbsd-7-nhusb-base,
netbsd-7-nhusb,
netbsd-7-base,
netbsd-7-2-RELEASE,
netbsd-7-1-RELEASE,
netbsd-7-1-RC2,
netbsd-7-1-RC1,
netbsd-7-1-2-RELEASE,
netbsd-7-1-1-RELEASE,
netbsd-7-1,
netbsd-7-0-RELEASE,
netbsd-7-0-RC3,
netbsd-7-0-RC2,
netbsd-7-0-RC1,
netbsd-7-0-2-RELEASE,
netbsd-7-0-1-RELEASE,
netbsd-7-0,
netbsd-7,
matt-nb8-mediatek-base,
matt-nb8-mediatek,
localcount-20160914,
khorben-n900,
jdolecek-ncq-base,
jdolecek-ncq,
bouyer-socketcan-base1,
bouyer-socketcan-base,
bouyer-socketcan,
agc-symver-base,
agc-symver
Branch point for: tls-maxphys,
netbsd-8
Changes since 1.19: +6 -4
lines
Diff to previous 1.19 (colored) to selected 1.27 (colored)
Rename MDP_IRET to MDL_IRET since it is an lwp flag, not a proc one. Add an MDL_COMPAT32 flag to the lwp's md_flags, set it for 32bit lwps and use it to force 'return to user' with iret (as is done when MDL_IRET is set). Split the iret/sysret code paths much later. Remove all the replicated code for 32bit system calls - which was only needed so that iret was always used. frameasm.h for XEN contains '#define swapgs', while XEN probable never needs swapgs, this is likely to be confusing. Add a SWAPGS which is a nop on XEN and swapgs otherwise. (I've not yet checked all the swapgs in files that include frameasm.h) Simple x86 programs still work. Hijack 6.99.9 kernel bump (needed for compat32 modules)
Revision 1.12.18.1 / (download) - annotate - [select for diffs], Tue Jun 12 20:44:07 2012 UTC (11 years, 9 months ago) by riz
Branch: netbsd-5-1
CVS Tags: netbsd-5-1-5-RELEASE,
netbsd-5-1-4-RELEASE,
netbsd-5-1-3-RELEASE
Changes since 1.12: +14 -8
lines
Diff to previous 1.12 (colored) next main 1.13 (colored) to selected 1.27 (colored)
Pull up following revision(s) (requested by spz in ticket #1772): sys/arch/amd64/amd64/trap.c: revision 1.71 via patch sys/arch/amd64/amd64/vector.S: revision 1.41 via patch sys/arch/amd64/include/frameasm.h: patch Treat traps in kernel mode during the 'return to user' iret sequence as user faults. Based heavily in the i386 code with the correct opcode bytes inserted. iret path tested, arranging for segment register errors is harder. User %fs and %gs (32bit apps) are loaded much earlier and any errors will generate kernel panics - there is probably code to try to stop the invalid values being set. If we get a fault setting the user %gs, or on a iret that is returning to userspace, we must do a 'swapgs' to reload the kernel %gs_base. Also save the %ds, %es, %fs, %gs selector values in the frame so they can be restored if we finally return to user (probably after an application SIGSEGV handler has fixed the error). Without this any such fault leaves the kernel running with the wrong %gs offset and it will most likely fault again early in trap(). Repeats until the stack tramples on something important. iret change works, invalid %gs is a little harder to arrange.
Revision 1.12.14.1 / (download) - annotate - [select for diffs], Tue Jun 12 20:43:59 2012 UTC (11 years, 9 months ago) by riz
Branch: netbsd-5-0
Changes since 1.12: +14 -8
lines
Diff to previous 1.12 (colored) next main 1.13 (colored) to selected 1.27 (colored)
Pull up following revision(s) (requested by spz in ticket #1772): sys/arch/amd64/amd64/trap.c: revision 1.71 via patch sys/arch/amd64/amd64/vector.S: revision 1.41 via patch sys/arch/amd64/include/frameasm.h: patch Treat traps in kernel mode during the 'return to user' iret sequence as user faults. Based heavily in the i386 code with the correct opcode bytes inserted. iret path tested, arranging for segment register errors is harder. User %fs and %gs (32bit apps) are loaded much earlier and any errors will generate kernel panics - there is probably code to try to stop the invalid values being set. If we get a fault setting the user %gs, or on a iret that is returning to userspace, we must do a 'swapgs' to reload the kernel %gs_base. Also save the %ds, %es, %fs, %gs selector values in the frame so they can be restored if we finally return to user (probably after an application SIGSEGV handler has fixed the error). Without this any such fault leaves the kernel running with the wrong %gs offset and it will most likely fault again early in trap(). Repeats until the stack tramples on something important. iret change works, invalid %gs is a little harder to arrange.
Revision 1.12.12.1 / (download) - annotate - [select for diffs], Tue Jun 12 20:43:47 2012 UTC (11 years, 9 months ago) by riz
Branch: netbsd-5
CVS Tags: netbsd-5-2-RELEASE,
netbsd-5-2-RC1,
netbsd-5-2-3-RELEASE,
netbsd-5-2-2-RELEASE,
netbsd-5-2-1-RELEASE,
netbsd-5-2
Changes since 1.12: +14 -8
lines
Diff to previous 1.12 (colored) next main 1.13 (colored) to selected 1.27 (colored)
Pull up following revision(s) (requested by spz in ticket #1772): sys/arch/amd64/amd64/trap.c: revision 1.71 via patch sys/arch/amd64/amd64/vector.S: revision 1.41 via patch sys/arch/amd64/include/frameasm.h: patch Treat traps in kernel mode during the 'return to user' iret sequence as user faults. Based heavily in the i386 code with the correct opcode bytes inserted. iret path tested, arranging for segment register errors is harder. User %fs and %gs (32bit apps) are loaded much earlier and any errors will generate kernel panics - there is probably code to try to stop the invalid values being set. If we get a fault setting the user %gs, or on a iret that is returning to userspace, we must do a 'swapgs' to reload the kernel %gs_base. Also save the %ds, %es, %fs, %gs selector values in the frame so they can be restored if we finally return to user (probably after an application SIGSEGV handler has fixed the error). Without this any such fault leaves the kernel running with the wrong %gs offset and it will most likely fault again early in trap(). Repeats until the stack tramples on something important. iret change works, invalid %gs is a little harder to arrange.
Revision 1.16.8.1 / (download) - annotate - [select for diffs], Sun Jun 3 21:45:10 2012 UTC (11 years, 9 months ago) by jdc
Branch: netbsd-6
CVS Tags: netbsd-6-1-RELEASE,
netbsd-6-1-RC4,
netbsd-6-1-RC3,
netbsd-6-1-RC2,
netbsd-6-1-RC1,
netbsd-6-1-5-RELEASE,
netbsd-6-1-4-RELEASE,
netbsd-6-1-3-RELEASE,
netbsd-6-1-2-RELEASE,
netbsd-6-1-1-RELEASE,
netbsd-6-1,
netbsd-6-0-RELEASE,
netbsd-6-0-RC2,
netbsd-6-0-RC1,
netbsd-6-0-6-RELEASE,
netbsd-6-0-5-RELEASE,
netbsd-6-0-4-RELEASE,
netbsd-6-0-3-RELEASE,
netbsd-6-0-2-RELEASE,
netbsd-6-0-1-RELEASE,
netbsd-6-0,
matt-nb6-plus-nbase,
matt-nb6-plus-base,
matt-nb6-plus
Changes since 1.16: +33 -52
lines
Diff to previous 1.16 (colored) next main 1.17 (colored) to selected 1.27 (colored)
Pull up revisions: src/sys/arch/amd64/include/frameasm.h revision 1.17-1.19 src/sys/arch/amd64/amd64/vector.S revision 1.40-1.41 src/sys/arch/amd64/amd64/trap.c revision 1.71 (requested by dsl in ticket #280). Move all the XEN differences to a single conditional. Merge the XEN/non-XEN versions of INTRFASTEXIT and INTR_RECURSE_HWFRAME by using extra defines. Split INTRENTRY so that code can insert extra instructions inside user/kernel conditional. Add a ';' that got deleted in a slight tidyup. Rejig the way TRAP() and ZTRAP() are defined and add Z/TRAP_NJ() that excludes the 'jmp alltraps'. Use the _NJ versions for trap entries with non-standard code. Move all the KDTRACE_HOOKS code into a single block inside the IDTVEC(trap03) code. This removes a mis-predicted from every trap when KDTRACE_HOOKS are enabled. Add a few blank lines, need some comments as well :-) No functional changes intended. Let the user of INTRENTRY_L() place a label on the 'swapgs' used when faulting from user space. If we get a fault setting the user %gs, or on a iret that is returning to userspace, we must do a 'swapgs' to reload the kernel %gs_base. Also save the %ds, %es, %fs, %gs selector values in the frame so they can be restored if we finally return to user (probably after an application SIGSEGV handler has fixed the error). Without this any such fault leaves the kernel running with the wrong %gs offset and it will most likely fault again early in trap(). Repeats until the stack tramples on something important. iret change works, invalid %gs is a little harder to arrange. Treat traps in kernel mode during the 'return to user' iret sequence as user faults. Based heavily in the i386 code with the correct opcode bytes inserted. iret path tested, arranging for segment register errors is harder. User %fs and %gs (32bit apps) are loaded much earlier and any errors will generate kernel panics - there is probably code to try to stop the invalid values being set.
Revision 1.16.6.1 / (download) - annotate - [select for diffs], Sat Jun 2 11:08:48 2012 UTC (11 years, 9 months ago) by mrg
Branch: jmcneill-usbmp
Changes since 1.16: +33 -52
lines
Diff to previous 1.16 (colored) next main 1.17 (colored) to selected 1.27 (colored)
sync to latest -current.
Revision 1.16.2.1 / (download) - annotate - [select for diffs], Wed May 23 10:07:39 2012 UTC (11 years, 10 months ago) by yamt
Branch: yamt-pagecache
Changes since 1.16: +33 -52
lines
Diff to previous 1.16 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.19 / (download) - annotate - [select for diffs], Thu May 17 19:38:53 2012 UTC (11 years, 10 months ago) by dsl
Branch: MAIN
CVS Tags: yamt-pagecache-base5,
jmcneill-usbmp-base10
Changes since 1.18: +4 -3
lines
Diff to previous 1.18 (colored) to selected 1.27 (colored)
Let the user of INTRENTRY_L() place a label on the 'swapgs' used when faulting from user space.
Revision 1.18 / (download) - annotate - [select for diffs], Mon May 7 21:04:09 2012 UTC (11 years, 10 months ago) by dsl
Branch: MAIN
Changes since 1.17: +2 -2
lines
Diff to previous 1.17 (colored) to selected 1.27 (colored)
Add a ';' that got deleted in a slight tidyup.
Revision 1.17 / (download) - annotate - [select for diffs], Mon May 7 20:51:20 2012 UTC (11 years, 10 months ago) by dsl
Branch: MAIN
Changes since 1.16: +32 -52
lines
Diff to previous 1.16 (colored) to selected 1.27 (colored)
Move all the XEN differences to a single conditional. Merge the XEN/non-XEN versions of INTRFASTEXIT and INTR_RECURSE_HWFRAME by using extra defines. Split INTRENTRY so that code can insert extra instructions inside user/kernel conditional.
Revision 1.13.4.3 / (download) - annotate - [select for diffs], Sat Aug 27 15:37:23 2011 UTC (12 years, 7 months ago) by jym
Branch: jym-xensuspend
Changes since 1.13.4.2: +7 -9
lines
Diff to previous 1.13.4.2 (colored) to branchpoint 1.13 (colored) next main 1.14 (colored) to selected 1.27 (colored)
Sync with HEAD. Most notably: uvm/pmap work done by rmind@, and MP Xen work of cherry@. No regression observed on suspend/restore.
Revision 1.16 / (download) - annotate - [select for diffs], Wed Aug 10 06:33:13 2011 UTC (12 years, 7 months ago) by cherry
Branch: MAIN
CVS Tags: yamt-pagecache-base4,
yamt-pagecache-base3,
yamt-pagecache-base2,
yamt-pagecache-base,
netbsd-6-base,
jym-xensuspend-nbase,
jym-xensuspend-base,
jmcneill-usbmp-pre-base2,
jmcneill-usbmp-base9,
jmcneill-usbmp-base8,
jmcneill-usbmp-base7,
jmcneill-usbmp-base6,
jmcneill-usbmp-base5,
jmcneill-usbmp-base4,
jmcneill-usbmp-base3,
jmcneill-usbmp-base2,
jmcneill-usbmp-base,
jmcneill-audiomp3-base,
jmcneill-audiomp3
Branch point for: yamt-pagecache,
netbsd-6,
jmcneill-usbmp
Changes since 1.15: +7 -9
lines
Diff to previous 1.15 (colored) to selected 1.27 (colored)
Correct offset calculation for ci
Revision 1.15.6.1 / (download) - annotate - [select for diffs], Fri Jun 3 13:27:38 2011 UTC (12 years, 9 months ago) by cherry
Branch: cherry-xenmp
Changes since 1.15: +7 -9
lines
Diff to previous 1.15 (colored) next main 1.16 (colored) to selected 1.27 (colored)
Initial import of xen MP sources, with kernel and userspace tests. - this is a source priview. - boots to single user. - spurious interrupt and pmap related panics are normal
Revision 1.13.4.2 / (download) - annotate - [select for diffs], Mon Mar 28 23:04:36 2011 UTC (13 years ago) by jym
Branch: jym-xensuspend
Changes since 1.13.4.1: +9 -9
lines
Diff to previous 1.13.4.1 (colored) to branchpoint 1.13 (colored) to selected 1.27 (colored)
Sync with HEAD. TODO before merge: - shortcut for suspend code in sysmon, when powerd(8) is not running. Borrow ``xs_watch'' thread context? - bug hunting in xbd + xennet resume. Rings are currently thrashed upon resume, so current implementation force flush them on suspend. It's not really needed.
Revision 1.13.8.1 / (download) - annotate - [select for diffs], Sat Mar 5 20:49:16 2011 UTC (13 years ago) by rmind
Branch: rmind-uvmplock
Changes since 1.13: +13 -16
lines
Diff to previous 1.13 (colored) next main 1.14 (colored) to selected 1.27 (colored)
sync with head
Revision 1.15 / (download) - annotate - [select for diffs], Wed Jan 12 23:12:11 2011 UTC (13 years, 2 months ago) by joerg
Branch: MAIN
CVS Tags: uebayasi-xip-base7,
rmind-uvmplock-nbase,
rmind-uvmplock-base,
jruoho-x86intr-base,
jruoho-x86intr,
cherry-xenmp-base,
bouyer-quota2-nbase,
bouyer-quota2-base,
bouyer-quota2
Branch point for: cherry-xenmp
Changes since 1.14: +9 -9
lines
Diff to previous 1.14 (colored) to selected 1.27 (colored)
Allow use of traditional CPP to be set on a per platform base in sys.mk. Honour this for dependency processing in bsd.dep.mk. Switch i386 and amd64 assembly to use ISO C90 preprocessor concat and drop the -traditional-cpp on this platform.
Revision 1.13.4.1 / (download) - annotate - [select for diffs], Sun Oct 24 22:47:52 2010 UTC (13 years, 5 months ago) by jym
Branch: jym-xensuspend
Changes since 1.13: +5 -8
lines
Diff to previous 1.13 (colored) to selected 1.27 (colored)
Sync with HEAD
Revision 1.13.6.1 / (download) - annotate - [select for diffs], Tue Aug 17 06:43:53 2010 UTC (13 years, 7 months ago) by uebayasi
Branch: uebayasi-xip
Changes since 1.13: +5 -8
lines
Diff to previous 1.13 (colored) next main 1.14 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.12.2.2 / (download) - annotate - [select for diffs], Wed Aug 11 22:51:34 2010 UTC (13 years, 7 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.12.2.1: +5 -8
lines
Diff to previous 1.12.2.1 (colored) to branchpoint 1.12 (colored) next main 1.13 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.14 / (download) - annotate - [select for diffs], Wed Jul 7 01:14:52 2010 UTC (13 years, 8 months ago) by chs
Branch: MAIN
CVS Tags: yamt-nfs-mp-base11,
yamt-nfs-mp-base10,
uebayasi-xip-base6,
uebayasi-xip-base5,
uebayasi-xip-base4,
uebayasi-xip-base3,
uebayasi-xip-base2,
matt-mips64-premerge-20101231
Changes since 1.13: +5 -8
lines
Diff to previous 1.13 (colored) to selected 1.27 (colored)
add the guts of TLS support on amd64. based on joerg's patch, reworked by me to support 32-bit processes as well. we now keep %fs and %gs loaded with the user values while in the kernel, which means we don't need to reload them when returning to user mode.
Revision 1.12.2.1 / (download) - annotate - [select for diffs], Mon May 4 08:10:33 2009 UTC (14 years, 10 months ago) by yamt
Branch: yamt-nfs-mp
Changes since 1.12: +4 -1
lines
Diff to previous 1.12 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.12.10.1 / (download) - annotate - [select for diffs], Mon Jan 19 13:15:54 2009 UTC (15 years, 2 months ago) by skrll
Branch: nick-hppapmap
Changes since 1.12: +4 -1
lines
Diff to previous 1.12 (colored) next main 1.13 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.10.6.3 / (download) - annotate - [select for diffs], Sat Jan 17 13:27:49 2009 UTC (15 years, 2 months ago) by mjf
Branch: mjf-devfs2
Changes since 1.10.6.2: +3 -0
lines
Diff to previous 1.10.6.2 (colored) to branchpoint 1.10 (colored) next main 1.11 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.12.8.1 / (download) - annotate - [select for diffs], Sat Dec 13 01:12:59 2008 UTC (15 years, 3 months ago) by haad
Branch: haad-dm
Changes since 1.12: +4 -1
lines
Diff to previous 1.12 (colored) next main 1.13 (colored) to selected 1.27 (colored)
Update haad-dm branch to haad-dm-base2.
Revision 1.13 / (download) - annotate - [select for diffs], Fri Nov 21 10:05:41 2008 UTC (15 years, 4 months ago) by ad
Branch: MAIN
CVS Tags: yamt-nfs-mp-base9,
yamt-nfs-mp-base8,
yamt-nfs-mp-base7,
yamt-nfs-mp-base6,
yamt-nfs-mp-base5,
yamt-nfs-mp-base4,
yamt-nfs-mp-base3,
uebayasi-xip-base1,
uebayasi-xip-base,
nick-hppapmap-base4,
nick-hppapmap-base3,
nick-hppapmap-base2,
nick-hppapmap-base,
mjf-devfs2-base,
matt-premerge-20091211,
jymxensuspend-base,
haad-nbase2,
haad-dm-base2,
haad-dm-base,
ad-audiomp2-base,
ad-audiomp2
Branch point for: uebayasi-xip,
rmind-uvmplock,
jym-xensuspend
Changes since 1.12: +4 -1
lines
Diff to previous 1.12 (colored) to selected 1.27 (colored)
PR port-amd64/39991 modules/compat_linux: build fix
Revision 1.10.6.2 / (download) - annotate - [select for diffs], Mon Jun 2 13:21:49 2008 UTC (15 years, 9 months ago) by mjf
Branch: mjf-devfs2
Changes since 1.10.6.1: +2 -2
lines
Diff to previous 1.10.6.1 (colored) to branchpoint 1.10 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.11.2.1 / (download) - annotate - [select for diffs], Sun May 18 12:31:28 2008 UTC (15 years, 10 months ago) by yamt
Branch: yamt-pf42
Changes since 1.11: +3 -3
lines
Diff to previous 1.11 (colored) next main 1.12 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.12 / (download) - annotate - [select for diffs], Mon Apr 21 15:15:33 2008 UTC (15 years, 11 months ago) by cegger
Branch: MAIN
CVS Tags: yamt-pf42-base4,
yamt-pf42-base3,
yamt-pf42-base2,
yamt-nfs-mp-base2,
yamt-nfs-mp-base,
wrstuden-revivesa-base-4,
wrstuden-revivesa-base-3,
wrstuden-revivesa-base-2,
wrstuden-revivesa-base-1,
wrstuden-revivesa-base,
wrstuden-revivesa,
simonb-wapbl-nbase,
simonb-wapbl-base,
simonb-wapbl,
netbsd-5-base,
netbsd-5-1-RELEASE,
netbsd-5-1-RC4,
netbsd-5-1-RC3,
netbsd-5-1-RC2,
netbsd-5-1-RC1,
netbsd-5-1-2-RELEASE,
netbsd-5-1-1-RELEASE,
netbsd-5-0-RELEASE,
netbsd-5-0-RC4,
netbsd-5-0-RC3,
netbsd-5-0-RC2,
netbsd-5-0-RC1,
netbsd-5-0-2-RELEASE,
netbsd-5-0-1-RELEASE,
matt-nb5-pq3-base,
matt-nb5-pq3,
matt-nb5-mips64-u2-k2-k4-k7-k8-k9,
matt-nb5-mips64-u1-k1-k5,
matt-nb5-mips64-premerge-20101231,
matt-nb5-mips64-premerge-20091211,
matt-nb5-mips64-k15,
matt-nb5-mips64,
matt-nb4-mips64-k7-u2a-k9b,
matt-mips64-base2,
hpcarm-cleanup-nbase,
haad-dm-base1
Branch point for: yamt-nfs-mp,
nick-hppapmap,
netbsd-5-1,
netbsd-5-0,
netbsd-5,
haad-dm
Changes since 1.11: +3 -3
lines
Diff to previous 1.11 (colored) to selected 1.27 (colored)
Access Xen's vcpu info structure per-CPU. Tested on i386 and amd64 (both dom0 and domU) by me. Xen2 tested (both dom0 and domU) by bouyer. OK bouyer
Revision 1.10.6.1 / (download) - annotate - [select for diffs], Thu Apr 3 12:42:11 2008 UTC (15 years, 11 months ago) by mjf
Branch: mjf-devfs2
Changes since 1.10: +2 -6
lines
Diff to previous 1.10 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.10.2.1 / (download) - annotate - [select for diffs], Mon Mar 24 07:14:52 2008 UTC (16 years ago) by keiichi
Branch: keiichi-mipv6
Changes since 1.10: +2 -6
lines
Diff to previous 1.10 (colored) next main 1.11 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.4.10.3 / (download) - annotate - [select for diffs], Sun Mar 23 02:03:53 2008 UTC (16 years ago) by matt
Branch: matt-armv6
Changes since 1.4.10.2: +2 -6
lines
Diff to previous 1.4.10.2 (colored) to branchpoint 1.4 (colored) next main 1.5 (colored) to selected 1.27 (colored)
sync with HEAD
Revision 1.1.18.6 / (download) - annotate - [select for diffs], Mon Mar 17 09:14:14 2008 UTC (16 years ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.1.18.5: +2 -6
lines
Diff to previous 1.1.18.5 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.11 / (download) - annotate - [select for diffs], Fri Feb 29 12:34:23 2008 UTC (16 years, 1 month ago) by yamt
Branch: MAIN
CVS Tags: yamt-pf42-baseX,
yamt-pf42-base,
yamt-lazymbuf-base15,
yamt-lazymbuf-base14,
matt-armv6-nbase,
keiichi-mipv6-nbase,
keiichi-mipv6-base,
ad-socklock-base1
Branch point for: yamt-pf42
Changes since 1.10: +2 -6
lines
Diff to previous 1.10 (colored) to selected 1.27 (colored)
don't bother to check curlwp==NULL.
Revision 1.1.18.5 / (download) - annotate - [select for diffs], Mon Jan 21 09:35:24 2008 UTC (16 years, 2 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.1.18.4: +51 -55
lines
Diff to previous 1.1.18.4 (colored) to branchpoint 1.1 (colored) to selected 1.27 (colored)
sync with head
Revision 1.4.10.2 / (download) - annotate - [select for diffs], Wed Jan 9 01:44:53 2008 UTC (16 years, 2 months ago) by matt
Branch: matt-armv6
Changes since 1.4.10.1: +90 -37
lines
Diff to previous 1.4.10.1 (colored) to branchpoint 1.4 (colored) to selected 1.27 (colored)
sync with HEAD
Revision 1.8.6.1 / (download) - annotate - [select for diffs], Wed Jan 2 21:47:09 2008 UTC (16 years, 2 months ago) by bouyer
Branch: bouyer-xeni386
CVS Tags: bouyer-xeni386-merge1
Changes since 1.8: +50 -54
lines
Diff to previous 1.8 (colored) next main 1.9 (colored) to selected 1.27 (colored)
Sync with HEAD
Revision 1.6.2.3 / (download) - annotate - [select for diffs], Thu Dec 27 00:42:55 2007 UTC (16 years, 3 months ago) by mjf
Branch: mjf-devfs
Changes since 1.6.2.2: +51 -55
lines
Diff to previous 1.6.2.2 (colored) to branchpoint 1.6 (colored) next main 1.7 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.8.2.1 / (download) - annotate - [select for diffs], Wed Dec 26 19:41:59 2007 UTC (16 years, 3 months ago) by ad
Branch: vmlocking2
Changes since 1.8: +51 -55
lines
Diff to previous 1.8 (colored) next main 1.9 (colored) to selected 1.27 (colored)
Sync with head.
Revision 1.10 / (download) - annotate - [select for diffs], Fri Dec 21 20:43:45 2007 UTC (16 years, 3 months ago) by dsl
Branch: MAIN
CVS Tags: vmlocking2-base3,
nick-net80211-sync-base,
nick-net80211-sync,
mjf-devfs-base,
matt-armv6-base,
hpcarm-cleanup-base,
bouyer-xeni386-nbase,
bouyer-xeni386-base
Branch point for: mjf-devfs2,
keiichi-mipv6
Changes since 1.9: +39 -41
lines
Diff to previous 1.9 (colored) to selected 1.27 (colored)
Create the trap/syscall frame space for all the registers in one go. Use the tramp-frame offsets (TF_foo) for all references to the registers. Sort the saving of the GP registers into the same order as the trap frame because consequetive memory accesses are liekly to be faster.
Revision 1.9 / (download) - annotate - [select for diffs], Fri Dec 21 19:18:15 2007 UTC (16 years, 3 months ago) by dsl
Branch: MAIN
Changes since 1.8: +13 -15
lines
Diff to previous 1.8 (colored) to selected 1.27 (colored)
Change the xen CLI() and STI() defines to only use one scratch register. As well as saving an instruction, in one place it saves a push/pop pair.
Revision 1.6.2.2 / (download) - annotate - [select for diffs], Sat Dec 8 18:16:29 2007 UTC (16 years, 3 months ago) by mjf
Branch: mjf-devfs
Changes since 1.6.2.1: +57 -1
lines
Diff to previous 1.6.2.1 (colored) to branchpoint 1.6 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.1.18.4 / (download) - annotate - [select for diffs], Fri Dec 7 17:24:05 2007 UTC (16 years, 3 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.1.18.3: +57 -1
lines
Diff to previous 1.1.18.3 (colored) to branchpoint 1.1 (colored) to selected 1.27 (colored)
sync with head
Revision 1.2.6.3 / (download) - annotate - [select for diffs], Mon Dec 3 19:02:49 2007 UTC (16 years, 3 months ago) by ad
Branch: vmlocking
Changes since 1.2.6.2: +1 -19
lines
Diff to previous 1.2.6.2 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.2.6.2 / (download) - annotate - [select for diffs], Mon Dec 3 18:34:42 2007 UTC (16 years, 3 months ago) by ad
Branch: vmlocking
Changes since 1.2.6.1: +77 -2
lines
Diff to previous 1.2.6.1 (colored) to branchpoint 1.2 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.4.8.3 / (download) - annotate - [select for diffs], Tue Nov 27 19:35:33 2007 UTC (16 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.4.8.2: +57 -1
lines
Diff to previous 1.4.8.2 (colored) to branchpoint 1.4 (colored) next main 1.5 (colored) to selected 1.27 (colored)
Sync with HEAD. amd64 Xen support needs testing.
Revision 1.8 / (download) - annotate - [select for diffs], Thu Nov 22 16:16:45 2007 UTC (16 years, 4 months ago) by bouyer
Branch: MAIN
CVS Tags: yamt-kmem-base3,
yamt-kmem-base2,
yamt-kmem-base,
yamt-kmem,
vmlocking2-base2,
vmlocking2-base1,
vmlocking-nbase,
reinoud-bufcleanup-nbase,
reinoud-bufcleanup-base,
jmcneill-pm-base,
cube-autoconf-base,
cube-autoconf
Branch point for: vmlocking2,
bouyer-xeni386
Changes since 1.7: +57 -1
lines
Diff to previous 1.7 (colored) to selected 1.27 (colored)
Pull up the bouyer-xenamd64 branch to HEAD. This brings in amd64 support to NetBSD/Xen, both Dom0 and DomU.
Revision 1.6.2.1 / (download) - annotate - [select for diffs], Mon Nov 19 00:46:10 2007 UTC (16 years, 4 months ago) by mjf
Branch: mjf-devfs
Changes since 1.6: +3 -2
lines
Diff to previous 1.6 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.4.14.4 / (download) - annotate - [select for diffs], Sun Nov 18 19:34:11 2007 UTC (16 years, 4 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.4.14.3: +3 -2
lines
Diff to previous 1.4.14.3 (colored) to branchpoint 1.4 (colored) next main 1.5 (colored) to selected 1.27 (colored)
Sync with HEAD
Revision 1.1.18.3 / (download) - annotate - [select for diffs], Thu Nov 15 11:42:32 2007 UTC (16 years, 4 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.1.18.2: +3 -2
lines
Diff to previous 1.1.18.2 (colored) to branchpoint 1.1 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.4.8.2 / (download) - annotate - [select for diffs], Wed Nov 14 19:04:04 2007 UTC (16 years, 4 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.4.8.1: +3 -2
lines
Diff to previous 1.4.8.1 (colored) to branchpoint 1.4 (colored) to selected 1.27 (colored)
Sync with HEAD.
Revision 1.7 / (download) - annotate - [select for diffs], Wed Nov 14 11:09:49 2007 UTC (16 years, 4 months ago) by ad
Branch: MAIN
CVS Tags: bouyer-xenamd64-base2,
bouyer-xenamd64-base
Changes since 1.6: +3 -2
lines
Diff to previous 1.6 (colored) to selected 1.27 (colored)
Clear the direction flag on entry to the kernel.
Revision 1.4.10.1 / (download) - annotate - [select for diffs], Tue Nov 6 23:14:17 2007 UTC (16 years, 4 months ago) by matt
Branch: matt-armv6
CVS Tags: matt-armv6-prevmlocking
Changes since 1.4: +9 -1
lines
Diff to previous 1.4 (colored) to selected 1.27 (colored)
sync with HEAD
Revision 1.1.18.2 / (download) - annotate - [select for diffs], Sat Oct 27 11:25:10 2007 UTC (16 years, 5 months ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.1.18.1: +9 -1
lines
Diff to previous 1.1.18.1 (colored) to branchpoint 1.1 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.4.8.1 / (download) - annotate - [select for diffs], Fri Oct 26 15:42:10 2007 UTC (16 years, 5 months ago) by joerg
Branch: jmcneill-pm
Changes since 1.4: +9 -1
lines
Diff to previous 1.4 (colored) to selected 1.27 (colored)
Sync with HEAD. Follow the merge of pmap.c on i386 and amd64 and move pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup code to restore CR4 before jumping back into kernel space as the large page option might cover that.
Revision 1.4.14.3 / (download) - annotate - [select for diffs], Thu Oct 25 23:59:22 2007 UTC (16 years, 5 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.4.14.2: +20 -11
lines
Diff to previous 1.4.14.2 (colored) to branchpoint 1.4 (colored) to selected 1.27 (colored)
Finish sync with HEAD. Especially use the new x86 pmap for xenamd64. For this: - rename pmap_pte_set() to pmap_pte_testset() - make pmap_pte_set() a function or macro for non-atomic PTE write - define and use pmap_pa2pte()/pmap_pte2pa() to read/write PTE entries - define pmap_pte_flush() which is a nop in x86 case, and flush the MMUops queue in the Xen case
Revision 1.2.6.1 / (download) - annotate - [select for diffs], Tue Oct 23 20:11:42 2007 UTC (16 years, 5 months ago) by ad
Branch: vmlocking
Changes since 1.2: +9 -1
lines
Diff to previous 1.2 (colored) to selected 1.27 (colored)
Sync with head.
Revision 1.4.14.2 / (download) - annotate - [select for diffs], Thu Oct 18 21:53:11 2007 UTC (16 years, 5 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.4.14.1: +2 -2
lines
Diff to previous 1.4.14.1 (colored) to branchpoint 1.4 (colored) to selected 1.27 (colored)
Explicitely set the flag argument of HYPERVISOR_iret to 0.
Revision 1.6 / (download) - annotate - [select for diffs], Thu Oct 18 15:28:34 2007 UTC (16 years, 5 months ago) by yamt
Branch: MAIN
CVS Tags: jmcneill-base
Branch point for: mjf-devfs
Changes since 1.5: +9 -1
lines
Diff to previous 1.5 (colored) to selected 1.27 (colored)
merge yamt-x86pmap branch. - reduce differences between amd64 and i386. notably, share pmap.c between them. it makes several i386 pmap improvements available to amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff. - implement deferred pmap switching for amd64. - remove LARGEPAGES option. always use large pages if available. also, make it work on amd64.
Revision 1.4.14.1 / (download) - annotate - [select for diffs], Wed Oct 17 21:38:17 2007 UTC (16 years, 5 months ago) by bouyer
Branch: bouyer-xenamd64
Changes since 1.4: +56 -1
lines
Diff to previous 1.4 (colored) to selected 1.27 (colored)
amd64 (aka x86-64) support for Xen. Based on the OpenBSD port done by Mathieu Ropert in 2006. DomU-only for now. An INSTALL_XEN3_DOMU kernel with a ramdisk will boot to sysinst if you're lucky. Often it panics because a runable LWP has a NULL stack (really, it's all of l->l_addr which is has been zeroed out while the process was on the queue !) TODO: - bug fixes :) - Most of the xpq_* functions should be shared with xen/i386 - The xen/i386 assembly bootstrap code should be remplaced with the C version in xenamd64/amd64/xpmap.c - see if a config(5) trick could allow to merge xenamd64 back to xen or amd64.
Revision 1.5 / (download) - annotate - [select for diffs], Wed Oct 17 19:53:04 2007 UTC (16 years, 5 months ago) by garbled
Branch: MAIN
CVS Tags: yamt-x86pmap-base4
Changes since 1.4: +1 -1
lines
Diff to previous 1.4 (colored) to selected 1.27 (colored)
Merge the ppcoea-renovation branch to HEAD. This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here. TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted. NOTES: pmppc was removed as an arch, and moved to a evbppc target.
Revision 1.4.12.1 / (download) - annotate - [select for diffs], Sun Sep 30 15:32:24 2007 UTC (16 years, 6 months ago) by yamt
Branch: yamt-x86pmap
Changes since 1.4: +9 -1
lines
Diff to previous 1.4 (colored) next main 1.5 (colored) to selected 1.27 (colored)
implement deferred pmap switching for amd64, and make amd64 use x86 shared pmap code. it makes several i386 pmap improvements available to amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff.
Revision 1.2.8.1 / (download) - annotate - [select for diffs], Wed Jul 11 19:57:40 2007 UTC (16 years, 8 months ago) by mjf
Branch: mjf-ufs-trans
Changes since 1.2: +1 -1
lines
Diff to previous 1.2 (colored) next main 1.3 (colored) to selected 1.27 (colored)
Sync with head.
Revision 1.2.14.1 / (download) - annotate - [select for diffs], Tue May 22 17:26:34 2007 UTC (16 years, 10 months ago) by matt
Branch: ppcoea-renovation
Changes since 1.2: +1 -1
lines
Diff to previous 1.2 (colored) next main 1.3 (colored) to selected 1.27 (colored)
Update to HEAD.
Revision 1.4 / (download) - annotate - [select for diffs], Mon May 21 08:10:39 2007 UTC (16 years, 10 months ago) by fvdl
Branch: MAIN
CVS Tags: yamt-x86pmap-base3,
yamt-x86pmap-base2,
yamt-x86pmap-base,
vmlocking-base,
ppcoea-renovation-base,
nick-csl-alignment-base5,
nick-csl-alignment-base,
nick-csl-alignment,
mjf-ufs-trans-base,
matt-mips64-base,
matt-mips64,
hpcarm-cleanup
Branch point for: yamt-x86pmap,
matt-armv6,
jmcneill-pm,
bouyer-xenamd64
Changes since 1.3: +5 -1
lines
Diff to previous 1.3 (colored) to selected 1.27 (colored)
Revert fs/gs changes until I figure out issues with them.
Revision 1.2.2.1 / (download) - annotate - [select for diffs], Thu May 17 13:40:51 2007 UTC (16 years, 10 months ago) by yamt
Branch: yamt-idlelwp
Changes since 1.2: +1 -5
lines
Diff to previous 1.2 (colored) next main 1.3 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.3 / (download) - annotate - [select for diffs], Fri May 11 14:01:46 2007 UTC (16 years, 10 months ago) by fvdl
Branch: MAIN
CVS Tags: yamt-idlelwp-base8
Changes since 1.2: +1 -5
lines
Diff to previous 1.2 (colored) to selected 1.27 (colored)
Don't save/restore %fs and %gs in trapframe. The kernel won't touch them. Instead, save/restore them on context switch. For 32bit processes, save/restore the selector values only, for 64bit processes, save/restore the appropriate MSRs. Iff the defaults have been changed.
Revision 1.1.18.1 / (download) - annotate - [select for diffs], Mon Feb 26 09:05:43 2007 UTC (17 years, 1 month ago) by yamt
Branch: yamt-lazymbuf
Changes since 1.1: +4 -6
lines
Diff to previous 1.1 (colored) to selected 1.27 (colored)
sync with head.
Revision 1.2 / (download) - annotate - [select for diffs], Fri Feb 9 21:55:01 2007 UTC (17 years, 1 month ago) by ad
Branch: MAIN
CVS Tags: thorpej-atomic-base,
thorpej-atomic,
reinoud-bufcleanup,
post-newlock2-merge,
ad-audiomp-base,
ad-audiomp
Branch point for: yamt-idlelwp,
vmlocking,
ppcoea-renovation,
mjf-ufs-trans
Changes since 1.1: +4 -6
lines
Diff to previous 1.1 (colored) to selected 1.27 (colored)
Merge newlock2 to head.
Revision 1.1.48.1 / (download) - annotate - [select for diffs], Fri Oct 20 19:26:48 2006 UTC (17 years, 5 months ago) by ad
Branch: newlock2
Changes since 1.1: +4 -6
lines
Diff to previous 1.1 (colored) next main 1.2 (colored) to selected 1.27 (colored)
Make ASTs per-LWP.
Revision 1.1 / (download) - annotate - [select for diffs], Sat Apr 26 18:39:40 2003 UTC (20 years, 11 months ago) by fvdl
Branch: MAIN
CVS Tags: yamt-vop-base3,
yamt-vop-base2,
yamt-vop-base,
yamt-vop,
yamt-uio_vmspace-base5,
yamt-uio_vmspace,
yamt-splraiseipl-base5,
yamt-splraiseipl-base4,
yamt-splraiseipl-base3,
yamt-splraiseipl-base2,
yamt-splraiseipl-base,
yamt-splraiseipl,
yamt-readahead-pervnode,
yamt-readahead-perfile,
yamt-readahead-base3,
yamt-readahead-base2,
yamt-readahead-base,
yamt-readahead,
yamt-pdpolicy-base9,
yamt-pdpolicy-base8,
yamt-pdpolicy-base7,
yamt-pdpolicy-base6,
yamt-pdpolicy-base5,
yamt-pdpolicy-base4,
yamt-pdpolicy-base3,
yamt-pdpolicy-base2,
yamt-pdpolicy-base,
yamt-pdpolicy,
yamt-km-base4,
yamt-km-base3,
yamt-km-base2,
yamt-km-base,
yamt-km,
wrstuden-fixsa-newbase,
wrstuden-fixsa-base-1,
wrstuden-fixsa-base,
wrstuden-fixsa,
thorpej-vnode-attr-base,
thorpej-vnode-attr,
simonb-timecounters-base,
simonb-timecounters,
simonb-timcounters-final,
rpaulo-netinet-merge-pcb-base,
rpaulo-netinet-merge-pcb,
peter-altq-base,
peter-altq,
newlock2-nbase,
newlock2-base,
netbsd-4-base,
netbsd-4-0-RELEASE,
netbsd-4-0-RC5,
netbsd-4-0-RC4,
netbsd-4-0-RC3,
netbsd-4-0-RC2,
netbsd-4-0-RC1,
netbsd-4-0-1-RELEASE,
netbsd-4-0,
netbsd-4,
netbsd-3-base,
netbsd-3-1-RELEASE,
netbsd-3-1-RC4,
netbsd-3-1-RC3,
netbsd-3-1-RC2,
netbsd-3-1-RC1,
netbsd-3-1-1-RELEASE,
netbsd-3-1,
netbsd-3-0-RELEASE,
netbsd-3-0-RC6,
netbsd-3-0-RC5,
netbsd-3-0-RC4,
netbsd-3-0-RC3,
netbsd-3-0-RC2,
netbsd-3-0-RC1,
netbsd-3-0-3-RELEASE,
netbsd-3-0-2-RELEASE,
netbsd-3-0-1-RELEASE,
netbsd-3-0,
netbsd-3,
netbsd-2-base,
netbsd-2-1-RELEASE,
netbsd-2-1-RC6,
netbsd-2-1-RC5,
netbsd-2-1-RC4,
netbsd-2-1-RC3,
netbsd-2-1-RC2,
netbsd-2-1-RC1,
netbsd-2-1,
netbsd-2-0-base,
netbsd-2-0-RELEASE,
netbsd-2-0-RC5,
netbsd-2-0-RC4,
netbsd-2-0-RC3,
netbsd-2-0-RC2,
netbsd-2-0-RC1,
netbsd-2-0-3-RELEASE,
netbsd-2-0-2-RELEASE,
netbsd-2-0-1-RELEASE,
netbsd-2-0,
netbsd-2,
matt-nb4-arm-base,
matt-nb4-arm,
ktrace-lwp-base,
ktrace-lwp,
kent-audio2-base,
kent-audio2,
kent-audio1-beforemerge,
kent-audio1-base,
kent-audio1,
gdamore-uart-base,
gdamore-uart,
elad-kernelauth-base,
elad-kernelauth,
chap-midi-nbase,
chap-midi-base,
chap-midi,
abandoned-netbsd-4-base,
abandoned-netbsd-4
Branch point for: yamt-lazymbuf,
newlock2
Diff to selected 1.27 (colored)
Rename the x86_64 port to amd64, as this is the actual name used for the processor family now. x86_64 is kept as the MACHINE_ARCH value, since it's already widely used (by e.g. the toolchain, etc), and by other operating systems.