CVS log for src/sys/arch/alpha/pci/tsvar.h

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Convert the Alpha port's bus_space back-end to manage address space
with vmem(9) arenas (using statically-allocated private boundary tags
for very early-in-boot) rather than extent(9).

As a side-effect, there's arguments to some initialization functions
that are no longer required, so garbage-collect those, update all the
call sites.

Sync with HEAD.

For CIA/Pyxis and Tsunami/Typhoon/Titan, save the firmware's idea of
the DMA window configuration, and restore it at shutdown time.  Make
sure that all assumptions we've made on the firmware's configuration
of DMA windows is correct.

- Don't bother issuing a warning if we program the WBASE / WSM register
  to different values than the firmware.
- Reduce the differences in how we initialize the DMA tags vis a vis the
  other Alpha implementations.
- Use Window 2 to provide a 1G @ 3G PCI SGMAP window on systems with more
  than 1G of RAM, rather than falling back on the ISA DMA window which is
  small and could get starved by PCI devices.
- Make sure we set TBASE to 0 for direct-mapped windows.

Sync w/ HEAD.

sync with head

The Tsunami / Typhoon chipsets have a static "monster window" for DMA
that allows for up to 32GB of RAM to be direct-mapped if the PCI device
can issue a 64-bit address (the monster window lives at 0x10000000000).
Enable this window and provide this to the PCI bus as a "dmat64".

#include <sys/extent.h> explicitly.

Merge changes from current as of 20200406

Cleanup i2c bus acquire / release, centralizing all of the logic into
iic_acquire_bus() / iic_release_bus().  "acquire" and "release" hooks
no longer need to be provided by back-end controller drivers (only if
they need special handling, e.g. powering on the i2c controller).
This results in the removal of a bunch of rendundant code from each
back-end controller driver.

Assert that we are not in hard interrupt context in iic_acquire_bus(),
iic_exec(), and iic_release_bus().

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Add tsciic, a driver for the DECchip 21272 Core Logic chipset I2C controller.
Tested on DS20L.

Add support for AlphaStation DS15.

Ported from OpenBSD via PR port-alpha/48148 by nullnilaki.
Note support for the secondary PCI bus still needs more improvements.

sync with head

merge to -current.

Do a minor cleanup of alpha (this will make applying pullups post branching
easier).
u_int{8,16,32,64}_t -> uint{*}_t
Change all old-style definitions to C89 prototypes.
Whitespace cleanup.
Constification in db_disasm.c

sync with head

Sync with HEAD (-D20101022).

sync with head

Enable Pchip and Cchip error interrupts (machine checks) on DEC 6600
systems. Add some basic pretty-printing for those errors. Tested on
a DS20.

sync with head.

sync with head

Sync with HEAD.

sync to netbsd-5

Give tsc(4)/tsp(4) some attention.
 - Convert to CFATTACH_DECL_NEW().
 - Sprinkle static on functions.
 - Improve KNF conformance.
 - Use C99 integer types.
 - Recycle now-empty-and/or-unused softc structures.

sync with head

Pull up the following revisions(s) (requested by mhitch in ticket #1120):
	sys/arch/alpha/pci/tsp_bus_io.c:	revision 1.6
	sys/arch/alpha/pci/tsp_bus_mem.c:	revision 1.9
	sys/arch/alpha/pci/tsvar.h:	revision 1.7

The tsc(4) bus initialization was using a single statically allocated
extent storage for each tsp(4), which caused a LOCKDEBUG kernel to fail
because the extent storage contained a mutex which panics when the second
mutex_init() is attempted.  Put the extent storage into the tsp_config
structure so each tsp(4) gets it own.  Fixes PR port-alpha/38358.

The tsc(4) bus initialization was using a single statically allocated
extent storage for each tsp(4), which caused a LOCKDEBUG kernel to fail
because the extent storage contained a mutex which panics when the second
mutex_init() is attempted.  Put the extent storage into the tsp_config
structure so each tsp(4) gets it own.  Fixes PR port-alpha/38358.

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

add more "const"

Sync with HEAD.

Allocate the DMA windows out of the PCI memory extent map after
DMA is initialized.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Update from trunk:
Implement bus_get_window on Tsunami and MCPCIA, and compensate for
the Cool sign-extend hack we use on EV6 when mapping PCI space into
userspace.

Implement tsp_bus_get_window().

Sync w/ -current.

Support for EV6 Tsunami core logic and system type 6600.
This covers most or all of the presently-available 21264 systems.

file tsvar.h was added on branch netbsd-1-4 on 1999-06-29 06:46:48 +0000

file tsvar.h was added on branch chs-ubc2 on 1999-07-01 23:00:58 +0000

Support for EV6 Tsunami core logic and system type 6600.
This covers most or all of the presently-available 21264 systems.