CVS log for src/sys/arch/alpha/pci/sio_pic.c

Up to [cvs.NetBSD.org] / src / sys / arch / alpha / pci

Request diff between arbitrary revisions

Keyword substitution: kv
Default branch: MAIN

In cy82c693_setup_elcr(), panic if cy82c693_init() fails as I suggested
should be done in a comment I wrote in this very file 26 years ago.

Sync with HEAD.

- Use defined constants for PIC registers, not magic numbers.
- Inline specific_eoi().

NFC.

Remove unnecessary #include <sys/malloc.h>

Reduce code duplication when setting up the interrupt handler data
structures:
- alpha_shared_intr_alloc() no longer takes a "string length" argument,
  and just uses kmem_asprintf() to create an "irq %u" string by default.
  This is suitable for nearly every caller.
- Add a alpha_shared_intr_set_string() that allows callers to override
  the default IRQ description string.
- Related: make alpha_shared_intr_string() return a const char *, since
  no callers should need to modify the string directly now.
- Re-factor PCI shared interrupt structure allocation / initialization
  into a new alpha_pci_intr_alloc(), which is suitable for nearly every
  Alpha PCI platform.  Callers are expected to first have initialized
  the interrupt hardware to the quiescent state.

Adjust various call sites of above functions to account for changes,
even if they are not able to use the newly re-factored code.

Tweak how the IRQ description strings are generated to enable additional
duplicated code re-factoring.

Reduce code duplication among platforms that use the i82378 SIO to
route PCI interrupts to the ISA PIC by refactoring it into a new
sio_pirq_intr_map() function.

Sync with HEAD.

More symbol sanitizing.

Liberally sprinkle static around to get more symbols out of the
global namespace.  A small bit of const poisoning in the TC code.

If running in Qemu, don't report stray edge-triggered ISA interrupts.
Works around an issue I obvserved with serial console in Qemu.

Changes to make interrupt {,dis}establish MP-safe on Alpha:
- Protect all of the system interrupt linkage with the cpu_lock mutex.
- Re-order some of the stores to the SCB vector table to make it safe
  in the face of lockless interrupt dispatch.
- Add a framework for routing interrupts to specific CPUs.  Interrupts
  are still funneled only to the primary CPU, but that will change for
  some systems soon.  Ensure that interrupt handler lists are manipulated
  only on the CPUs that handle that specific interrupt source.  This required
  a re-factor of the alpha_shared_intr_*() family of functions.
- Enable __HAVE_INTR_CONTROL, although interrupt redistribution is still
  a no-op.
- Reduce code duplication in the Jenson direct-SCB interrupt handlers.

Changes to make MPSAFE interrupts work on Alpha:

- Remove the ipl argument to scb_set() and the associated array of
  "mpsafe" booleans initialized based on the ipl.  It was bogus
  anyway; all IPL_{BIO,NET,TTY}, etc. values are aliases of IPL_VM,
  and for all practical purposes, there is really only one device
  interrrupt level on Alpha anyway.  Intead, we now treat all dispatches
  from the SCB vector table as MP-safe, and it is now the handler for
  that vector who is responsible for acquiring the KERNEL_LOCK if needed.

- Update the direct interrupt vector handlers in jensenio and TURBOchannel
  to acquire the KERNEL_LOCK.

- Introduce a new ALPHA_INTR_MPSAFE flag, and add a flags argument to
  alpha_shared_intr_establish().  When it is set, indicate that the
  handler is MP-safe.  Update alpha_shared_intr_dispatch() to pay
  attention and acquire the KERNEL_LOCK (or not) as indicated.

- Re-factor all of the PCI interrupt handling, providing "generic PCI"
  "PCI interrupts through ISA IRQs" implementations to significantly
  reduce code duplication.  Supplement the PCI chipset tag with more
  info to facilitate this, and make the PCI interrupt-related routines
  take a pci_chipset_tag_t argument rather than a void * argument.

- Because PCI interrupts on KN8AE are dispatched directly from the
  SCB, provide a wrapper for non-MPSAFE interrupt handlers that
  acquires the KERNEL_LOCK.

- Change the pci_intr_handle_t type to be a struct rather than an
  integer type in order to catch any direct use of it as a value.
  Add a set of functions to interact with pci_intr_handle_t, including
  setting interrupt flags.

- Implement pci_intr_setattr() so that the PCI_INTR_MPSAFE attribute
  can be set on a pci_intr_handle_t.

- While I'm here, make all of the MI PCI back-end operations call
  through real functions rather than hopping directly through function
  pointers in the chipset tag.

This change looks a lot bigger than it really is because of the re-factor
in the plethora of model-specific PCI interrupt back-ends.  The KN8AE,
KN300, and T2/T3/T4 (Sable) are largely un-changed.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

gc sprintf; reduce local static usage of interrupt strings that are only
used once for autoconf printing.

sync with head

merge to -current.

Do a minor cleanup of alpha (this will make applying pullups post branching
easier).
u_int{8,16,32,64}_t -> uint{*}_t
Change all old-style definitions to C89 prototypes.
Whitespace cleanup.
Constification in db_disasm.c

#include <sys/bus.h> instead of <machine/bus.h>.

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

ANSIfy functions with function-pointer arguments

ANSIfy another 1261 function definitions.
The only ones left in sys are beyond by sed script!
(or in sys/dist or sys/external)
Mostly they have function pointer parameters.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

Sync with HEAD.

sync with head.

sync with head.

Remove clause 3 and 4 from TNF licenses

sync with HEAD

Sync with HEAD.

Sync with HEAD.

sync with head

Sync with HEAD.

Interrupt handling changes, in discussion since February:

- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.

merge ktrace-lwp.

Pull up revision 1.33 (requested by thorpej in ticket #1373):
- Add a alpha_shared_intr_reset_strays() function that resets the
stray
interrupt counter for a given shared interrupt descriptor.
- When an interrupt is successfully handled, reset the strays counter,
thus preventing a "slow leak" from eventually shutting off the
interrupt
vector.  Idea taken from pci_kn300.c (which was changed to use
the new
alpha_shared_intr_reset_strays() function).

sync with -current

Sync with HEAD.

Pull up revision 1.33 (requested by thorpej in ticket #76):
- Add a alpha_shared_intr_reset_strays() function that resets the
stray
interrupt counter for a given shared interrupt descriptor.
- When an interrupt is successfully handled, reset the strays counter,
thus preventing a "slow leak" from eventually shutting off the
interrupt
vector.  Idea taken from pci_kn300.c (which was changed to use
the new
alpha_shared_intr_reset_strays() function).

- Add a alpha_shared_intr_reset_strays() function that resets the stray
  interrupt counter for a given shared interrupt descriptor.
- When an interrupt is successfully handled, reset the strays counter,
  thus preventing a "slow leak" from eventually shutting off the interrupt
  vector.  Idea taken from pci_kn300.c (which was changed to use the new
  alpha_shared_intr_reset_strays() function).

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Pull up revision 1.32 (requested by mycroft in ticket #582):
  Fix a really old ("since day one" bug: send specific EOIs
  to the PIC, not non-specific EOIs.  Should not matter so
  much, but strange interaction with PALcode, possibly only
  on some systems, is suspected.

Fix a really old ("since day one") bug: send specific EOIs to the PIC, not
non-specific EOIs.  This really shouldn't matter so much, but I'm guessing
there's a strange interaction with the PALcode (possibly related to the fact
that the PALcode itself may be sending an EOI itself on some systems).

I have tested this on a Multia, and it appears to work just fine without the
INITIALLY_{ENABLED,LEVEL_TRIGGERED}() stuff now, so I'm also removing that.

Catch up to -current.

sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work

remove trailing \n in panic().  approved perry.

update to -current

file sio_pic.c was added on branch nathanw_sa on 2002-10-18 02:34:25 +0000

Rework the interrupt code, shaving some cycles off in the process.
Rather than an "iointr" routine that decomposes a vector into an
IRQ, we maintain a vector table directly, hooking up each "iointr"
routine at the correct vector.  This also allows us to hook device
interrupts up to specific vectors (c.f. Jensen).

We can shave even more cycles off, here, and I will, but it requires
some changes to the alpha_shared_intr stuff.

Sync with HEAD

Put back the INITIALLY_{ENABLED,LEVEL_TRIGGERED}() PROM brain-damage
work-around.  It's required in order for the DEC Multia (a very
brain-damaged little machine) to work properly.

Submitted by Juergen Weiss <weiss@uni-mainz.de>, addresses
port-alpha/11202.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Sync w/ netbsd-1-5-base.

Use the common 82c693 access functions to read/write the ELCR.

Switch to the new `evcnt' mechanism for counting interrupts.  Maintain
a per-CPU interrupt counter for clock, device, and interprocessor
interrupts.

Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).

Nuke all the code associated with the INITIALLY_LEVEL_TRIGGERED() lossage, and
instead register a shutdownhook to restore the PIC state.

bring in latest KAME (as of 19991130, KAME/NetBSD141) into kame branch
just for reference purposes.
This commit includes 1.4 -> 1.4.1 sync for kame branch.

The branch does not compile at all (due to the lack of ALTQ and some other
source code).  Please do not try to modify the branch, this is just for
referenre purposes.

synchronization to latest KAME will take place on HEAD branch soon.

pull up rev 1.24 from trunk (ross)

Update from trunk.

Fix the 16-bytes-of-death bug by generating specific-EOI cycles during
sio_intr_setup().

In sio_intr_disestablish, also make sure that IRQs 0, 1, 8, and 13
default to edge-triggered, just like in the setup.

Implement sio_intr_disestablish(), and ensure that an initially-enabled
interrupt is never disabled and an initially-level-triggered interrupt
never becomes untyped.

Add sio_intr_alloc (copied from i386's isa_intr_alloc) for PCMCIA.

Add support for the Cypress CY82C693 PCI-ISA bridge.  This bridge is more or
less like an Intel SIO except that the ELCR registers are accessed differently
than on the Intel SIO.

XXX This code needs to be split up into bridge front-end and PIC back-end
XXX pieces.

Update marc-pcmcia branch from trunk.

Nuke the idea of <machine/options.h>.  It completely defeats the purpose
of fine-grain option dependencies.

sync the nwscons branch up with yesterday's version of the trunk.
Lots of conflicts/changes because of the RCS Id format changes.
Also, a few cleanups and corrections.

by default, provide RCS IDs for NetBSD/alpha kernel files in kernel binaries.
This can be disabled (to save a bit of space) with the NO_KERNEL_RCSIDS
options, which is present but commented out in the ALPHA config file.
In ELF-format kernels, these strings are present in the kernel binary but
are not loaded into memory.  (In ECOFF-format kernels, there's no easy way
to keep them from being loaded, so they _are_ loaded into memory.)

clean up NetBSD RCS ID strings, include machine/options.h

use the new common chained-interrupt support code.

compile cleanly with:
-Werror -Wall -Wstrict-prototypes -Wmissing-prototypes -Wcast-qual

update for new bus.h macros.  bus_io_* and bus_mem_* integrated into
single bus_space_* framework.  Unfortunately, bus_space_{read,write}_*
operations still imply barriers.  That will change soon.

backout previous kprintf change

printf -> kprintf, sprintf -> ksprintf

clean up stray interrupt handling a bit.

(1)     Clean up interrupt handling slightly.

pull down changes from NetBSD 1.2 release branch:
>Update for present reality (function names), clean up a bit (printfs,
>"panic: foo XXX"), and fix a couple of printf format specified bugs
>(which were normally #if 0'd out).  Inspired by Multia/UDB support
>changes sent by Matt Thomas.
and:
>changes from Matt Thomas so that the Multia/UDB can attach its
>'com' interrupts, cleaned up some.  Basically: if sharing type of
>new interrupt is different than what the hardware is currently set up
>for (e.g. requesting edge-triggered and the hardware is set up by
>the PROM for level triggered) and there are no interrupt handlers on
>that line already, warn about it and use the hardware type that the
>line was already set for (to avoid making the console blow up on
>reboot).  If same circumstances but there is already a handler, panic
>as before.

changes from Matt Thomas so that the Multia/UDB can attach its
'com' interrupts, cleaned up some.  Basically: if sharing type of
new interrupt is different than what the hardware is currently set up
for (e.g. requesting edge-triggered and the hardware is set up by
the PROM for level triggered) and there are no interrupt handlers on
that line already, warn about it and use the hardware type that the
line was already set for (to avoid making the console blow up on
reboot).  If same circumstances but there is already a handler, panic
as before.

Update for present reality (function names), clean up a bit (printfs,
"panic: foo XXX"), and fix a couple of printf format specified bugs
(which were normally #if 0'd out).  Inspired by Multia/UDB support
changes sent by Matt Thomas.

Pull up from trunk:
>avoid lots of upper-case letters in interrupt names.  prettier that way.

avoid lots of upper-case letters in interrupt names.  prettier that way.

note that these IRQs are ISA IRQs

clean up copyrights and RCS IDs

remove (hack) version of isa_intr_establish()

clean up for new ISA and 'bus' code, etc.

The IST_* and IPL_* constants are not bus-specific; don't treat them as such.
Change splimp -> splnet in Ethernet, ARCnet, and FDDI drivers.

wholesale update from my NetBSD/Alpha source tree.  Includes:
	Support for AXPpci CPUs,
	Support for AlphaStation 600 CPUs,
	new boot block structure, which requires an 'installboot'
	    program and works a lot like the NetBSD/sparc boot blocks.

ISA and PCI support for DEC AlphaStations