CVS log for src/sys/arch/alpha/pci/cia_bwx_bus_mem.c

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Default branch: MAIN

Convert the Alpha port's bus_space back-end to manage address space
with vmem(9) arenas (using statically-allocated private boundary tags
for very early-in-boot) rather than extent(9).

As a side-effect, there's arguments to some initialization functions
that are no longer required, so garbage-collect those, update all the
call sites.

Sync with HEAD.

Remove unnecessary #include <sys/malloc.h>

#include <sys/bus.h> instead of <machine/bus.h>.

sync with head

Remove unneeded includes of <uvm/uvm_extern.h>

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

Pull up to last week's -current.

CIA core logic with BWX enabled appears on both EV56 and PCA56.  We
require at least EV56 for the assembler to emit BWX opcodes, so set
the arch to "ev56".

Add support for using BWX for PCI config space and PCI i/o and mem space
on the ALCOR2 and Pyxis.  BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
  with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.