CVS log for src/sys/arch/alpha/alpha/interrupt.c

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Default branch: MAIN

s/suport/support/ in comment.

Sync with HEAD.

The Alpha AXP Architecture Reference Manual is explcit that the only
valid bits in the PSL are the IPL and USER bits, the latter of which
will always be clear when in the kernel, and that all other bits MBZ.
So, when reading the PSL to get the current IPL, don't bother masking
with ALPHA_PSL_IPL_MASK.

Remove unnecessary #include <sys/malloc.h>

Sync with HEAD.

Disable preemption around the main work of badaddr_read() and delay();
they both use "current CPU" resources.

Make scb_strat() static.

Don't use atomics to manipulate cpu_info::ci_intrdepth: it's modified
only in the interrupt service path by the owning CPU, at entry and exit.
Even if the r/m/w cycle of incrementing the value were interrupted, the
result would still be the same because the interrupting frame will have
completed its own symmetrical increment/decrement cycle upon return.

Slight tweak to previous changes:

Rather than simply increment the interrupt depth for the clock interrupt,
we add 0x10.  Why?  Because while we only use a single Alpha IPL (4) for
IPL_{BIO,NET,TTY,VM}, technically the architecture specification suports
two in the OSF/1 PALcode (3 [low-pri] and 4 [high-pri]), meaning we could
conceiveably have intrdepth > 1 just for device interrupts.

Adding 0x10 here means that cpu_intr_p() can check for "intrdepth != 0" for
"in interrupt context" and CLKF_INTR() can check "(intrdepth & 0xf) != 0" for
"was processing interrupts when the clock interrupt happened".

Sync with HEAD.

Contrary to comment here, nowadays hardclock() and statclock() should be
called with cpu_intr_p() is turning on, if used from the interrupt context.

Otherwise, entropy_enter() is used instead of entropy_enter_intr(), which
results in KASSERT() failure.

Therefore, bump ci_intrdepth for clock interrupt. Remove stale comment also.

Fix cycle counter-based time keeping on Alpha in MP environments by using
a simpler calibration algorithm for the CC timecounter.  Proposed in 2018
by Naruaki Etomi:

    https://mail-index.netbsd.org/tech-kern/2018/01/14/msg022940.html

This patch is largely based on the proposed change, but avoids changing
any other timecounter logic, and re-factors things a bit to keep them
as MI as possible.

Implement cpu_intr_redistribute() for Tusnami/Titan systems.

Changes to make interrupt {,dis}establish MP-safe on Alpha:
- Protect all of the system interrupt linkage with the cpu_lock mutex.
- Re-order some of the stores to the SCB vector table to make it safe
  in the face of lockless interrupt dispatch.
- Add a framework for routing interrupts to specific CPUs.  Interrupts
  are still funneled only to the primary CPU, but that will change for
  some systems soon.  Ensure that interrupt handler lists are manipulated
  only on the CPUs that handle that specific interrupt source.  This required
  a re-factor of the alpha_shared_intr_*() family of functions.
- Enable __HAVE_INTR_CONTROL, although interrupt redistribution is still
  a no-op.
- Reduce code duplication in the Jenson direct-SCB interrupt handlers.

Changes to make MPSAFE interrupts work on Alpha:

- Remove the ipl argument to scb_set() and the associated array of
  "mpsafe" booleans initialized based on the ipl.  It was bogus
  anyway; all IPL_{BIO,NET,TTY}, etc. values are aliases of IPL_VM,
  and for all practical purposes, there is really only one device
  interrrupt level on Alpha anyway.  Intead, we now treat all dispatches
  from the SCB vector table as MP-safe, and it is now the handler for
  that vector who is responsible for acquiring the KERNEL_LOCK if needed.

- Update the direct interrupt vector handlers in jensenio and TURBOchannel
  to acquire the KERNEL_LOCK.

- Introduce a new ALPHA_INTR_MPSAFE flag, and add a flags argument to
  alpha_shared_intr_establish().  When it is set, indicate that the
  handler is MP-safe.  Update alpha_shared_intr_dispatch() to pay
  attention and acquire the KERNEL_LOCK (or not) as indicated.

- Re-factor all of the PCI interrupt handling, providing "generic PCI"
  "PCI interrupts through ISA IRQs" implementations to significantly
  reduce code duplication.  Supplement the PCI chipset tag with more
  info to facilitate this, and make the PCI interrupt-related routines
  take a pci_chipset_tag_t argument rather than a void * argument.

- Because PCI interrupts on KN8AE are dispatched directly from the
  SCB, provide a wrapper for non-MPSAFE interrupt handlers that
  acquires the KERNEL_LOCK.

- Change the pci_intr_handle_t type to be a struct rather than an
  integer type in order to catch any direct use of it as a value.
  Add a set of functions to interact with pci_intr_handle_t, including
  setting interrupt flags.

- Implement pci_intr_setattr() so that the PCI_INTR_MPSAFE attribute
  can be set on a pci_intr_handle_t.

- While I'm here, make all of the MI PCI back-end operations call
  through real functions rather than hopping directly through function
  pointers in the chipset tag.

This change looks a lot bigger than it really is because of the re-factor
in the plethora of model-specific PCI interrupt back-ends.  The KN8AE,
KN300, and T2/T3/T4 (Sable) are largely un-changed.

Enable __HAVE_FAST_SOFTINTS and garbage-collect the #ifdefs.

Move softintr bits into <machine/intr.h> and define ALPHA_ALL_SOFTINTS
for locore.s

Reduce the __HAVE_FAST_SOFTINTS #ifdef perimeter.

Implement fast soft interrupts for Alpha.  It's not yet enabled, because
there is a bug lurking that causes problems when user space starts up,
so we'll stick with the slow path for now.

Track the SSIR per-cpu, rather than globally.

- Document all of the various interrupt levels in the Processor Stataus
  register, and provide symbolic names for them as well.
- Use ALPHA_PSL_IPL_* values directly for IPL_*.

In ipl2psl_table[], use IPL_SCHED instead of IPL_CLOCK (the legacy name),
and add a comment noting that this is the level IPIs come in with on
alpha.

update from HEAD

Sync with HEAD

PR port-alpha/50667: add missing va_start/va_end.

sync with head

merge to -current.

Do a minor cleanup of alpha (this will make applying pullups post branching
easier).
u_int{8,16,32,64}_t -> uint{*}_t
Change all old-style definitions to C89 prototypes.
Whitespace cleanup.
Constification in db_disasm.c

sync with head

Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits.  Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Sync with HEAD.

sync with head.

sync with head.

Remove clause 3 and 4 from TNF licenses

Sync with HEAD.

sync with head.

sync with HEAD

sync with head.

Use MI atomic operations.

sync with HEAD

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Sync with HEAD.

sync with head

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Sync with HEAD.

Interrupt handling changes, in discussion since February:

- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.

sync with HEAD

More interrupt changes; collapse the symbolic levels down to the ones
that we actually need (none, soft, vm, sched, high) but retain aliases
like IPL_BIO for now.

Interrupt stuff for alpha (but no fast softints yet).

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Sync with HEAD

sync with head.

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Add MI todr(9) support and timercounter(9) support with kern_cctr.c to alpha:
- use todr(9) API with MI mc146818(4) driver and remove homegrown
  todr stuff from MD alpha/clock.c and alpha/mcclock.c
- also remove obsolete cc_microtime stuff from MD code
- add ci_pcc_freq member in struct cpu_info for cpu_frequency(), and
  calibrate it with mc146818 interval clock in mcclock attachment
- call cc_init() in cpu_initclocks(9) because all alpha cpus have
  a pcc counter

Tested on DEC 3000/300 and AlphaPC 164, but not on any SMP machines yet.

Sync with head.

Sync with head.

Update to HEAD.

merge yamt-idlelwp branch.  asked by core@.  some ports still needs work.

from doc/BRANCHES:

	idle lwp, and some changes depending on it.

	1. separate context switching and thread scheduling.
	   (cf. gmcgarry_ctxsw)
	2. implement idle lwp.
	3. clean up related MD/MI interfaces.
	4. make scheduler(s) modular.

Convert to the new atomic op API.

adapt alpha.

sync with head.

Merge newlock2 to head.

Sync with head.

Define ipl_cookie_t._psl as uint8_t so that it can be packed into a
word with other seldomly written fields.

Checkpoint work in progress.

sync with head.

merge yamt-splraiseipl branch.

	- finish implementing splraiseipl (and makeiplcookie).
	  http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
	- complete workqueue(9) and fix its ipl problem, which is reported
	  to cause audio skipping.
	- fix netbt (at least compilation problems) for some ports.
	- fix PR/33218.

implement new api for alpha.

sync with head.

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

sync with head.

pull splraiseipl() from newlock branch.

Share alpha/microtime.c with i386 and sparc64 as kern_microtime.c.
(approved by martin)

Merge the nathanw_sa branch.

Catch up to -current.

sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work

remove trailing \n in panic().  approved perry.

Curproc->curlwp renaming.

Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".

"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).

Adjustments for new mutex routines:
* Make all the IPL_* constants meaningful within a single number domain.
* Use new SI_* constants to number the soft interrupt queues, rather than
  IPL_SOFT*.
* Add splraiseipl() for use by kern_mutex.c.  Usage is e.g.
  splraiseipl(IPL_BIO).

First cut at LWP and SA support on the alpha.
Doesn't break in ordinary multiuser mode; LWPs and SAs not yet tested.

update to -current

file interrupt.c was added on branch nathanw_sa on 2001-08-30 23:43:40 +0000

Rework the interrupt code, shaving some cycles off in the process.
Rather than an "iointr" routine that decomposes a vector into an
IRQ, we maintain a vector table directly, hooking up each "iointr"
routine at the correct vector.  This also allows us to hook device
interrupts up to specific vectors (c.f. Jensen).

We can shave even more cycles off, here, and I will, but it requires
some changes to the alpha_shared_intr stuff.

The machine check error code is reliably located at an offset of 0x10
in the logout frame. Print it for all fatal machine checks on all
models.

Catch up to -current.

Assorted microtime fixes (similar to fixes I made yesterday when
porting this code to i386mp branch):

 - call microset() early on each cpu so that calls to microtime()
before the first clock interrupt don't return trash.  this manifested
itself as garbage runtimes in "ps" for kernel threads.
 - avoid races between hardclock updating "time" and microset on a
different cpu reading it by adding a "microset_time" global which is
initialized from "time" on the primary cpu.
 - call microset every hz ticks, not every hz+1 (cosmetic)

Pull up revision 1.60 (via patch, requested by ross):
  Deal with stray machine checks.

o Deal with stray machine checks
o Add for alpha a security-sensitive rate-limiting printf(9) wrapper based
  on ratecheck(9):  void rlprintf(struct timeval *t, const char *fmt, ...);

Add a microtime() implementation that interpolates between ticks
using the cycle counter.  MP-safeness is achieved by giving each
CPU its own PCC frequency variables, and kicking the non-primary
processors via an IPI once per second.

Based on the sample code from David Mills' "A Kernel Model for
Precision Timekeeping".

Sync with HEAD

In splx(), don't call spl0() unless the ssir != 0.

Clean up soft interrupt related stuff a bit.

Change the softintr implementation to be a bit more cache friendly
(though, sigh, slightly more expensive at softintr_schedule() time).

Sync with head (for UBC+NFS fixes, mostly).

Make softclock a generic soft interrupt of the API is available,
adding the requisite void * argument to softclock().

Sync with HEAD.

Sync with HEAD.

Several changes, which get us generally further along with
multiprocessor support:
- Implement MP-safe halt.
- Make the FPU saving code more like Bill's on the i386 MP branch.
  XXX This code will no doubt be revisited again.
- Pass the cpu_info and trapframe to IPI handlers, saving some work
  in the handlers themselves, and also making it possible for the
  "pause" handler to reference register state for DDB.
- Add "machine cpu" to DDB, making it possible to reference other
  CPUs registers (and thus get e.g. a traceback) from whichever
  CPU is actually running the debugger.
- Garbage-collect "machine halt" and "machine reboot" DDB commands.
  They don't have a prayer of working properly in multiprocessor
  kernels, and didn't really work all that well in uniprocessor kernels.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Move IPI processing into a separate function.

Count individual interprocessor interrupts -- it's good to know where
they all come from.

Define the biglock perimeter for the Alpha port, and generally clean
up a bunch of the MP code.  Still doens't work properly yet, this is
just a snapshot of work-in-progress.

Kwality control:
* put #includes of opt headers and headers to get protos used by
  net/netisr_dispatch.h in net/netisr.h (if !defined(_LOCORE)) (rather than
  in netisr_dispatch.h itself, and potentially nowhere, respectively).
* require netisr.h to be included before netisr_dispatch.h.
* minor additional cleanup of both netisr.h and netisr_dispatch.h.
* clean up uses to remove now-unnecessary header file inclusions, and
  local prototypes of the fns.
* convert netisr dispatch implementations which didn't use
  netisr_dispatch.h (pc532) to use it.

remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

Sync w/ netbsd-1-5-base.

Switch to the new `evcnt' mechanism for counting interrupts.  Maintain
a per-CPU interrupt counter for clock, device, and interprocessor
interrupts.

Increment an interrupt depth counter in non-clock interrupt cases
so that we can get time spent in interrupt statistics.

- Clean up clock interrupt code a bit, and provide a CPU_IS_PRIMARY()
  macro in the MULTIPROCESSOR case (hardclock() wants it).
- Implement __GENERIC_SOFT_INTERRUPTS, and redefine the legacy
  software interrupts in terms of it.  Garbage-collect setsoftserial().

First sweep at scheduler state cleanup.  Collect MI scheduler
state into global and per-CPU scheduler state:

	- Global state: sched_qs (run queues), sched_whichqs (bitmap
	  of non-empty run queues), sched_slpque (sleep queues).
	  NOTE: These may collectively move into a struct schedstate
	  at some point in the future.

	- Per-CPU state, struct schedstate_percpu: spc_runtime
	  (time process on this CPU started running), spc_flags
	  (replaces struct proc's p_schedflags), and
	  spc_curpriority (usrpri of processes on this CPU).

	- Every platform must now supply a struct cpu_info and
	  a curcpu() macro.  Simplify existing cpu_info declarations
	  where appropriate.

	- All references to per-CPU scheduler state now made through
	  curcpu().  NOTE: this will likely be adjusted in the future
	  after further changes to struct proc are made.

Tested on i386 and Alpha.  Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.

Rename the atomic operations to have generic machine-independent
names, and define __HAVE_ATOMIC_OPERATIONS to indicate their
existence.

Reset mc_received after we've done a badaddr probe.

Pull up to last week's -current.

When doing a badaddr check, insert an extra `mb', which is highly magic
on some systems (due to quirky bus adapters).

Move atomic operations into <machine/atomic.h>, and make them in-line
assembly, rather than function calls.

...except alpha_atomic_testset_l(), which will go away completely once
I commit the new <machine/lock.h>.

Move cpu_info and related info into <machine/cpu.h>, and implement the
other MP API components discussed on tech-smp.

completely remove Mach VM support.  all that is left is the all the
header files as UVM still uses (most of) these.

schedclk() -> schedclock(), for consistency with hardclock(), statclock(), ...
update comments for recent scheduler mods

Fix an uninitialized variable.

Now that we have the kthread mechanism, massively clean up the way
additional processors are spun up on multiprocessor Alpha systems.
Now, each processor gets its own idle thread (the primary processor
uses proc0).  This idle thread is used in switch_exit(), rather than
explicitly referencing proc0.

Also, make `curproc', `fpcurproc', and `curpcb' per-cpu values.  This
required some data structure rearrangement; cpu info is now statically
allocated in the BSS, rather than via malloc(), and cpu_softc is gone.
(Modeled somewhat after NetBSD/sparc's multiprocessor info structures.)

Scheduler bug fixes and reorganization
* fix the ancient nice(1) bug, where nice +20 processes incorrectly
  steal 10 - 20% of the CPU, (or even more depending on load average)
* provide a new schedclk() mechanism at a new clock at schedhz, so high
  platform hz values don't cause nice +0 processes to look like they are
  niced
* change the algorithm slightly, and reorganize the code a lot
* fix percent-CPU calculation bugs, and eliminate some no-op code

=== nice bug === Correctly divide the scheduler queues between niced and
compute-bound processes. The current nice weight of two (sort of, see
`algorithm change' below) neatly divides the USRPRI queues in half; this
should have been used to clip p_estcpu, instead of UCHAR_MAX.  Besides
being the wrong amount, clipping an unsigned char to UCHAR_MAX is a no-op,
and it was done after decay_cpu() which can only _reduce_ the value.  It
has to be kept <= NICE_WEIGHT * PRIO_MAX - PPQ or processes can
scheduler-penalize themselves onto the same queue as nice +20 processes.
(Or even a higher one.)

=== New schedclk() mechansism === Some platforms should be cutting down
stathz before hitting the scheduler, since the scheduler algorithm only
works right in the vicinity of 64 Hz. Rather than prescale hz, then scale
back and forth by 4 every time p_estcpu is touched (each occurance an
abstraction violation), use p_estcpu without scaling and require schedhz
to be generated directly at the right frequency. Use a default stathz (well,
actually, profhz) / 4, so nothing changes unless a platform defines schedhz
and a new clock.  Define these for alpha, where hz==1024, and nice was
totally broke.

=== Algorithm change === The nice value used to be added to the
exponentially-decayed scheduler history value p_estcpu, in _addition_ to
be incorporated directly (with greater wieght) into the priority calculation.
At first glance, it appears to be a pointless increase of 1/8 the nice
effect (pri = p_estcpu/4 + nice*2), but it's actually at least 3x that
because it will ramp up linearly but be decayed only exponentially, thus
converging to an additional .75 nice for a loadaverage of one. I killed
this, it makes the behavior hard to control, almost impossible to analyze,
and the effect (~~nothing at for the first second, then somewhat increased
niceness after three seconds or more, depending on load average) pointless.

=== Other bugs === hz -> profhz in the p_pctcpu = f(p_cpticks) calcuation.
Collect scheduler functionality. Try to put each abstraction in just one
place.

#include <machine/intrcnt.h>
#include <machine/alpha.h>
g/c some EVCNT_COUNTERS stuff.

some temporary debugging printfs in the IPI code.

make compile w/o MULTIPROCESSOR

Don't process CLOCK or DEVICE interrupts if we're not the primary CPU.

Add basic interprocessor interrupt sending and receiving code.  Current
IPI functions: HALT, IMB, TBIA, TBIAP.

XXX HALT is not yet implemented, it's just a stub.

First-cut at code to spin up secondary processors on a multiprocessor
Alpha system, conditional on MULTIPROCESSOR.

NOTE: This does not yet work completely.  The secondary CPU begins the
boot process, but never makes it into the cpu spinup trampoline.  This
is merely a snapshot of a work-in-progress.

Use the new cpu_mchkinfo().

1. Don't deref zero on early machine checks.
2. Revert last week's non-KNF {} editing.

tentative better fix for allocating the correct number of mchkinfo structs

Doh! Jason caught me being really stupid. There isn't necessarily
a linear 0..N mapping out of alpha_cpu_whami - which is what I was
using to index the new cpu machine check array. This is a quick hack
back to just using the first element while I think of a kinder function
that will do the function (per-platform) of whami->VIRTUAL CPU ID, which
if you think about it, is really necessary anyway.

use new mchkinfo structures for expect/recv storage

Add support for UVM.

copyright foo

Update marc-pcmcia branch from trunk.

Redo the platform specific identification and initialization, making
it more explicit where platform specific functions (like machine check
handling) should go.

Update marc-pcmcia branch from trunk.

Don't panic if we receive a Processor Correctable Error or a System
Correctable Error; report them, instead.

XXX Need a platform-specific machine check handler so we can decode the
logout area on such errors.

Update marc-pcmcia branch from trunk.

Nuke the idea of <machine/options.h>.  It completely defeats the purpose
of fine-grain option dependencies.

Repair marc-pcmcia branch.

sync nwscons branch with changes in -current as of July 21, 1997

sync alpha-nwscons branch with changes in -current

sync the nwscons branch up with yesterday's version of the trunk.
Lots of conflicts/changes because of the RCS Id format changes.
Also, a few cleanups and corrections.

by default, provide RCS IDs for NetBSD/alpha kernel files in kernel binaries.
This can be disabled (to save a bit of space) with the NO_KERNEL_RCSIDS
options, which is present but commented out in the ALPHA config file.
In ELF-format kernels, these strings are present in the kernel binary but
are not loaded into memory.  (In ECOFF-format kernels, there's no easy way
to keep them from being loaded, so they _are_ loaded into memory.)

include machine/options.h

clean up NetBSD RCS ID strings

from Matt Jacob: deal with type 5 (passive release?) interrupts.  (ignore them
but print out their vector(?) to see if we can ever discern anything useful
from it.)  Also, some slight general cleanup.

update copyright dates

compile cleanly with:
-Werror -Wall -Wstrict-prototypes -Wmissing-prototypes -Wcast-qual

increment cnt.v_intr for I/O device and clock interrupts

backout previous kprintf change

printf -> kprintf, sprintf -> ksprintf

(1)     Restructure and improve machine check and correctable error
handling based on information in the 2nd Ed. of the Alpha Architecture
Reference Manual.
(2)     Clean up interrupt handling slightly.
(3)     Clean up badaddr().

Instead of treating the trap/syscall/exception frame like a struct
containing a substruct (the hardware frame) and an array of registers,
treat it like one big array of registers, for easier and prettier
access.  Update everything to deal with that.

update for new alpha_cpu.h definitions, -Wall cleanups, and make
things compile with the new work-in-progress pmap code.

clean and update for new defintions, prototypes, etc.

Changes from Trevor Mendez <tmendez@bbn.com> to print 0x's before hex
numbers when panic()ing because of a machine check, for sanity.

wholesale update from my NetBSD/Alpha source tree.  Includes:
	Support for AXPpci CPUs,
	Support for AlphaStation 600 CPUs,
	new boot block structure, which requires an 'installboot'
	    program and works a lot like the NetBSD/sparc boot blocks.

MB -> wbflush

sync with my current Alpha sources

preliminary Alpha support.  note that NOT ALL OF THE MODIFICATIONS TO
THE REST OF THE KERNEL ARE IN THE TREE YET.  Also, some of this is
_incredibly_ hack-ish, etc., but it works.