CVS log for src/sys/arch/alpha/alpha/Attic/db_instruction.h

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Move alpha/alpha/db_instruction.h -> alpha/include/alpha_instruction.h

Sync with HEAD.

Define the FIX float function codes (ITOFF, ITOFS, ITOFT).

Remove the /I "alternate format" from db_disasm(), which was internally
interpreted as "showregs", whcih would print the values of the registers
at each instruction.  Unfortunately, this was fundamentally broken because
the saved registers accessible to DDB are only valid for the faulting
insn that got us into DDB, and not arbitrary isns that can be examined
from within DDB.

Allow alpha_print_instruction() to be called from outside DDB, and
allow the caller to supply a buffer to contain the pretty-printed
insn string, rather than db_printf() (which is used if there is no
supplied buffer).

Sort op_mskqh, op_insqh, and op_extqh.

sync with head

merge to -current.

Do a minor cleanup of alpha (this will make applying pullups post branching
easier).
u_int{8,16,32,64}_t -> uint{*}_t
Change all old-style definitions to C89 prototypes.
Whitespace cleanup.
Constification in db_disasm.c

Catch up to -current.

Update the kqueue branch to HEAD.

Use comments around the token after a #endif.

Catch up to -current.

file db_instruction.h was added on branch nathanw_sa on 2001-09-21 22:34:53 +0000

o IEEE 754 floating-point completion code.
o Implement the architected FP_C "Floating Point Control Quadword"

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Handle a few more SPECIAL intructions.

bring in latest KAME (as of 19991130, KAME/NetBSD141) into kame branch
just for reference purposes.
This commit includes 1.4 -> 1.4.1 sync for kame branch.

The branch does not compile at all (due to the lack of ALTQ and some other
source code).  Please do not try to modify the branch, this is just for
referenre purposes.

synchronization to latest KAME will take place on HEAD branch soon.

Sync w/ -current.

pullup 1.4->1.5 (cgd): BWX instruction emulation and unaligned access

convert to DEC-style register names.  the attempt to use function-based
register names was confusing, and could not _be_ correct in some cases.
Also, add a couple of 'generic' instruction formats which should be used
when decoding instructions before the specific format is known.

Update marc-pcmcia branch from trunk.

Define the "integer miscellaneous" opcode and subfunctions.

Don't define another copy of the PALcode ops here; direct readers to
<machine/pal.h>.

- Add the "amask" and "implver" operate subfunctions.
- Add the "ldbu", "ldwu", "stb", and "stw" major opcodes (BWX instructions).

Update marc-pcmcia branch from trunk.

file db_instruction.h was added on branch marc-pcmcia on 1997-09-06 17:59:39 +0000

Add support for DDB (in-kernel debugger) to NetBSD/alpha, based on
such code for Mach 3's Alpha port.  Initially reworked for NetBSD/alpha
by Chris Demetriou, and then heavily hacked on by me.  Works, but is still
a little rough around the edges.  Known problems:

- Error recovery could be improved a bit.
- Back traces don't work.
- Single-stepping can be flaky, at times.  (Alpha doesn't have hardware
  support for single-stepping, and I'm not entirely convinced the
  MI DDB software-emulated single-stepping logic is 100% correct.)
- Logic for when to drop into DDB needs some improvement.