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Annotation of src/sys/arch/aarch64/include/pmap.h, Revision 1.1.28.4

1.1.28.4! pgoyette    1: /* $NetBSD: pmap.h,v 1.5 2018/06/08 18:09:43 jmcneill Exp $ */
1.1       matt        2:
                      3: /*-
                      4:  * Copyright (c) 2014 The NetBSD Foundation, Inc.
                      5:  * All rights reserved.
                      6:  *
                      7:  * This code is derived from software contributed to The NetBSD Foundation
                      8:  * by Matt Thomas of 3am Software Foundry.
                      9:  *
                     10:  * Redistribution and use in source and binary forms, with or without
                     11:  * modification, are permitted provided that the following conditions
                     12:  * are met:
                     13:  * 1. Redistributions of source code must retain the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer.
                     15:  * 2. Redistributions in binary form must reproduce the above copyright
                     16:  *    notice, this list of conditions and the following disclaimer in the
                     17:  *    documentation and/or other materials provided with the distribution.
                     18:  *
                     19:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     20:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     21:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     22:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     23:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     24:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     25:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     26:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     27:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     28:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     29:  * POSSIBILITY OF SUCH DAMAGE.
                     30:  */
                     31:
                     32: #ifndef _AARCH64_PMAP_H_
                     33: #define _AARCH64_PMAP_H_
                     34:
                     35: #ifdef __aarch64__
                     36:
                     37: #include <sys/types.h>
                     38: #include <sys/pool.h>
1.1.28.1  pgoyette   39: #include <sys/queue.h>
1.1       matt       40: #include <uvm/uvm_pglist.h>
                     41:
1.1.28.1  pgoyette   42: #include <aarch64/pte.h>
                     43:
1.1       matt       44: #define PMAP_GROWKERNEL
                     45: #define PMAP_STEAL_MEMORY
                     46:
1.1.28.1  pgoyette   47: #define __HAVE_VM_PAGE_MD
                     48:
1.1       matt       49: struct pmap {
1.1.28.1  pgoyette   50:        kmutex_t pm_lock;
1.1       matt       51:        struct pool *pm_pvpool;
1.1.28.1  pgoyette   52:        pd_entry_t *pm_l0table;                 /* L0 table: 512G*512 */
                     53:        paddr_t pm_l0table_pa;
                     54:
                     55:        SLIST_HEAD(, vm_page) pm_vmlist;        /* for L[0123] tables */
                     56:
1.1       matt       57:        struct pmap_statistics pm_stats;
1.1.28.1  pgoyette   58:        unsigned int pm_refcnt;
                     59:        int pm_asid;
                     60:        bool pm_activated;
1.1       matt       61: };
                     62:
1.1.28.1  pgoyette   63: struct pv_entry;
1.1       matt       64: struct vm_page_md {
1.1.28.1  pgoyette   65:        kmutex_t mdpg_pvlock;
                     66:        SLIST_ENTRY(vm_page) mdpg_vmlist;       /* L[0-3] table vm_page list */
                     67:        TAILQ_HEAD(, pv_entry) mdpg_pvhead;
                     68:
                     69:        /* VM_PROT_READ means referenced, VM_PROT_WRITE means modified */
                     70:        uint32_t mdpg_flags;
1.1       matt       71: };
                     72:
1.1.28.1  pgoyette   73: /* each mdpg_pvlock will be initialized in pmap_init() */
                     74: #define VM_MDPAGE_INIT(pg)                             \
                     75:        do {                                            \
                     76:                TAILQ_INIT(&(pg)->mdpage.mdpg_pvhead);  \
                     77:                (pg)->mdpage.mdpg_flags = 0;            \
1.1       matt       78:        } while (/*CONSTCOND*/ 0)
                     79:
1.1.28.1  pgoyette   80: #define l0pde_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
                     81: #define l0pde_index(v)         (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT)
                     82: #define l0pde_valid(pde)       (((pde) & LX_VALID) == LX_VALID)
                     83: /* l0pte always contains table entries */
                     84:
                     85: #define l1pde_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
                     86: #define l1pde_index(v)         (((vaddr_t)(v) & L1_ADDR_BITS) >> L1_SHIFT)
                     87: #define l1pde_valid(pde)       (((pde) & LX_VALID) == LX_VALID)
                     88: #define l1pde_is_block(pde)    (((pde) & LX_TYPE) == LX_TYPE_BLK)
                     89: #define l1pde_is_table(pde)    (((pde) & LX_TYPE) == LX_TYPE_TBL)
                     90:
                     91: #define l2pde_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
                     92: #define l2pde_index(v)         (((vaddr_t)(v) & L2_ADDR_BITS) >> L2_SHIFT)
                     93: #define l2pde_valid(pde)       (((pde) & LX_VALID) == LX_VALID)
                     94: #define l2pde_is_block(pde)    (((pde) & LX_TYPE) == LX_TYPE_BLK)
                     95: #define l2pde_is_table(pde)    (((pde) & LX_TYPE) == LX_TYPE_TBL)
                     96:
                     97: #define l3pte_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
                     98: #define l3pte_executable(pde)  \
                     99:     (((pde) & (LX_BLKPAG_UXN|LX_BLKPAG_PXN)) != (LX_BLKPAG_UXN|LX_BLKPAG_PXN))
                    100: #define l3pte_index(v)         (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT)
                    101: #define l3pte_valid(pde)       (((pde) & LX_VALID) == LX_VALID)
                    102: #define l3pte_is_page(pde)     (((pde) & LX_TYPE) == L3_TYPE_PAG)
                    103: /* l3pte contains always page entries */
                    104:
                    105: void pmap_bootstrap(vaddr_t, vaddr_t);
                    106: bool pmap_fault_fixup(struct pmap *, vaddr_t, vm_prot_t, bool user);
                    107: void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...));
                    108:
                    109: /* Hooks for the pool allocator */
                    110: paddr_t vtophys(vaddr_t);
                    111: #define VTOPHYS_FAILED         ((paddr_t)-1L)  /* POOL_PADDR_INVALID */
                    112: #define POOL_VTOPHYS(va)       vtophys((vaddr_t) (va))
                    113:
                    114:
                    115: /* devmap */
                    116: struct pmap_devmap {
                    117:        vaddr_t pd_va;          /* virtual address */
                    118:        paddr_t pd_pa;          /* physical address */
                    119:        psize_t pd_size;        /* size of region */
                    120:        vm_prot_t pd_prot;      /* protection code */
                    121:        u_int pd_flags;         /* flags for pmap_kenter_pa() */
                    122: };
                    123:
                    124: void pmap_devmap_register(const struct pmap_devmap *);
                    125: void pmap_devmap_bootstrap(const struct pmap_devmap *);
                    126: const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t);
                    127: const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t);
                    128: vaddr_t pmap_devmap_phystov(paddr_t);
                    129: paddr_t pmap_devmap_vtophys(paddr_t);
                    130:
                    131: /* devmap use L2 blocks. (2Mbyte) */
                    132: #define DEVMAP_TRUNC_ADDR(x)   ((x) & ~L2_OFFSET)
                    133: #define DEVMAP_ROUND_SIZE(x)   (((x) + L2_SIZE - 1) & ~(L2_SIZE - 1))
                    134:
                    135: #define        DEVMAP_ENTRY(va, pa, sz)                        \
                    136:        {                                               \
                    137:                .pd_va = DEVMAP_TRUNC_ADDR(va),         \
                    138:                .pd_pa = DEVMAP_TRUNC_ADDR(pa),         \
                    139:                .pd_size = DEVMAP_ROUND_SIZE(sz),       \
                    140:                .pd_prot = VM_PROT_READ|VM_PROT_WRITE,  \
                    141:                .pd_flags = PMAP_NOCACHE                \
                    142:        }
                    143: #define        DEVMAP_ENTRY_END        { 0 }
                    144:
                    145: /* mmap cookie and flags */
                    146: #define AARCH64_MMAP_FLAG_SHIFT                (64 - PGSHIFT)
                    147: #define AARCH64_MMAP_FLAG_MASK         0xf
1.1.28.2  pgoyette  148: #define AARCH64_MMAP_WRITEBACK         0UL
                    149: #define AARCH64_MMAP_NOCACHE           1UL
                    150: #define AARCH64_MMAP_WRITECOMBINE      2UL
                    151: #define AARCH64_MMAP_DEVICE            3UL
1.1.28.1  pgoyette  152:
1.1.28.4! pgoyette  153: #define ARM_MMAP_MASK                  __BITS(63, AARCH64_MMAP_FLAG_SHIFT)
        !           154: #define ARM_MMAP_WRITECOMBINE          __SHIFTIN(AARCH64_MMAP_WRITECOMBINE, ARM_MMAP_MASK)
        !           155: #define ARM_MMAP_WRITEBACK             __SHIFTIN(AARCH64_MMAP_WRITEBACK, ARM_MMAP_MASK)
        !           156: #define ARM_MMAP_NOCACHE               __SHIFTIN(AARCH64_MMAP_NOCACHE, ARM_MMAP_MASK)
        !           157: #define ARM_MMAP_DEVICE                        __SHIFTIN(AARCH64_MMAP_DEVICE, ARM_MMAP_MASK)
1.1.28.1  pgoyette  158:
                    159: #define        PMAP_PTE                        0x10000000 /* kenter_pa */
                    160: #define        PMAP_DEV                        0x20000000 /* kenter_pa */
                    161:
                    162: static inline u_int
                    163: aarch64_mmap_flags(paddr_t mdpgno)
                    164: {
                    165:        u_int nflag, pflag;
                    166:
                    167:        /*
                    168:         * aarch64 arch has 4 memory attribute:
                    169:         *
                    170:         *  WriteBack      - write back cache
                    171:         *  WriteThru      - wite through cache
                    172:         *  NoCache        - no cache
                    173:         *  Device(nGnRnE) - no Gathering, no Reordering, no Early write ack
                    174:         *
                    175:         * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags.
                    176:         */
                    177:
                    178:        nflag = (mdpgno >> AARCH64_MMAP_FLAG_SHIFT) & AARCH64_MMAP_FLAG_MASK;
                    179:        switch (nflag) {
                    180:        case AARCH64_MMAP_DEVICE:
                    181:                pflag = PMAP_DEV;
                    182:                break;
                    183:        case AARCH64_MMAP_WRITECOMBINE:
                    184:                pflag = PMAP_WRITE_COMBINE;
                    185:                break;
                    186:        case AARCH64_MMAP_WRITEBACK:
                    187:                pflag = PMAP_WRITE_BACK;
                    188:                break;
                    189:        case AARCH64_MMAP_NOCACHE:
                    190:        default:
                    191:                pflag = PMAP_NOCACHE;
                    192:                break;
                    193:        }
                    194:        return pflag;
                    195: }
                    196:
                    197:
                    198: #define pmap_phys_address(pa)          aarch64_ptob((pa))
                    199: #define pmap_mmap_flags(ppn)           aarch64_mmap_flags((ppn))
                    200:
                    201: #define pmap_update(pmap)              ((void)0)
                    202: #define pmap_copy(dp,sp,d,l,s)         ((void)0)
                    203: #define pmap_wired_count(pmap)         ((pmap)->pm_stats.wired_count)
                    204: #define pmap_resident_count(pmap)      ((pmap)->pm_stats.resident_count)
                    205:
                    206: bool   pmap_extract_coherency(pmap_t, vaddr_t, paddr_t *, bool *);
                    207:
                    208: #define        PMAP_MAPSIZE1   L2_SIZE
                    209:
1.1       matt      210: #elif defined(__arm__)
                    211:
                    212: #include <arm/pmap.h>
                    213:
1.1.28.1  pgoyette  214: #endif /* __arm__/__aarch64__ */
1.1       matt      215:
1.1.28.1  pgoyette  216: #endif /* !_AARCH64_PMAP_ */

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