CVS log for src/sys/arch/aarch64/aarch64/vm_machdep.c

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Keyword substitution: kv
Default branch: MAIN

Remove unnecessary <sys/malloc.h>.

Add a KASSERT

Simplified termination conditions for ddb backtrace.

Exit backtrace when the user trapframe is invalid. (Mainly in kernel threads).

Interrupts may not be enabled yet when cpu_lwp_fork is called during boot,
so remove incorrect KASSERT.

Sync with HEAD.

Sync with HEAD.

fix a comment that has been c&p'ed around and not updated

cpu_lwp_fork: KASSERT -> KASSERTMSG to print the actual value of DAIF if
it is not 0 in cpu_lwp_fork

Pull up following revision(s) (requested by rin in ticket #1174):

	sys/arch/aarch64/aarch64/vm_machdep.c: revision 1.9 (patch)

Fix clone(2) for COMPAT_NETBSD32.
(1) Set r13 (sp for arm32 processes) appropriately when stack is
     specified to fork1().
(2) For arm32 processes, align stack to 8-byte boundary, instead of
     16-byte for native aarch64 processes, to match our 32-bit ABI:
https://nxr.netbsd.org/xref/src/sys/arch/arm/arm32/vm_machdep.c#150

Note that sp alignment checking is disabled in aarch32 mode, and
this works fine with AARCH64_EL0_STACK_ALIGNMENT_CHECK option.

OK ryo

Fix clone(2) for COMPAT_NETBSD32.

(1) Set r13 (sp for arm32 processes) appropriately when stack is
    specified to fork1().

(2) For arm32 processes, align stack to 8-byte boundary, instead of
    16-byte for native aarch64 processes, to match our 32-bit ABI:

https://nxr.netbsd.org/xref/src/sys/arch/arm/arm32/vm_machdep.c#150

Note that sp alignment checking is disabled in aarch32 mode, and
this works fine with AARCH64_EL0_STACK_ALIGNMENT_CHECK option.

OK ryo

Not only the kernel thread, but also the userland PAC keys
(APIA,APIB,APDA,APDB,APGA) are now randomly initialized at exec, and switched
when context switch.
userland programs are able to perform pointer authentication on ARMv8.3+PAC cpu.

reviewd by maxv@, thanks.

fix to do backtrace properly for running LWPs and cpu_lwp_fork().
when dump of pcb_tf, only the switchframe part is now displayed instead of the whole trapframe.

Sync with HEAD

Sync with HEAD

Add support for Pointer Authentication (PAC).

We use the "pac-ret" option, to sign the return instruction pointer on
function entry, and authenticate it on function exit. This acts as a
mitigation against ROP.

The authentication uses a per-lwp (secret) I-A key stored in the 128bit
APIAKey register and part of the lwp context. During lwp creation, the
kernel generates a random key, and during context switches, it installs
the key of the target lwp on the CPU.

Userland cannot read the APIAKey register directly. However, it can sign
its pointers with it, because the register is architecturally shared
between userland and the kernel. Although part of the CPU design, it is
a bit of an undesired behavior, because it allows to forge valid kernel
pointers from userland. To avoid that, we don't share the key with
userland, and rather switch it in EL0<->EL1 transitions. This means that
when userland executes, a different key is loaded in APIAKey than the one
the kernel uses. For now the userland key is a fixed 128bit zero value.

The DDB stack unwinder is changed to strip the authentication code from
the pointers in lr.

Two problems are known:

 * Currently the idlelwps' keys are not really secret. This is because
   the RNG is not yet available when we spawn these lwps. Not overly
   important, but would be nice to fix with UEFI RNG.
 * The key switching in EL0<->EL1 transitions is not the most optimized
   code on the planet. Instead of checking aarch64_pac_enabled, it would
   be better to hot-patch the code at boot time, but there currently is
   no hot-patch support on aarch64.

Tested on Qemu.

Sync with HEAD

Synch with HEAD

make savecore for arm64 basically work.

- move MD lwp "md_ktf" member into struct pcb.  the pcb is used by
  the gdb "bsd-kvm" target code to find the stack of each thread
  and needs to be available in a well known location.
- implement aarch64_nbsd_supply_pcb() in GDB.  makes basic gdb work
  on a crash dump.
- remove '#if L_MD_KTF + 8 == L_MD_CPACR' conditional code, as there
  is no more L_MD_KTF.

with this gdb has minimal working functionality with "target kvm",
and crash can at least "ps" on a crash dump.

ok skrll.

Sync with HEAD

add missing casts

Remove the kernel PMC code. Sent yesterday on tech-kern@.

This change:

 * Removes "options PERFCTRS", the associated includes, and the associated
   ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is
   good.

 * Removes the PMC code of ARM XSCALE.

 * Removes all the pmc.h files. They were all empty, except for ARM XSCALE.

 * Reorders the x86 PMC code not to rely on the legacy pmc.h file. The
   definitions are put in sysarch.h.

 * Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control
   and sys_pmc_get_info syscalls. They are marked as OBSOL in kern,
   netbsd32 and rump.

 * Removes the pmc_evid_t and pmc_ctr_t types.

 * Removes all the associated man pages. The sets are marked as obsolete.

Sync with HEAD.  77 conflicts resolved - all of them $NetBSD$

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

Rebase to HEAD as of a few days ago.

file vm_machdep.c was added on branch tls-maxphys on 2014-08-20 00:02:39 +0000

Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.