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Annotation of src/sys/arch/aarch64/aarch64/vectors.S, Revision 1.4.2.5

1.4.2.5 ! pgoyette    1: /*     $NetBSD: vectors.S,v 1.9 2018/10/12 01:28:57 ryo Exp $  */
1.1       matt        2:
1.2       nisimura    3: #include <aarch64/asm.h>
                      4: #include "assym.h"
1.4.2.3   pgoyette    5: #include "opt_ddb.h"
1.2       nisimura    6:
1.4.2.1   pgoyette    7:        /*
                      8:         * vector_entry macro must be small enough to fit 0x80 bytes!
                      9:         */
1.4.2.5 ! pgoyette   10:        .macro  vector_entry, el, label, tpidr
1.4.2.1   pgoyette   11:        .align 7        /* aligned 0x80 */
1.2       nisimura   12:
1.4       nisimura   13:        .if \el == 1
1.4.2.1   pgoyette   14:        sub     sp, sp, #TF_SIZE        /* need to allocate stack on el1 */
1.4       nisimura   15:        .endif
1.4.2.1   pgoyette   16:
1.2       nisimura   17:        stp     x0, x1, [sp, #TF_X0]
                     18:        stp     x2, x3, [sp, #TF_X2]
                     19:        stp     x4, x5, [sp, #TF_X4]
                     20:        stp     x6, x7, [sp, #TF_X6]
                     21:        stp     x8, x9, [sp, #TF_X8]
                     22:        stp     x10, x11, [sp, #TF_X10]
                     23:        stp     x12, x13, [sp, #TF_X12]
                     24:        stp     x14, x15, [sp, #TF_X14]
                     25:        stp     x16, x17, [sp, #TF_X16]
                     26:        str     x18, [sp, #TF_X18]
                     27:        stp     x19, x20, [sp, #TF_X19]
                     28:        stp     x21, x22, [sp, #TF_X21]
                     29:        stp     x23, x24, [sp, #TF_X23]
                     30:        stp     x25, x26, [sp, #TF_X25]
                     31:        stp     x27, x28, [sp, #TF_X27]
                     32:        stp     x29, x30, [sp, #TF_X29]
1.4.2.1   pgoyette   33:
                     34:        /* get sp and elr */
1.2       nisimura   35:        .if \el == 0
                     36:        mrs     x20, sp_el0
                     37:        .else
1.4.2.1   pgoyette   38:        add     x20, sp, #TF_SIZE       /* sp is already adjusted */
1.2       nisimura   39:        .endif
                     40:        mrs     x21, elr_el1
1.4.2.1   pgoyette   41:
                     42:        /* store sp and elr */
                     43:        .if TF_SP + 8 == TF_PC
                     44:        stp     x20, x21, [sp, #TF_SP]
                     45:        .else
1.2       nisimura   46:        str     x20, [sp, #TF_SP]
                     47:        str     x21, [sp, #TF_PC]
1.4.2.1   pgoyette   48:        .endif
                     49:
                     50:        mrs     x22, spsr_el1
1.2       nisimura   51:        str     x22, [sp, #TF_SPSR]
1.4.2.1   pgoyette   52:
1.2       nisimura   53:        mrs     x23, esr_el1
                     54:        mrs     x24, far_el1
1.4.2.1   pgoyette   55:
                     56:        .if TF_ESR + 8 == TF_FAR
                     57:        stp     x23, x24, [sp, #TF_ESR]
                     58:        .else
1.2       nisimura   59:        str     x23, [sp, #TF_ESR]
                     60:        str     x24, [sp, #TF_FAR]
                     61:        .endif
1.4.2.1   pgoyette   62:
1.2       nisimura   63:        .if \el == 0
1.4.2.5 ! pgoyette   64:        /* curlwp->l_private = tpidr{,ro}_el0 */
1.4.2.1   pgoyette   65:        mrs     x1, tpidr_el1           /* curcpu() */
1.4.2.5 ! pgoyette   66:        ldr     x1, [x1, #CI_CURLWP]    /* x1 = curcpu()->ci_curlwp */
        !            67:        mrs     x0, tpidr\tpidr\()_el0
        !            68:        str     x0, [x1, #L_PRIVATE]    /* curlwp->l_private = tpidr{,ro}_el0 */
1.2       nisimura   69:        .endif
1.4.2.1   pgoyette   70:
1.4.2.2   pgoyette   71:        adr     x30, el\el\()_trap_exit /* el[01]_trap_exit */
1.4.2.1   pgoyette   72:        mov     x0, sp
1.4.2.3   pgoyette   73: #ifdef DDB
                     74:        mov     x29, sp                 /* for backtrace */
                     75: #endif
1.4.2.1   pgoyette   76:        b       \label
1.2       nisimura   77:        .endm
                     78:
1.4.2.1   pgoyette   79:
                     80:        .align 11       /* vector table must be aligned 2048 */
1.4.2.4   pgoyette   81: ENTRY_NP(el1_vectors)
1.1       matt       82: /*
1.4.2.1   pgoyette   83:  * Exception taken from current Exception Level with SP_EL0.
1.1       matt       84:  * (These shouldn't happen)
                     85:  */
1.4.2.1   pgoyette   86:        vector_entry    1, trap_el1t_sync
                     87:        vector_entry    1, trap_el1t_irq
                     88:        vector_entry    1, trap_el1t_fiq
                     89:        vector_entry    1, trap_el1t_error
                     90:
1.1       matt       91: /*
1.4.2.1   pgoyette   92:  * Exception taken from current Exception Level with SP_EL1.
1.4       nisimura   93:  * There are entries for exceptions caused in EL1 (kernel exceptions).
1.1       matt       94:  */
1.4.2.1   pgoyette   95:        vector_entry    1, trap_el1h_sync
                     96:        vector_entry    1, interrupt
                     97:        vector_entry    1, trap_el1h_fiq
                     98:        vector_entry    1, trap_el1h_error
                     99:
1.1       matt      100: /*
1.4       nisimura  101:  * Exception taken from lower Exception Level which is using AArch64
                    102:  * There are entries for exceptions caused in EL0 (native user exceptions).
1.1       matt      103:  */
1.4.2.1   pgoyette  104:        vector_entry    0, trap_el0_sync
                    105:        vector_entry    0, interrupt
                    106:        vector_entry    0, trap_el0_fiq
                    107:        vector_entry    0, trap_el0_error
                    108:
1.1       matt      109: /*
1.4       nisimura  110:  * Exception taken from lower Exception Level which is using AArch32
                    111:  * There are entries for exceptions caused in EL0 (compat user exceptions).
1.1       matt      112:  */
1.4.2.5 ! pgoyette  113:        vector_entry    0, trap_el0_32sync, ro
        !           114:        vector_entry    0, interrupt, ro
        !           115:        vector_entry    0, trap_el0_32fiq, ro
        !           116:        vector_entry    0, trap_el0_32error, ro
1.4.2.1   pgoyette  117: END(el1_vectors)