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Revision 1.5, Sun Feb 2 18:06:33 2014 UTC (6 years, 6 months ago) by dholland
Branch: MAIN
CVS Tags: yamt-pagecache-base9, tls-maxphys-base, tls-earlyentropy-base, tls-earlyentropy, riastradh-xf86-video-intel-2-7-1-pre-2-21-15, riastradh-drm2-base3, prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, phil-wifi-base, phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, phil-wifi-20191119, phil-wifi-20190609, phil-wifi, pgoyette-localcount-base, pgoyette-localcount-20170426, pgoyette-localcount-20170320, pgoyette-localcount-20170107, pgoyette-localcount-20161104, pgoyette-localcount-20160806, pgoyette-localcount-20160726, pgoyette-localcount, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, perseant-stdc-iso10646-base, perseant-stdc-iso10646, netbsd-9-base, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, netbsd-8-base, netbsd-8-2-RELEASE, netbsd-8-1-RELEASE, netbsd-8-1-RC1, netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1, netbsd-8, netbsd-7-nhusb-base-20170116, netbsd-7-nhusb-base, netbsd-7-nhusb, netbsd-7-base, netbsd-7-2-RELEASE, netbsd-7-1-RELEASE, netbsd-7-1-RC2, netbsd-7-1-RC1, netbsd-7-1-2-RELEASE, netbsd-7-1-1-RELEASE, netbsd-7-1, netbsd-7-0-RELEASE, netbsd-7-0-RC3, netbsd-7-0-RC2, netbsd-7-0-RC1, netbsd-7-0-2-RELEASE, netbsd-7-0-1-RELEASE, netbsd-7-0, netbsd-7, matt-nb8-mediatek-base, matt-nb8-mediatek, localcount-20160914, is-mlppp-base, is-mlppp, bouyer-socketcan-base1, bouyer-socketcan-base, bouyer-socketcan, HEAD
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.\"	$NetBSD: atomic_cas.3,v 1.5 2014/02/02 18:06:33 dholland Exp $
.\"
.\" Copyright (c) 2007, 2010 The NetBSD Foundation, Inc.
.\" All rights reserved.
.\"
.\" This code is derived from software contributed to The NetBSD Foundation
.\" by Jason R. Thorpe.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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.\" PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd February 2, 2014
.Dt ATOMIC_CAS 3
.Os
.Sh NAME
.Nm atomic_cas ,
.Nm atomic_cas_32 ,
.Nm atomic_cas_uint ,
.Nm atomic_cas_ulong ,
.Nm atomic_cas_ptr ,
.Nm atomic_cas_64 ,
.Nm atomic_cas_32_ni ,
.Nm atomic_cas_uint_ni ,
.Nm atomic_cas_ulong_ni ,
.Nm atomic_cas_ptr_ni ,
.Nm atomic_cas_64_ni
.Nd atomic compare-and-swap operations
.\" .Sh LIBRARY
.\" .Lb libc
.Sh SYNOPSIS
.In sys/atomic.h
.Ft uint32_t
.Fn atomic_cas_32 "volatile uint32_t *ptr" "uint32_t expected" "uint32_t new"
.Ft unsigned int
.Fn atomic_cas_uint "volatile unsigned int *ptr" "unsigned int expected" \
    "unsigned int new"
.Ft unsigned long
.Fn atomic_cas_ulong "volatile unsigned long *ptr" "unsigned long expected" \
    "unsigned long new"
.Ft void *
.Fn atomic_cas_ptr "volatile void *ptr" "void *expected" "void *new"
.Ft uint64_t
.Fn atomic_cas_64 "volatile uint64_t *ptr" "uint64_t expected" "uint64_t new"
.Ft uint32_t
.Fn atomic_cas_32_ni "volatile uint32_t *ptr" "uint32_t expected" \
    "uint32_t new"
.Ft unsigned int
.Fn atomic_cas_uint_ni "volatile unsigned int *ptr" "unsigned int expected" \
    "unsigned int new"
.Ft unsigned long
.Fn atomic_cas_ulong_ni "volatile unsigned long *ptr" \
    "unsigned long expected" "unsigned long new"
.Ft void *
.Fn atomic_cas_ptr_ni "volatile void *ptr" "void *expected" "void *new"
.Ft uint64_t
.Fn atomic_cas_64_ni "volatile uint64_t *ptr" "uint64_t expected" \
    "uint64_t new"
.Sh DESCRIPTION
The
.Nm atomic_cas
family of functions perform an atomic conditional assignment.
The value
.Fa new
is assigned to the variable referenced by
.Fa ptr .
The assignment succeeds
if and only if its current value matches the value
.Fa expected .
If the value is different, the assignment fails and no change is
made.
This operation is sometimes known as
.Dq compare-and-swap .
These functions always return the value found via
.Fa ptr .
Callers test for success by comparing the return value to the value
passed as
.Fa expected ;
if they are equal then the new value was stored; if they are not, the
value was not changed.
.Pp
The non-interlocked variants,
.Fn *_ni ,
guarantee atomicity within the same CPU with respect to
interrupts and preemption.
They are not atomic with respect to different CPUs.
These can be used to avoid interprocessor synchronization overhead
in some cases; for example, they are suitable for synchronized
operations on a variable shared by a thread and an interrupt that are
bound to the same CPU.
.Pp
The 64-bit variants of these functions are available only on platforms
that can support atomic 64-bit memory access.
Applications can check for the availability of 64-bit atomic memory
operations by testing if the pre-processor macro
.Dv __HAVE_ATOMIC64_OPS
is defined.
.Sh SEE ALSO
.Xr atomic_ops 3
.Sh HISTORY
The
.Nm atomic_cas
functions first appeared in
.Nx 5.0 .
.Sh NOTES
On some architectures, a
.Fn *_ni
variant is merely an alias for the corresponding standard
compare-and-swap operation.
While the non-interlocked variant behaves correctly on those
architectures, it does not avoid the interprocessor synchronization
overhead.