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Annotation of src/external/gpl3/binutils/dist/opcodes/spu-opc.c, Revision 1.1.1.4.2.1

1.1       skrll       1: /* SPU opcode list
                      2:
1.1.1.4.2.1! martin      3:    Copyright (C) 2006-2020 Free Software Foundation, Inc.
1.1       skrll       4:
                      5:    This file is part of the GNU opcodes library.
                      6:
                      7:    This library is free software; you can redistribute it and/or modify
                      8:    it under the terms of the GNU General Public License as published by
                      9:    the Free Software Foundation; either version 3, or (at your option)
                     10:    any later version.
                     11:
                     12:    It is distributed in the hope that it will be useful, but WITHOUT
                     13:    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
                     14:    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
                     15:    License for more details.
                     16:
                     17:    You should have received a copy of the GNU General Public License
                     18:    along with this file; see the file COPYING.  If not, write to the
                     19:    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
                     20:    MA 02110-1301, USA.  */
                     21:
                     22: #include "opcode/spu.h"
                     23:
                     24: /* This file holds the Spu opcode table */
                     25: 
                     26:
                     27: /*
                     28:    Example contents of spu-insn.h
1.1.1.2   christos   29:       id_tag   mode    mode    type    opcode  mnemonic        asmtype     dependency          FPU     L/S?    branch? instruction
                     30:                 QUAD   WORD                                               (0,RC,RB,RA,RT)    latency
                     31:    APUOP(M_LQD,        1,      0,      RI9,    0x1f8,  "lqd",          ASM_RI9IDX,     00012,          FXU,    1,      0)      Load Quadword d-form
1.1       skrll      32:  */
                     33:
                     34: const struct spu_opcode spu_opcodes[] = {
                     35: #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
                     36:        { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
                     37: #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
                     38:        { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
                     39: #include "opcode/spu-insns.h"
                     40: #undef APUOP
                     41: #undef APUOPFB
                     42: };
                     43:
                     44: const int spu_num_opcodes =
                     45:   sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);