src/external/gpl3/binutils/dist/opcodes/arc-dis.c - diff

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Diff for /src/external/gpl3/binutils/dist/opcodes/arc-dis.c between version 1.1.1.7 and 1.1.1.8

version 1.1.1.7, 2018/11/06 21:19:06

version 1.1.1.8, 2020/04/03 23:39:42

Line 1

/* Instruction printing code for the ARC.

Contributed by Claudiu Zissulescu (claziss@synopsys.com)

Line 90 static const char * const regnames[64] =

"r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",

"r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",

"r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",

"r56", "r57", "ACCL", "ACCH", "lp_count", "rezerved", "LIMM", "pcl"

"r56", "r57", "r58", "r59", "lp_count", "reserved", "LIMM", "pcl"

};

static const char * const addrtypenames[ARC_NUM_ADDRTYPES] =

Line 137 static bfd_boolean print_hex = FALSE;

(info->endian == BFD_ENDIAN_LITTLE ? bfd_getm32 (bfd_getl32 (buf)) \

: bfd_getb32 (buf))

#define BITS(word,s,e) (((word) << (sizeof (word) * 8 - 1 - e)) >> \

#define BITS(word,s,e) (((word) >> (s)) & ((1ull << ((e) - (s)) << 1) - 1))

(s + (sizeof (word) * 8 - 1 - e)))

#define OPCODE_32BIT_INSN(word) (BITS ((word), 27, 31))

/* Functions implementation. */

Line 181 skip_this_opcode (const struct arc_opcod

Line 180 skip_this_opcode (const struct arc_opcod

/* Check opcode for major 0x06, return if it is not in. */

if (arc_opcode_len (opcode) == 4

&& OPCODE_32BIT_INSN (opcode->opcode) != 0x06)

&& (OPCODE_32BIT_INSN (opcode->opcode) != 0x06

/* Can be an APEX extensions. */

&& OPCODE_32BIT_INSN (opcode->opcode) != 0x07))

return FALSE;

/* or not a known truble class. */

Line 190 skip_this_opcode (const struct arc_opcod

Line 191 skip_this_opcode (const struct arc_opcod

case FLOAT:

case DSP:

case ARITH:

case MPY:

break;

default:

return FALSE;

Line 292 find_format_from_table (struct disassemb

Line 294 find_format_from_table (struct disassemb

if (operand->extract)

value = (*operand->extract) (insn, &invalid);

else

value = (insn >> operand->shift) & ((1 << operand->bits) - 1);

value = (insn >> operand->shift) & ((1ull << operand->bits) - 1);

/* Check for LIMM indicator. If it is there, then make sure

we pick the right format. */

Line 669 arc_insn_length (bfd_byte msb, bfd_byte

Line 671 arc_insn_length (bfd_byte msb, bfd_byte

break;

default:

abort ();

return 0;

}

Line 764 parse_option (const char *option)

Line 766 parse_option (const char *option)

else if (disassembler_options_cmp (option, "fpuda") == 0)

add_to_decodelist (FLOAT, DPA);

else if (disassembler_options_cmp (option, "nps400") == 0)

{

add_to_decodelist (ACL, NPS400);

add_to_decodelist (ARITH, NPS400);

add_to_decodelist (BITOP, NPS400);

add_to_decodelist (BMU, NPS400);

add_to_decodelist (CONTROL, NPS400);

add_to_decodelist (DMA, NPS400);

add_to_decodelist (DPI, NPS400);

add_to_decodelist (MEMORY, NPS400);

add_to_decodelist (MISC, NPS400);

add_to_decodelist (NET, NPS400);

add_to_decodelist (PMU, NPS400);

add_to_decodelist (PROTOCOL_DECODE, NPS400);

add_to_decodelist (ULTRAIP, NPS400);

}

else if (disassembler_options_cmp (option, "fpus") == 0)

{

add_to_decodelist (FLOAT, SP);

Line 989 print_insn_arc (bfd_vma memaddr,

Line 1008 print_insn_arc (bfd_vma memaddr,

the number of bytes objdump should display on a single line. If

the instruction decoder sets this, it should always set it to

the same value in order to get reasonable looking output. */

info->bytes_per_line = 8;

/* In the next lines, we set two info variables control the way

Line 997 print_insn_arc (bfd_vma memaddr,

Line 1015 print_insn_arc (bfd_vma memaddr,

8 and bytes_per_chunk is 4, the output will look like this:

00: 00000000 00000000

with the chunks displayed according to "display_endian". */

if (info->section

&& !(info->section->flags & SEC_CODE))

{

Line 1052 print_insn_arc (bfd_vma memaddr,

Line 1069 print_insn_arc (bfd_vma memaddr,

(*info->fprintf_func) (info->stream, ".word\t0x%08lx", data);

break;

default:

abort ();

return -1;

}

return size;

}

insn_len = arc_insn_length (buffer[highbyte], buffer[lowbyte], info);

pr_debug ("instruction length = %d bytes\n", insn_len);

if (insn_len == 0)

return -1;

arc_infop = info->private_data;

arc_infop->insn_len = insn_len;

Line 1111 print_insn_arc (bfd_vma memaddr,

Line 1131 print_insn_arc (bfd_vma memaddr,

default:

/* There is no instruction whose length is not 2, 4, 6, or 8. */

abort ();

return -1;

}

pr_debug ("instruction value = %llx\n", insn);

Line 1139 print_insn_arc (bfd_vma memaddr,

Line 1159 print_insn_arc (bfd_vma memaddr,

(*info->fprintf_func) (info->stream, ".shor\t%#04llx",

insn & 0xffff);

break;

case 4:

(*info->fprintf_func) (info->stream, ".word\t%#08llx",

insn & 0xffffffff);

break;

case 6:

(*info->fprintf_func) (info->stream, ".long\t%#08llx",

insn & 0xffffffff);

(*info->fprintf_func) (info->stream, ".long\t%#04llx",

(insn >> 32) & 0xffff);

break;

case 8:

(*info->fprintf_func) (info->stream, ".long\t%#08llx",

insn & 0xffffffff);

(*info->fprintf_func) (info->stream, ".long\t%#08llx",

insn >> 32);

break;

default:

abort ();

return -1;

}

info->insn_type = dis_noninsn;

Line 1411 with -M switch (multiple options should

Line 1435 with -M switch (multiple options should

fprintf (stream, _("\

fpud Recognize double precision FPU instructions.\n"));

fprintf (stream, _("\

nps400 Recognize NPS400 instructions.\n"));

fprintf (stream, _("\

hex Use only hexadecimal number to print immediates.\n"));

}

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