Annotation of src/external/gpl3/binutils.old/dist/opcodes/s390-opc.c, Revision 1.6
1.1 christos 1: /* s390-opc.c -- S390 opcode list
1.6 ! christos 2: Copyright (C) 2000-2018 Free Software Foundation, Inc.
1.1 christos 3: Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
4:
5: This file is part of the GNU opcodes library.
6:
7: This library is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 3, or (at your option)
10: any later version.
11:
12: It is distributed in the hope that it will be useful, but WITHOUT
13: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14: or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15: License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with this file; see the file COPYING. If not, write to the
19: Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20: MA 02110-1301, USA. */
21:
22: #include <stdio.h>
23: #include "ansidecl.h"
24: #include "opcode/s390.h"
25:
26: /* This file holds the S390 opcode table. The opcode table
27: includes almost all of the extended instruction mnemonics. This
28: permits the disassembler to use them, and simplifies the assembler
29: logic, at the cost of increasing the table size. The table is
30: strictly constant data, so the compiler should be able to put it in
31: the .text section.
32:
33: This file also holds the operand table. All knowledge about
34: inserting operands into instructions and vice-versa is kept in this
35: file. */
36:
37: /* The operands table.
38: The fields are bits, shift, insert, extract, flags. */
39:
40: const struct s390_operand s390_operands[] =
41: {
42: #define UNUSED 0
43: { 0, 0, 0 }, /* Indicates the end of the operand list */
44:
45: /* General purpose register operands. */
46:
1.3 christos 47: #define R_8 1 /* GPR starting at position 8 */
1.1 christos 48: { 4, 8, S390_OPERAND_GPR },
1.3 christos 49: #define R_12 2 /* GPR starting at position 12 */
1.1 christos 50: { 4, 12, S390_OPERAND_GPR },
1.3 christos 51: #define R_16 3 /* GPR starting at position 16 */
1.1 christos 52: { 4, 16, S390_OPERAND_GPR },
1.3 christos 53: #define R_20 4 /* GPR starting at position 20 */
1.1 christos 54: { 4, 20, S390_OPERAND_GPR },
1.3 christos 55: #define R_24 5 /* GPR starting at position 24 */
1.1 christos 56: { 4, 24, S390_OPERAND_GPR },
1.3 christos 57: #define R_28 6 /* GPR starting at position 28 */
1.1 christos 58: { 4, 28, S390_OPERAND_GPR },
1.3 christos 59: #define R_32 7 /* GPR starting at position 32 */
1.1 christos 60: { 4, 32, S390_OPERAND_GPR },
61:
62: /* General purpose register pair operands. */
63:
1.3 christos 64: #define RE_8 8 /* GPR starting at position 8 */
1.1 christos 65: { 4, 8, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
1.3 christos 66: #define RE_12 9 /* GPR starting at position 12 */
1.1 christos 67: { 4, 12, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
1.3 christos 68: #define RE_16 10 /* GPR starting at position 16 */
1.1 christos 69: { 4, 16, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
1.3 christos 70: #define RE_20 11 /* GPR starting at position 20 */
1.1 christos 71: { 4, 20, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
1.3 christos 72: #define RE_24 12 /* GPR starting at position 24 */
1.1 christos 73: { 4, 24, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
1.3 christos 74: #define RE_28 13 /* GPR starting at position 28 */
1.1 christos 75: { 4, 28, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
1.3 christos 76: #define RE_32 14 /* GPR starting at position 32 */
1.1 christos 77: { 4, 32, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
78:
79: /* Floating point register operands. */
80:
1.3 christos 81: #define F_8 15 /* FPR starting at position 8 */
1.1 christos 82: { 4, 8, S390_OPERAND_FPR },
1.3 christos 83: #define F_12 16 /* FPR starting at position 12 */
1.1 christos 84: { 4, 12, S390_OPERAND_FPR },
1.3 christos 85: #define F_16 17 /* FPR starting at position 16 */
1.1 christos 86: { 4, 16, S390_OPERAND_FPR },
1.3 christos 87: #define F_24 18 /* FPR starting at position 24 */
1.1 christos 88: { 4, 24, S390_OPERAND_FPR },
1.3 christos 89: #define F_28 19 /* FPR starting at position 28 */
1.1 christos 90: { 4, 28, S390_OPERAND_FPR },
1.3 christos 91: #define F_32 20 /* FPR starting at position 32 */
1.1 christos 92: { 4, 32, S390_OPERAND_FPR },
93:
94: /* Floating point register pair operands. */
95:
1.3 christos 96: #define FE_8 21 /* FPR starting at position 8 */
1.1 christos 97: { 4, 8, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
1.3 christos 98: #define FE_12 22 /* FPR starting at position 12 */
1.1 christos 99: { 4, 12, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
1.3 christos 100: #define FE_16 23 /* FPR starting at position 16 */
1.1 christos 101: { 4, 16, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
1.3 christos 102: #define FE_24 24 /* FPR starting at position 24 */
1.1 christos 103: { 4, 24, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
1.3 christos 104: #define FE_28 25 /* FPR starting at position 28 */
1.1 christos 105: { 4, 28, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
1.3 christos 106: #define FE_32 26 /* FPR starting at position 32 */
1.1 christos 107: { 4, 32, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
108:
1.3 christos 109: /* Vector register operands. */
110:
111: /* For each of these operands and additional bit in the RXB operand is
112: needed. */
113:
114: #define V_8 27 /* Vector reg. starting at position 8 */
115: { 4, 8, S390_OPERAND_VR },
116: #define V_12 28 /* Vector reg. starting at position 12 */
117: { 4, 12, S390_OPERAND_VR },
118: #define V_CP16_12 29 /* Vector reg. starting at position 12 */
119: { 4, 12, S390_OPERAND_VR | S390_OPERAND_CP16 }, /* with a copy at pos 16 */
120: #define V_16 30 /* Vector reg. starting at position 16 */
121: { 4, 16, S390_OPERAND_VR },
122: #define V_32 31 /* Vector reg. starting at position 32 */
123: { 4, 32, S390_OPERAND_VR },
1.1 christos 124:
125: /* Access register operands. */
126:
1.3 christos 127: #define A_8 32 /* Access reg. starting at position 8 */
1.1 christos 128: { 4, 8, S390_OPERAND_AR },
1.3 christos 129: #define A_12 33 /* Access reg. starting at position 12 */
1.1 christos 130: { 4, 12, S390_OPERAND_AR },
1.3 christos 131: #define A_24 34 /* Access reg. starting at position 24 */
1.1 christos 132: { 4, 24, S390_OPERAND_AR },
1.3 christos 133: #define A_28 35 /* Access reg. starting at position 28 */
1.1 christos 134: { 4, 28, S390_OPERAND_AR },
135:
136: /* Control register operands. */
137:
1.3 christos 138: #define C_8 36 /* Control reg. starting at position 8 */
1.1 christos 139: { 4, 8, S390_OPERAND_CR },
1.3 christos 140: #define C_12 37 /* Control reg. starting at position 12 */
1.1 christos 141: { 4, 12, S390_OPERAND_CR },
142:
143: /* Base register operands. */
144:
1.3 christos 145: #define B_16 38 /* Base register starting at position 16 */
1.1 christos 146: { 4, 16, S390_OPERAND_BASE | S390_OPERAND_GPR },
1.3 christos 147: #define B_32 39 /* Base register starting at position 32 */
1.1 christos 148: { 4, 32, S390_OPERAND_BASE | S390_OPERAND_GPR },
149:
1.3 christos 150: #define X_12 40 /* Index register starting at position 12 */
1.1 christos 151: { 4, 12, S390_OPERAND_INDEX | S390_OPERAND_GPR },
152:
1.3 christos 153: #define VX_12 41 /* Vector index register starting at position 12 */
154: { 4, 12, S390_OPERAND_INDEX | S390_OPERAND_VR },
155:
1.1 christos 156: /* Address displacement operands. */
157:
1.3 christos 158: #define D_20 42 /* Displacement starting at position 20 */
1.1 christos 159: { 12, 20, S390_OPERAND_DISP },
1.3 christos 160: #define D_36 43 /* Displacement starting at position 36 */
1.1 christos 161: { 12, 36, S390_OPERAND_DISP },
1.3 christos 162: #define D20_20 44 /* 20 bit displacement starting at 20 */
1.1 christos 163: { 20, 20, S390_OPERAND_DISP | S390_OPERAND_SIGNED },
164:
165: /* Length operands. */
166:
1.3 christos 167: #define L4_8 45 /* 4 bit length starting at position 8 */
1.1 christos 168: { 4, 8, S390_OPERAND_LENGTH },
1.3 christos 169: #define L4_12 46 /* 4 bit length starting at position 12 */
1.1 christos 170: { 4, 12, S390_OPERAND_LENGTH },
1.3 christos 171: #define L8_8 47 /* 8 bit length starting at position 8 */
1.1 christos 172: { 8, 8, S390_OPERAND_LENGTH },
173:
174: /* Signed immediate operands. */
175:
1.3 christos 176: #define I8_8 48 /* 8 bit signed value starting at 8 */
1.1 christos 177: { 8, 8, S390_OPERAND_SIGNED },
1.3 christos 178: #define I8_32 49 /* 8 bit signed value starting at 32 */
1.1 christos 179: { 8, 32, S390_OPERAND_SIGNED },
1.3 christos 180: #define I12_12 50 /* 12 bit signed value starting at 12 */
181: { 12, 12, S390_OPERAND_SIGNED },
182: #define I16_16 51 /* 16 bit signed value starting at 16 */
1.1 christos 183: { 16, 16, S390_OPERAND_SIGNED },
1.3 christos 184: #define I16_32 52 /* 16 bit signed value starting at 32 */
1.1 christos 185: { 16, 32, S390_OPERAND_SIGNED },
1.3 christos 186: #define I24_24 53 /* 24 bit signed value starting at 24 */
187: { 24, 24, S390_OPERAND_SIGNED },
188: #define I32_16 54 /* 32 bit signed value starting at 16 */
1.1 christos 189: { 32, 16, S390_OPERAND_SIGNED },
190:
191: /* Unsigned immediate operands. */
192:
1.3 christos 193: #define U4_8 55 /* 4 bit unsigned value starting at 8 */
1.1 christos 194: { 4, 8, 0 },
1.3 christos 195: #define U4_12 56 /* 4 bit unsigned value starting at 12 */
1.1 christos 196: { 4, 12, 0 },
1.3 christos 197: #define U4_16 57 /* 4 bit unsigned value starting at 16 */
1.1 christos 198: { 4, 16, 0 },
1.3 christos 199: #define U4_20 58 /* 4 bit unsigned value starting at 20 */
1.1 christos 200: { 4, 20, 0 },
1.3 christos 201: #define U4_24 59 /* 4 bit unsigned value starting at 24 */
202: { 4, 24, 0 },
203: #define U4_OR1_24 60 /* 4 bit unsigned value ORed with 1 */
204: { 4, 24, S390_OPERAND_OR1 }, /* starting at 24 */
205: #define U4_OR2_24 61 /* 4 bit unsigned value ORed with 2 */
206: { 4, 24, S390_OPERAND_OR2 }, /* starting at 24 */
207: #define U4_OR3_24 62 /* 4 bit unsigned value ORed with 3 */
208: { 4, 24, S390_OPERAND_OR1 | S390_OPERAND_OR2 }, /* starting at 24 */
209: #define U4_28 63 /* 4 bit unsigned value starting at 28 */
210: { 4, 28, 0 },
211: #define U4_OR8_28 64 /* 4 bit unsigned value ORed with 8 */
212: { 4, 28, S390_OPERAND_OR8 }, /* starting at 28 */
213: #define U4_32 65 /* 4 bit unsigned value starting at 32 */
1.1 christos 214: { 4, 32, 0 },
1.3 christos 215: #define U4_36 66 /* 4 bit unsigned value starting at 36 */
216: { 4, 36, 0 },
217: #define U8_8 67 /* 8 bit unsigned value starting at 8 */
1.1 christos 218: { 8, 8, 0 },
1.3 christos 219: #define U8_16 68 /* 8 bit unsigned value starting at 16 */
1.1 christos 220: { 8, 16, 0 },
1.3 christos 221: #define U8_24 69 /* 8 bit unsigned value starting at 24 */
1.1 christos 222: { 8, 24, 0 },
1.6 ! christos 223: #define U8_28 70 /* 8 bit unsigned value starting at 28 */
! 224: { 8, 28, 0 },
! 225: #define U8_32 71 /* 8 bit unsigned value starting at 32 */
1.1 christos 226: { 8, 32, 0 },
1.6 ! christos 227: #define U12_16 72 /* 12 bit unsigned value starting at 16 */
1.3 christos 228: { 12, 16, 0 },
1.6 ! christos 229: #define U16_16 73 /* 16 bit unsigned value starting at 16 */
1.1 christos 230: { 16, 16, 0 },
1.6 ! christos 231: #define U16_32 74 /* 16 bit unsigned value starting at 32 */
1.1 christos 232: { 16, 32, 0 },
1.6 ! christos 233: #define U32_16 75 /* 32 bit unsigned value starting at 16 */
1.1 christos 234: { 32, 16, 0 },
235:
236: /* PC-relative address operands. */
237:
1.6 ! christos 238: #define J12_12 76 /* 12 bit PC relative offset at 12 */
1.3 christos 239: { 12, 12, S390_OPERAND_PCREL },
1.6 ! christos 240: #define J16_16 77 /* 16 bit PC relative offset at 16 */
1.1 christos 241: { 16, 16, S390_OPERAND_PCREL },
1.6 ! christos 242: #define J16_32 78 /* 16 bit PC relative offset at 32 */
1.3 christos 243: { 16, 32, S390_OPERAND_PCREL },
1.6 ! christos 244: #define J24_24 79 /* 24 bit PC relative offset at 24 */
1.3 christos 245: { 24, 24, S390_OPERAND_PCREL },
1.6 ! christos 246: #define J32_16 80 /* 32 bit PC relative offset at 16 */
1.1 christos 247: { 32, 16, S390_OPERAND_PCREL },
248:
249: };
250:
251:
252: /* Macros used to form opcodes. */
253:
254: /* 8/16/48 bit opcodes. */
255: #define OP8(x) { x, 0x00, 0x00, 0x00, 0x00, 0x00 }
256: #define OP16(x) { x >> 8, x & 255, 0x00, 0x00, 0x00, 0x00 }
1.3 christos 257: #define OP32(x) { x >> 24, (x >> 16) & 255, (x >> 8) & 255, x & 255, \
258: 0x00, 0x00 }
1.1 christos 259: #define OP48(x) { x >> 40, (x >> 32) & 255, (x >> 24) & 255, \
1.3 christos 260: (x >> 16) & 255, (x >> 8) & 255, x & 255}
1.1 christos 261:
262: /* The new format of the INSTR_x_y and MASK_x_y defines is based
263: on the following rules:
264: 1) the middle part of the definition (x in INSTR_x_y) is the official
265: names of the instruction format that you can find in the principals
266: of operation.
267: 2) the last part of the definition (y in INSTR_x_y) gives you an idea
268: which operands the binary represenation of the instruction has.
269: The meanings of the letters in y are:
270: a - access register
271: c - control register
272: d - displacement, 12 bit
273: f - floating pointer register
1.3 christos 274: fe - fpr extended operand, a valid floating pointer register pair
1.1 christos 275: i - signed integer, 4, 8, 16 or 32 bit
276: l - length, 4 or 8 bit
277: p - pc relative
278: r - general purpose register
1.3 christos 279: re - gpr extended operand, a valid general purpose register pair
1.1 christos 280: u - unsigned integer, 4, 8, 16 or 32 bit
281: m - mode field, 4 bit
282: 0 - operand skipped.
283: The order of the letters reflects the layout of the format in
284: storage and not the order of the paramaters of the instructions.
285: The use of the letters is not a 100% match with the PoP but it is
286: quite close.
287:
288: For example the instruction "mvo" is defined in the PoP as follows:
1.3 christos 289:
1.1 christos 290: MVO D1(L1,B1),D2(L2,B2) [SS]
291:
292: --------------------------------------
293: | 'F1' | L1 | L2 | B1 | D1 | B2 | D2 |
294: --------------------------------------
295: 0 8 12 16 20 32 36
296:
297: The instruction format is: INSTR_SS_LLRDRD / MASK_SS_LLRDRD. */
298:
1.3 christos 299: #define INSTR_E 2, { 0,0,0,0,0,0 } /* e.g. pr */
300: #define INSTR_IE_UU 4, { U4_24,U4_28,0,0,0,0 } /* e.g. niai */
301: #define INSTR_MII_UPP 6, { U4_8,J12_12,J24_24 } /* e.g. bprp */
302: #define INSTR_RIE_RRP 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxhg */
303: #define INSTR_RIE_RRPU 6, { R_8,R_12,U4_32,J16_16,0,0 } /* e.g. crj */
304: #define INSTR_RIE_RRP0 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. cgrjne */
305: #define INSTR_RIE_RRI0 6, { R_8,R_12,I16_16,0,0,0 } /* e.g. ahik */
306: #define INSTR_RIE_RUPI 6, { R_8,I8_32,U4_12,J16_16,0,0 } /* e.g. cij */
307: #define INSTR_RIE_R0PI 6, { R_8,I8_32,J16_16,0,0,0 } /* e.g. cijne */
308: #define INSTR_RIE_RUPU 6, { R_8,U8_32,U4_12,J16_16,0,0 } /* e.g. clij */
309: #define INSTR_RIE_R0PU 6, { R_8,U8_32,J16_16,0,0,0 } /* e.g. clijne */
310: #define INSTR_RIE_R0IU 6, { R_8,I16_16,U4_32,0,0,0 } /* e.g. cit */
311: #define INSTR_RIE_R0I0 6, { R_8,I16_16,0,0,0,0 } /* e.g. citne */
312: #define INSTR_RIE_R0UU 6, { R_8,U16_16,U4_32,0,0,0 } /* e.g. clfit */
313: #define INSTR_RIE_R0U0 6, { R_8,U16_16,0,0,0,0 } /* e.g. clfitne */
314: #define INSTR_RIE_RUI0 6, { R_8,I16_16,U4_12,0,0,0 } /* e.g. lochi */
315: #define INSTR_RIE_RRUUU 6, { R_8,R_12,U8_16,U8_24,U8_32,0 } /* e.g. rnsbg */
316: #define INSTR_RIL_0P 6, { J32_16,0,0,0,0 } /* e.g. jg */
317: #define INSTR_RIL_RP 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */
318: #define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
319: #define INSTR_RIL_RI 6, { R_8,I32_16,0,0,0,0 } /* e.g. afi */
320: #define INSTR_RIL_RU 6, { R_8,U32_16,0,0,0,0 } /* e.g. alfi */
321: #define INSTR_RI_0P 4, { J16_16,0,0,0,0,0 } /* e.g. j */
322: #define INSTR_RI_RI 4, { R_8,I16_16,0,0,0,0 } /* e.g. ahi */
323: #define INSTR_RI_RP 4, { R_8,J16_16,0,0,0,0 } /* e.g. brct */
324: #define INSTR_RI_RU 4, { R_8,U16_16,0,0,0,0 } /* e.g. tml */
325: #define INSTR_RI_UP 4, { U4_8,J16_16,0,0,0,0 } /* e.g. brc */
326: #define INSTR_RIS_RURDI 6, { R_8,I8_32,U4_12,D_20,B_16,0 } /* e.g. cib */
327: #define INSTR_RIS_R0RDI 6, { R_8,I8_32,D_20,B_16,0,0 } /* e.g. cibne */
328: #define INSTR_RIS_RURDU 6, { R_8,U8_32,U4_12,D_20,B_16,0 } /* e.g. clib */
329: #define INSTR_RIS_R0RDU 6, { R_8,U8_32,D_20,B_16,0,0 } /* e.g. clibne*/
330: #define INSTR_RRE_00 4, { 0,0,0,0,0,0 } /* e.g. palb */
331: #define INSTR_RRE_0R 4, { R_28,0,0,0,0,0 } /* e.g. tb */
332: #define INSTR_RRE_AA 4, { A_24,A_28,0,0,0,0 } /* e.g. cpya */
333: #define INSTR_RRE_AR 4, { A_24,R_28,0,0,0,0 } /* e.g. sar */
334: #define INSTR_RRE_F0 4, { F_24,0,0,0,0,0 } /* e.g. lzer */
335: #define INSTR_RRE_FE0 4, { FE_24,0,0,0,0,0 } /* e.g. lzxr */
336: #define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */
337: #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } /* e.g. lxdbr */
338: #define INSTR_RRE_FFE 4, { F_24,FE_28,0,0,0,0 } /* e.g. lexr */
339: #define INSTR_RRE_FEFE 4, { FE_24,FE_28,0,0,0,0 } /* e.g. dxr */
340: #define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
341: #define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
342: #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
343: #define INSTR_RRE_RFE 4, { R_24,FE_28,0,0,0,0 } /* e.g. csxtr */
344: #define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
345: #define INSTR_RRE_RER 4, { RE_24,R_28,0,0,0,0 } /* e.g. tre */
346: #define INSTR_RRE_RERE 4, { RE_24,RE_28,0,0,0,0 } /* e.g. cuse */
347: #define INSTR_RRE_FR 4, { F_24,R_28,0,0,0,0 } /* e.g. ldgr */
348: #define INSTR_RRE_FER 4, { FE_24,R_28,0,0,0,0 } /* e.g. cxfbr */
349: #define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */
350: #define INSTR_RRF_FE0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. myr */
351: #define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */
352: #define INSTR_RRF_F0FR 4, { F_24,F_16,R_28,0,0,0 } /* e.g. iedtr */
353: #define INSTR_RRF_FE0FER 4, { FE_24,FE_16,R_28,0,0,0 } /* e.g. iextr */
354: #define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */
355: #define INSTR_RRF_FEUFEFE 4, { FE_24,FE_16,FE_28,U4_20,0,0 } /* e.g. qaxtr */
356: #define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra */
357: #define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } /* e.g. axtra */
1.6 ! christos 358: #define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. ipte */
1.3 christos 359: #define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
360: #define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte */
361: #define INSTR_RRF_R0RR2 4, { R_24,R_28,R_16,0,0,0 } /* e.g. ark */
362: #define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fidbr */
363: #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } /* e.g. fixbr */
364: #define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
365: #define INSTR_RRF_U0RFE 4, { R_24,U4_16,FE_28,0,0,0 } /* e.g. cfxbr */
366: #define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } /* e.g. fidtr */
367: #define INSTR_RRF_UUFFE 4, { F_24,U4_16,FE_28,U4_20,0,0 } /* e.g. ldxtr */
368: #define INSTR_RRF_UUFEFE 4, { FE_24,U4_16,FE_28,U4_20,0,0 } /* e.g. fixtr */
369: #define INSTR_RRF_0UFF 4, { F_24,F_28,U4_20,0,0,0 } /* e.g. ldetr */
370: #define INSTR_RRF_0UFEF 4, { FE_24,F_28,U4_20,0,0,0 } /* e.g. lxdtr */
371: #define INSTR_RRF_FFRU 4, { F_24,F_16,R_28,U4_20,0,0 } /* e.g. rrdtr */
372: #define INSTR_RRF_FEFERU 4, { FE_24,FE_16,R_28,U4_20,0,0 } /* e.g. rrxtr */
373: #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. sske */
374: #define INSTR_RRF_U0RER 4, { RE_24,R_28,U4_16,0,0,0 } /* e.g. trte */
375: #define INSTR_RRF_U0RERE 4, { RE_24,RE_28,U4_16,0,0,0 } /* e.g. cu24 */
376: #define INSTR_RRF_00RR 4, { R_24,R_28,0,0,0,0 } /* e.g. clrtne */
1.6 ! christos 377: #define INSTR_RRF_0URF 4, { R_24,F_28,U4_20,0,0,0 } /* e.g. csdtr */
! 378: #define INSTR_RRF_0UREFE 4, { RE_24,FE_28,U4_20,0,0,0 } /* e.g. csxtr */
1.3 christos 379: #define INSTR_RRF_UUFR 4, { F_24,U4_16,R_28,U4_20,0,0 } /* e.g. cdgtra */
380: #define INSTR_RRF_UUFER 4, { FE_24,U4_16,R_28,U4_20,0,0 } /* e.g. cxfbra */
381: #define INSTR_RRF_UURF 4, { R_24,U4_16,F_28,U4_20,0,0 } /* e.g. cgdtra */
382: #define INSTR_RRF_UURFE 4, { R_24,U4_16,FE_28,U4_20,0,0 } /* e.g. cfxbra */
383: #define INSTR_RR_0R 2, { R_12, 0,0,0,0,0 } /* e.g. br */
384: #define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */
385: #define INSTR_RR_FEF 2, { FE_8,F_12,0,0,0,0 } /* e.g. mxdr */
386: #define INSTR_RR_FFE 2, { F_8,FE_12,0,0,0,0 } /* e.g. ldxr */
387: #define INSTR_RR_FEFE 2, { FE_8,FE_12,0,0,0,0 } /* e.g. axr */
388: #define INSTR_RR_R0 2, { R_8, 0,0,0,0,0 } /* e.g. spm */
389: #define INSTR_RR_RR 2, { R_8,R_12,0,0,0,0 } /* e.g. lr */
390: #define INSTR_RR_RER 2, { RE_8,R_12,0,0,0,0 } /* e.g. dr */
391: #define INSTR_RR_U0 2, { U8_8, 0,0,0,0,0 } /* e.g. svc */
392: #define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
393: #define INSTR_RRR_F0FF 4, { F_24,F_28,F_16,0,0,0 } /* e.g. ddtr */
394: #define INSTR_RRR_FE0FEFE 4, { FE_24,FE_28,FE_16,0,0,0 } /* e.g. axtr */
395: #define INSTR_RRS_RRRDU 6, { R_8,R_12,U4_32,D_20,B_16 } /* e.g. crb */
396: #define INSTR_RRS_RRRD0 6, { R_8,R_12,D_20,B_16,0 } /* e.g. crbne */
397: #define INSTR_RSE_RRRD 6, { R_8,R_12,D_20,B_16,0,0 } /* e.g. lmh */
398: #define INSTR_RSE_RERERD 6, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. mvclu */
399: #define INSTR_RSE_CCRD 6, { C_8,C_12,D_20,B_16,0,0 } /* e.g. stctg */
400: #define INSTR_RSE_RURD 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */
401: #define INSTR_RSL_R0RD 6, { D_20,L4_8,B_16,0,0,0 } /* e.g. tp */
402: #define INSTR_RSL_LRDFU 6, { F_32,D_20,L8_8,B_16,U4_36,0 } /* e.g. cdzt */
403: #define INSTR_RSL_LRDFEU 6, { FE_32,D_20,L8_8,B_16,U4_36,0 } /* e.g. cxzt */
404: #define INSTR_RSI_RRP 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */
405: #define INSTR_RSY_RRRD 6, { R_8,R_12,D20_20,B_16,0,0 } /* e.g. stmy */
406: #define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */
407: #define INSTR_RSY_RURD 6, { R_8,U4_12,D20_20,B_16,0,0 } /* e.g. icmh */
408: #define INSTR_RSY_RURD2 6, { R_8,D20_20,B_16,U4_12,0,0 } /* e.g. loc */
409: #define INSTR_RSY_R0RD 6, { R_8,D20_20,B_16,0,0,0 } /* e.g. locne */
410: #define INSTR_RSY_AARD 6, { A_8,A_12,D20_20,B_16,0,0 } /* e.g. lamy */
411: #define INSTR_RSY_CCRD 6, { C_8,C_12,D20_20,B_16,0,0 } /* e.g. stctg */
412: #define INSTR_RS_AARD 4, { A_8,A_12,D_20,B_16,0,0 } /* e.g. lam */
413: #define INSTR_RS_CCRD 4, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lctl */
414: #define INSTR_RS_R0RD 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sll */
415: #define INSTR_RS_RE0RD 4, { RE_8,D_20,B_16,0,0,0 } /* e.g. slda */
416: #define INSTR_RS_RRRD 4, { R_8,R_12,D_20,B_16,0,0 } /* e.g. cs */
417: #define INSTR_RS_RERERD 4, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. cds */
418: #define INSTR_RS_RURD 4, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icm */
419: #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. adb */
420: #define INSTR_RXE_FERRD 6, { FE_8,D_20,X_12,B_16,0,0 } /* e.g. lxdb */
421: #define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } /* e.g. lg */
422: #define INSTR_RXE_RRRDU 6, { R_8,D_20,X_12,B_16,U4_32,0 } /* e.g. lcbb */
423: #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. dsg */
424: #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */
425: #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } /* e.g. my */
426: #define INSTR_RXF_FERRDFE 6, { FE_32,FE_8,D_20,X_12,B_16,0 } /* e.g. slxt */
427: #define INSTR_RXF_RRRDR 6, { R_32,R_8,D_20,X_12,B_16,0 } /* e.g. .insn */
428: #define INSTR_RXY_RRRD 6, { R_8,D20_20,X_12,B_16,0,0 } /* e.g. ly */
429: #define INSTR_RXY_RERRD 6, { RE_8,D20_20,X_12,B_16,0,0 } /* e.g. dsg */
430: #define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */
431: #define INSTR_RXY_URRD 6, { U4_8,D20_20,X_12,B_16,0,0 } /* e.g. pfd */
1.6 ! christos 432: #define INSTR_RXY_0RRD 6, { D20_20,X_12,B_16,0,0 } /* e.g. bic */
1.3 christos 433: #define INSTR_RX_0RRD 4, { D_20,X_12,B_16,0,0,0 } /* e.g. be */
434: #define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */
435: #define INSTR_RX_FERRD 4, { FE_8,D_20,X_12,B_16,0,0 } /* e.g. mxd */
436: #define INSTR_RX_RRRD 4, { R_8,D_20,X_12,B_16,0,0 } /* e.g. l */
437: #define INSTR_RX_RERRD 4, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. d */
438: #define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
1.6 ! christos 439: #define INSTR_SI_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */
1.3 christos 440: #define INSTR_SI_URD 4, { D_20,B_16,U8_8,0,0,0 } /* e.g. cli */
441: #define INSTR_SIY_URD 6, { D20_20,B_16,U8_8,0,0,0 } /* e.g. tmy */
442: #define INSTR_SIY_IRD 6, { D20_20,B_16,I8_8,0,0,0 } /* e.g. asi */
443: #define INSTR_SIL_RDI 6, { D_20,B_16,I16_32,0,0,0 } /* e.g. chhsi */
444: #define INSTR_SIL_RDU 6, { D_20,B_16,U16_32,0,0,0 } /* e.g. clfhsi */
445: #define INSTR_SMI_U0RDP 6, { U4_8,J16_32,D_20,B_16,0,0 } /* e.g. bpp */
446: #define INSTR_SSE_RDRD 6, { D_20,B_16,D_36,B_32,0,0 } /* e.g. mvcdk */
447: #define INSTR_SS_L0RDRD 6, { D_20,L8_8,B_16,D_36,B_32,0 } /* e.g. mvc */
448: #define INSTR_SS_L2RDRD 6, { D_20,B_16,D_36,L8_8,B_32,0 } /* e.g. pka */
449: #define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */
450: #define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */
451: #define INSTR_SS_RRRDRD 6, { D_20,R_8,B_16,D_36,B_32,R_12 } /* e.g. mvck */
452: #define INSTR_SS_RRRDRD2 6, { R_8,D_20,B_16,R_12,D_36,B_32 } /* e.g. plo */
453: #define INSTR_SS_RRRDRD3 6, { R_8,R_12,D_20,B_16,D_36,B_32 } /* e.g. lmd */
454: #define INSTR_SSF_RRDRD 6, { D_20,B_16,D_36,B_32,R_8,0 } /* e.g. mvcos */
455: #define INSTR_SSF_RERDRD2 6, { RE_8,D_20,B_16,D_36,B_32,0 } /* e.g. lpd */
456: #define INSTR_S_00 4, { 0,0,0,0,0,0 } /* e.g. hsch */
1.6 ! christos 457: #define INSTR_S_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. stck */
1.3 christos 458: #define INSTR_VRV_VVXRDU 6, { V_8,D_20,VX_12,B_16,U4_32,0 } /* e.g. vgef */
459: #define INSTR_VRI_V0U 6, { V_8,U16_16,0,0,0,0 } /* e.g. vgbm */
460: #define INSTR_VRI_V 6, { V_8,0,0,0,0,0 } /* e.g. vzero */
461: #define INSTR_VRI_V0UUU 6, { V_8,U8_16,U8_24,U4_32,0,0 } /* e.g. vgm */
462: #define INSTR_VRI_V0UU 6, { V_8,U8_16,U8_24,0,0,0 } /* e.g. vgmb */
1.6 ! christos 463: #define INSTR_VRI_V0UU2 6, { V_8,U16_16,U4_32,0,0,0 } /* e.g. vlip */
1.3 christos 464: #define INSTR_VRI_VVUU 6, { V_8,V_12,U16_16,U4_32,0,0 } /* e.g. vrep */
465: #define INSTR_VRI_VVU 6, { V_8,V_12,U16_16,0,0,0 } /* e.g. vrepb */
466: #define INSTR_VRI_VVU2 6, { V_8,V_12,U12_16,0,0,0 } /* e.g. vftcidb */
467: #define INSTR_VRI_V0IU 6, { V_8,I16_16,U4_32,0,0,0 } /* e.g. vrepi */
468: #define INSTR_VRI_V0I 6, { V_8,I16_16,0,0,0,0 } /* e.g. vrepib */
469: #define INSTR_VRI_VVV0UU 6, { V_8,V_12,V_16,U8_24,U4_32,0 } /* e.g. verim */
1.6 ! christos 470: #define INSTR_VRI_VVV0UU2 6, { V_8,V_12,V_16,U8_28,U4_24,0 } /* e.g. vap */
1.3 christos 471: #define INSTR_VRI_VVV0U 6, { V_8,V_12,V_16,U8_24,0,0 } /* e.g. verimb*/
472: #define INSTR_VRI_VVUUU 6, { V_8,V_12,U12_16,U4_32,U4_28,0 } /* e.g. vftci */
1.6 ! christos 473: #define INSTR_VRI_VVUUU2 6, { V_8,V_12,U8_28,U8_16,U4_24,0 } /* e.g. vpsop */
! 474: #define INSTR_VRI_VR0UU 6, { V_8,R_12,U8_28,U4_24,0,0 } /* e.g. vcvd */
1.3 christos 475: #define INSTR_VRX_VRRD 6, { V_8,D_20,X_12,B_16,0,0 } /* e.g. vl */
476: #define INSTR_VRX_VV 6, { V_8,V_12,0,0,0,0 } /* e.g. vlr */
1.6 ! christos 477: #define INSTR_VRX_VRRDU 6, { V_8,D_20,X_12,B_16,U4_32,0 } /* e.g. vlrep */
1.3 christos 478: #define INSTR_VRS_RVRDU 6, { R_8,V_12,D_20,B_16,U4_32,0 } /* e.g. vlgv */
479: #define INSTR_VRS_RVRD 6, { R_8,V_12,D_20,B_16,0,0 } /* e.g. vlgvb */
480: #define INSTR_VRS_VVRDU 6, { V_8,V_12,D_20,B_16,U4_32,0 } /* e.g. verll */
481: #define INSTR_VRS_VVRD 6, { V_8,V_12,D_20,B_16,0,0 } /* e.g. vlm */
482: #define INSTR_VRS_VRRDU 6, { V_8,R_12,D_20,B_16,U4_32,0 } /* e.g. vlvg */
483: #define INSTR_VRS_VRRD 6, { V_8,R_12,D_20,B_16,0,0 } /* e.g. vlvgb */
1.6 ! christos 484: #define INSTR_VRS_RRDV 6, { V_32,R_12,D_20,B_16,0,0 } /* e.g. vlrlr */
! 485: #define INSTR_VRR_0V 6, { V_12,0,0,0,0,0 } /* e.g. vtp */
1.3 christos 486: #define INSTR_VRR_VRR 6, { V_8,R_12,R_16,0,0,0 } /* e.g. vlvgp */
487: #define INSTR_VRR_VVV0U 6, { V_8,V_12,V_16,U4_32,0,0 } /* e.g. vmrh */
488: #define INSTR_VRR_VVV0U0 6, { V_8,V_12,V_16,U4_24,0,0 } /* e.g. vfaeb */
489: #define INSTR_VRR_VVV0U1 6, { V_8,V_12,V_16,U4_OR1_24,0,0 } /* e.g. vfaebs*/
490: #define INSTR_VRR_VVV0U2 6, { V_8,V_12,V_16,U4_OR2_24,0,0 } /* e.g. vfaezb*/
491: #define INSTR_VRR_VVV0U3 6, { V_8,V_12,V_16,U4_OR3_24,0,0 } /* e.g. vfaezbs*/
492: #define INSTR_VRR_VVV 6, { V_8,V_12,V_16,0,0,0 } /* e.g. vmrhb */
493: #define INSTR_VRR_VVV2 6, { V_8,V_CP16_12,0,0,0,0 } /* e.g. vnot */
494: #define INSTR_VRR_VV0U 6, { V_8,V_12,U4_32,0,0,0 } /* e.g. vseg */
495: #define INSTR_VRR_VV0U2 6, { V_8,V_12,U4_24,0,0,0 } /* e.g. vistrb*/
496: #define INSTR_VRR_VV0UU 6, { V_8,V_12,U4_28,U4_24,0,0 } /* e.g. vcdgb */
497: #define INSTR_VRR_VV0UU2 6, { V_8,V_12,U4_32,U4_28,0,0 } /* e.g. wfc */
498: #define INSTR_VRR_VV0UU8 6, { V_8,V_12,U4_OR8_28,U4_24,0,0 } /* e.g. wcdgb */
499: #define INSTR_VRR_VV 6, { V_8,V_12,0,0,0,0 } /* e.g. vsegb */
500: #define INSTR_VRR_VVVUU0V 6, { V_8,V_12,V_16,V_32,U4_20,U4_24 } /* e.g. vstrc */
501: #define INSTR_VRR_VVVU0V 6, { V_8,V_12,V_16,V_32,U4_20,0 } /* e.g. vac */
502: #define INSTR_VRR_VVVU0VB 6, { V_8,V_12,V_16,V_32,U4_24,0 } /* e.g. vstrcb*/
503: #define INSTR_VRR_VVVU0VB1 6, { V_8,V_12,V_16,V_32,U4_OR1_24,0 } /* e.g. vstrcbs*/
504: #define INSTR_VRR_VVVU0VB2 6, { V_8,V_12,V_16,V_32,U4_OR2_24,0 } /* e.g. vstrczb*/
505: #define INSTR_VRR_VVVU0VB3 6, { V_8,V_12,V_16,V_32,U4_OR3_24,0 } /* e.g. vstrczbs*/
506: #define INSTR_VRR_VVV0V 6, { V_8,V_12,V_16,V_32,0,0 } /* e.g. vacq */
507: #define INSTR_VRR_VVV0U0U 6, { V_8,V_12,V_16,U4_32,U4_24,0 } /* e.g. vfae */
508: #define INSTR_VRR_VVVV 6, { V_8,V_12,V_16,V_32,0,0 } /* e.g. vfmadb*/
509: #define INSTR_VRR_VVV0UUU 6, { V_8,V_12,V_16,U4_32,U4_28,U4_24 }/* e.g. vfch */
510: #define INSTR_VRR_VVV0UU 6, { V_8,V_12,V_16,U4_32,U4_28,0 } /* e.g. vfa */
511: #define INSTR_VRR_VV0UUU 6, { V_8,V_12,U4_32,U4_28,U4_24,0 } /* e.g. vcdg */
512: #define INSTR_VRR_VVVU0UV 6, { V_8,V_12,V_16,V_32,U4_28,U4_20 } /* e.g. vfma */
513: #define INSTR_VRR_VV0U0U 6, { V_8,V_12,U4_32,U4_24,0,0 } /* e.g. vistr */
1.6 ! christos 514: #define INSTR_VRR_0VV0U 6, { V_12,V_16,U4_24,0,0,0 } /* e.g. vcp */
! 515: #define INSTR_VRR_RV0U 6, { R_8,V_12,U4_24,0,0,0 } /* e.g. vcvb */
! 516: #define INSTR_VSI_URDV 6, { V_32,D_20,B_16,U8_8,0,0 } /* e.g. vlrl */
1.3 christos 517:
518: #define MASK_E { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
519: #define MASK_IE_UU { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
520: #define MASK_MII_UPP { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
521: #define MASK_RIE_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
522: #define MASK_RIE_RRPU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
523: #define MASK_RIE_RRP0 { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
524: #define MASK_RIE_RRI0 { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
525: #define MASK_RIE_RUPI { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
526: #define MASK_RIE_R0PI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
527: #define MASK_RIE_RUPU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
528: #define MASK_RIE_R0PU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
529: #define MASK_RIE_R0IU { 0xff, 0x0f, 0x00, 0x00, 0x0f, 0xff }
530: #define MASK_RIE_R0I0 { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
531: #define MASK_RIE_R0UU { 0xff, 0x0f, 0x00, 0x00, 0x0f, 0xff }
532: #define MASK_RIE_R0U0 { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
533: #define MASK_RIE_RUI0 { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
534: #define MASK_RIE_RRUUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
535: #define MASK_RIL_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
536: #define MASK_RIL_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
537: #define MASK_RIL_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
538: #define MASK_RIL_RI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
539: #define MASK_RIL_RU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
540: #define MASK_RI_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
541: #define MASK_RI_RI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
542: #define MASK_RI_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
543: #define MASK_RI_RU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
544: #define MASK_RI_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
545: #define MASK_RIS_RURDI { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
546: #define MASK_RIS_R0RDI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
547: #define MASK_RIS_RURDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
548: #define MASK_RIS_R0RDU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
549: #define MASK_RRE_00 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
550: #define MASK_RRE_0R { 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00 }
551: #define MASK_RRE_AA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
552: #define MASK_RRE_AR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
553: #define MASK_RRE_F0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
554: #define MASK_RRE_FE0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
555: #define MASK_RRE_FF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
556: #define MASK_RRE_FEF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
557: #define MASK_RRE_FFE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
558: #define MASK_RRE_FEFE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
559: #define MASK_RRE_R0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 }
560: #define MASK_RRE_RA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
561: #define MASK_RRE_RF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
562: #define MASK_RRE_RFE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
563: #define MASK_RRE_RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
564: #define MASK_RRE_RER { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
565: #define MASK_RRE_RERE { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
566: #define MASK_RRE_FR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
567: #define MASK_RRE_FER { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
568: #define MASK_RRF_F0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
569: #define MASK_RRF_FE0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
570: #define MASK_RRF_F0FF2 { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
571: #define MASK_RRF_F0FR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
572: #define MASK_RRF_FE0FER { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
573: #define MASK_RRF_FUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
574: #define MASK_RRF_FEUFEFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
575: #define MASK_RRF_FUFF2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
1.1 christos 576: #define MASK_RRF_FEUFEFE2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
1.3 christos 577: #define MASK_RRF_RURR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
578: #define MASK_RRF_RURR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
579: #define MASK_RRF_R0RR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
580: #define MASK_RRF_R0RR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
581: #define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
582: #define MASK_RRF_U0FEFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
583: #define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
584: #define MASK_RRF_U0RFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
585: #define MASK_RRF_UUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
586: #define MASK_RRF_UUFFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
587: #define MASK_RRF_UUFEFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
588: #define MASK_RRF_0UFF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
589: #define MASK_RRF_0UFEF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
590: #define MASK_RRF_FFRU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
591: #define MASK_RRF_FEFERU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
592: #define MASK_RRF_U0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
593: #define MASK_RRF_U0RER { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
594: #define MASK_RRF_U0RERE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
595: #define MASK_RRF_00RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
1.6 ! christos 596: #define MASK_RRF_0URF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
! 597: #define MASK_RRF_0UREFE { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
1.3 christos 598: #define MASK_RRF_UUFR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
599: #define MASK_RRF_UUFER { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
600: #define MASK_RRF_UURF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
601: #define MASK_RRF_UURFE { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
602: #define MASK_RR_0R { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
603: #define MASK_RR_FF { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
604: #define MASK_RR_FEF { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
605: #define MASK_RR_FFE { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
606: #define MASK_RR_FEFE { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
607: #define MASK_RR_R0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
608: #define MASK_RR_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
609: #define MASK_RR_RER { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
610: #define MASK_RR_U0 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
611: #define MASK_RR_UR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
612: #define MASK_RRR_F0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
613: #define MASK_RRR_FE0FEFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
614: #define MASK_RRS_RRRDU { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
615: #define MASK_RRS_RRRD0 { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
616: #define MASK_RSE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
617: #define MASK_RSE_RERERD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
618: #define MASK_RSE_CCRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
619: #define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
620: #define MASK_RSL_R0RD { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
621: #define MASK_RSL_LRDFU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
622: #define MASK_RSL_LRDFEU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
623: #define MASK_RSI_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
624: #define MASK_RS_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
625: #define MASK_RS_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
626: #define MASK_RS_R0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
627: #define MASK_RS_RE0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
628: #define MASK_RS_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
629: #define MASK_RS_RERERD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
630: #define MASK_RS_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
631: #define MASK_RSY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
632: #define MASK_RSY_RERERD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
633: #define MASK_RSY_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
634: #define MASK_RSY_RURD2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
635: #define MASK_RSY_R0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
636: #define MASK_RSY_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
637: #define MASK_RSY_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
638: #define MASK_RXE_FRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
639: #define MASK_RXE_FERRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
640: #define MASK_RXE_RRRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
641: #define MASK_RXE_RRRDU { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
642: #define MASK_RXE_RERRD { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
643: #define MASK_RXF_FRRDF { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
644: #define MASK_RXF_FRRDFE { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
645: #define MASK_RXF_FERRDFE { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
646: #define MASK_RXF_RRRDR { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
647: #define MASK_RXY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
648: #define MASK_RXY_RERRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
649: #define MASK_RXY_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
650: #define MASK_RXY_URRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
1.6 ! christos 651: #define MASK_RXY_0RRD { 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff }
1.3 christos 652: #define MASK_RX_0RRD { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 }
653: #define MASK_RX_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
654: #define MASK_RX_FERRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
655: #define MASK_RX_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
656: #define MASK_RX_RERRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
657: #define MASK_RX_URRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
1.6 ! christos 658: #define MASK_SI_RD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
1.3 christos 659: #define MASK_SI_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
660: #define MASK_SIY_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
661: #define MASK_SIY_IRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
662: #define MASK_SIL_RDI { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
663: #define MASK_SIL_RDU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
664: #define MASK_SMI_U0RDP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
665: #define MASK_SSE_RDRD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
666: #define MASK_SS_L0RDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
667: #define MASK_SS_L2RDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
668: #define MASK_SS_LIRDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
669: #define MASK_SS_LLRDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
670: #define MASK_SS_RRRDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
671: #define MASK_SS_RRRDRD2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
672: #define MASK_SS_RRRDRD3 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
673: #define MASK_SSF_RRDRD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
674: #define MASK_SSF_RERDRD2 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
675: #define MASK_S_00 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
676: #define MASK_S_RD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
677: #define MASK_VRV_VVXRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
678: #define MASK_VRI_V0U { 0xff, 0x0f, 0x00, 0x00, 0xf0, 0xff }
679: #define MASK_VRI_V { 0xff, 0x0f, 0xff, 0xff, 0xf0, 0xff }
680: #define MASK_VRI_V0UUU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
681: #define MASK_VRI_V0UU { 0xff, 0x0f, 0x00, 0x00, 0xf0, 0xff }
1.6 ! christos 682: #define MASK_VRI_V0UU2 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
1.3 christos 683: #define MASK_VRI_VVUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
684: #define MASK_VRI_VVU { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
685: #define MASK_VRI_VVU2 { 0xff, 0x00, 0x00, 0x0f, 0xf0, 0xff }
686: #define MASK_VRI_V0IU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0xff }
687: #define MASK_VRI_V0I { 0xff, 0x0f, 0x00, 0x00, 0xf0, 0xff }
688: #define MASK_VRI_VVV0UU { 0xff, 0x00, 0x0f, 0x00, 0x00, 0xff }
1.6 ! christos 689: #define MASK_VRI_VVV0UU2 { 0xff, 0x00, 0x0f, 0x00, 0x00, 0xff }
1.3 christos 690: #define MASK_VRI_VVV0U { 0xff, 0x00, 0x0f, 0x00, 0xf0, 0xff }
691: #define MASK_VRI_VVUUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
1.6 ! christos 692: #define MASK_VRI_VVUUU2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
! 693: #define MASK_VRI_VR0UU { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
1.3 christos 694: #define MASK_VRX_VRRD { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
695: #define MASK_VRX_VV { 0xff, 0x00, 0xff, 0xff, 0xf0, 0xff }
696: #define MASK_VRX_VRRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
697: #define MASK_VRS_RVRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
698: #define MASK_VRS_RVRD { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
699: #define MASK_VRS_VVRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
700: #define MASK_VRS_VVRD { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
701: #define MASK_VRS_VRRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
702: #define MASK_VRS_VRRD { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
1.6 ! christos 703: #define MASK_VRS_RRDV { 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff }
! 704: #define MASK_VRR_0V { 0xff, 0xf0, 0xff, 0xff, 0xf0, 0xff }
1.3 christos 705: #define MASK_VRR_VRR { 0xff, 0x00, 0x0f, 0xff, 0xf0, 0xff }
706: #define MASK_VRR_VVV0U { 0xff, 0x00, 0x0f, 0xff, 0x00, 0xff }
707: #define MASK_VRR_VVV0U0 { 0xff, 0x00, 0x0f, 0x0f, 0xf0, 0xff }
708: #define MASK_VRR_VVV0U1 { 0xff, 0x00, 0x0f, 0x1f, 0xf0, 0xff }
709: #define MASK_VRR_VVV0U2 { 0xff, 0x00, 0x0f, 0x2f, 0xf0, 0xff }
710: #define MASK_VRR_VVV0U3 { 0xff, 0x00, 0x0f, 0x3f, 0xf0, 0xff }
711: #define MASK_VRR_VVV { 0xff, 0x00, 0x0f, 0xff, 0xf0, 0xff }
712: #define MASK_VRR_VVV2 { 0xff, 0x00, 0x0f, 0xff, 0xf0, 0xff }
713: #define MASK_VRR_VVV0V { 0xff, 0x00, 0x0f, 0xff, 0x00, 0xff }
714: #define MASK_VRR_VV0U { 0xff, 0x00, 0xff, 0xff, 0x00, 0xff }
715: #define MASK_VRR_VV0U2 { 0xff, 0x00, 0xff, 0x0f, 0xf0, 0xff }
716: #define MASK_VRR_VV0UU { 0xff, 0x00, 0xff, 0x00, 0xf0, 0xff }
717: #define MASK_VRR_VV0UU2 { 0xff, 0x00, 0xff, 0xf0, 0x00, 0xff }
718: #define MASK_VRR_VV0UU8 { 0xff, 0x00, 0xff, 0x08, 0xf0, 0xff }
719: #define MASK_VRR_VV { 0xff, 0x00, 0xff, 0xff, 0xf0, 0xff }
720: #define MASK_VRR_VVVUU0V { 0xff, 0x00, 0x00, 0x0f, 0x00, 0xff }
721: #define MASK_VRR_VVVU0V { 0xff, 0x00, 0x00, 0xff, 0x00, 0xff }
722: #define MASK_VRR_VVVU0VB { 0xff, 0x00, 0x0f, 0x0f, 0x00, 0xff }
723: #define MASK_VRR_VVVU0VB1 { 0xff, 0x00, 0x0f, 0x1f, 0x00, 0xff }
724: #define MASK_VRR_VVVU0VB2 { 0xff, 0x00, 0x0f, 0x2f, 0x00, 0xff }
725: #define MASK_VRR_VVVU0VB3 { 0xff, 0x00, 0x0f, 0x3f, 0x00, 0xff }
726: #define MASK_VRR_VVV0U0U { 0xff, 0x00, 0x0f, 0x0f, 0x00, 0xff }
727: #define MASK_VRR_VVVV { 0xff, 0x00, 0x0f, 0xff, 0x00, 0xff }
728: #define MASK_VRR_VVV0UUU { 0xff, 0x00, 0x0f, 0x00, 0x00, 0xff }
729: #define MASK_VRR_VVV0UU { 0xff, 0x00, 0x0f, 0xf0, 0x00, 0xff }
730: #define MASK_VRR_VV0UUU { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
731: #define MASK_VRR_VVVU0UV { 0xff, 0x00, 0x00, 0xf0, 0x00, 0xff }
732: #define MASK_VRR_VV0U0U { 0xff, 0x00, 0xff, 0x0f, 0x00, 0xff }
1.6 ! christos 733: #define MASK_VRR_0VV0U { 0xff, 0xf0, 0x0f, 0x0f, 0xf0, 0xff }
! 734: #define MASK_VRR_RV0U { 0xff, 0x00, 0xff, 0x0f, 0xf0, 0xff }
! 735: #define MASK_VSI_URDV { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
! 736:
1.1 christos 737:
738: /* The opcode formats table (blueprints for .insn pseudo mnemonic). */
739:
740: const struct s390_opcode s390_opformats[] =
741: {
1.6 ! christos 742: { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 ,0 },
! 743: { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 ,0 },
! 744: { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 ,0 },
! 745: { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 ,0 },
! 746: { "rilu", OP8(0x00LL), MASK_RIL_RU, INSTR_RIL_RU, 3, 0 ,0 },
! 747: { "ris", OP8(0x00LL), MASK_RIS_RURDI, INSTR_RIS_RURDI, 3, 6 ,0 },
! 748: { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 ,0 },
! 749: { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 ,0 },
! 750: { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 ,0 },
! 751: { "rrs", OP8(0x00LL), MASK_RRS_RRRDU, INSTR_RRS_RRRDU, 3, 6 ,0 },
! 752: { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 ,0 },
! 753: { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 ,0 },
! 754: { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 ,0 },
! 755: { "rsy", OP8(0x00LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3 ,0 },
! 756: { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 ,0 },
! 757: { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 ,0 },
! 758: { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR, 3, 0 ,0 },
! 759: { "rxy", OP8(0x00LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3 ,0 },
! 760: { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 ,0 },
! 761: { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 ,0 },
! 762: { "siy", OP8(0x00LL), MASK_SIY_URD, INSTR_SIY_URD, 3, 3 ,0 },
! 763: { "sil", OP8(0x00LL), MASK_SIL_RDI, INSTR_SIL_RDI, 3, 6 ,0 },
! 764: { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0 ,0 },
! 765: { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 ,0 },
! 766: { "ssf", OP8(0x00LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 3, 0 ,0 },
! 767: { "vrv", OP8(0x00LL), MASK_VRV_VVXRDU, INSTR_VRV_VVXRDU, 3, 9 ,0 },
! 768: { "vri", OP8(0x00LL), MASK_VRI_VVUUU, INSTR_VRI_VVUUU, 3, 9 ,0 },
! 769: { "vrx", OP8(0x00LL), MASK_VRX_VRRDU, INSTR_VRX_VRRDU, 3, 9 ,0 },
! 770: { "vrs", OP8(0x00LL), MASK_VRS_RVRDU, INSTR_VRS_RVRDU, 3, 9 ,0 },
! 771: { "vrr", OP8(0x00LL), MASK_VRR_VVV0UUU, INSTR_VRR_VVV0UUU, 3, 9 ,0 },
! 772: { "vsi", OP8(0x00LL), MASK_VSI_URDV, INSTR_VSI_URDV, 3, 10 ,0 },
1.1 christos 773: };
774:
775: const int s390_num_opformats =
776: sizeof (s390_opformats) / sizeof (s390_opformats[0]);
777:
778: #include "s390-opc.tab"
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