Annotation of src/external/gpl3/binutils.old/dist/opcodes/lm32-opc.h, Revision 1.1.1.1.2.1
1.1 christos 1: /* Instruction opcode header for lm32.
2:
3: THIS FILE IS MACHINE GENERATED WITH CGEN.
4:
1.1.1.1.2.1! pgoyette 5: Copyright (C) 1996-2015 Free Software Foundation, Inc.
1.1 christos 6:
7: This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8:
9: This file is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 3, or (at your option)
12: any later version.
13:
14: It is distributed in the hope that it will be useful, but WITHOUT
15: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16: or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17: License for more details.
18:
19: You should have received a copy of the GNU General Public License along
20: with this program; if not, write to the Free Software Foundation, Inc.,
21: 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22:
23: */
24:
25: #ifndef LM32_OPC_H
26: #define LM32_OPC_H
27:
28: /* -- opc.h */
29:
30: /* Allows reason codes to be output when assembler errors occur. */
31: #define CGEN_VERBOSE_ASSEMBLER_ERRORS
32:
33: #define CGEN_DIS_HASH_SIZE 64
1.1.1.1.2.1! pgoyette 34: #define CGEN_DIS_HASH(buf,value) ((value >> 26) & 0x3f)
1.1 christos 35:
36: /* -- asm.c */
37: /* Enum declaration for lm32 instruction types. */
38: typedef enum cgen_insn_type {
39: LM32_INSN_INVALID, LM32_INSN_ADD, LM32_INSN_ADDI, LM32_INSN_AND
40: , LM32_INSN_ANDI, LM32_INSN_ANDHII, LM32_INSN_B, LM32_INSN_BI
41: , LM32_INSN_BE, LM32_INSN_BG, LM32_INSN_BGE, LM32_INSN_BGEU
42: , LM32_INSN_BGU, LM32_INSN_BNE, LM32_INSN_CALL, LM32_INSN_CALLI
43: , LM32_INSN_CMPE, LM32_INSN_CMPEI, LM32_INSN_CMPG, LM32_INSN_CMPGI
44: , LM32_INSN_CMPGE, LM32_INSN_CMPGEI, LM32_INSN_CMPGEU, LM32_INSN_CMPGEUI
45: , LM32_INSN_CMPGU, LM32_INSN_CMPGUI, LM32_INSN_CMPNE, LM32_INSN_CMPNEI
46: , LM32_INSN_DIVU, LM32_INSN_LB, LM32_INSN_LBU, LM32_INSN_LH
47: , LM32_INSN_LHU, LM32_INSN_LW, LM32_INSN_MODU, LM32_INSN_MUL
48: , LM32_INSN_MULI, LM32_INSN_NOR, LM32_INSN_NORI, LM32_INSN_OR
49: , LM32_INSN_ORI, LM32_INSN_ORHII, LM32_INSN_RCSR, LM32_INSN_SB
50: , LM32_INSN_SEXTB, LM32_INSN_SEXTH, LM32_INSN_SH, LM32_INSN_SL
51: , LM32_INSN_SLI, LM32_INSN_SR, LM32_INSN_SRI, LM32_INSN_SRU
52: , LM32_INSN_SRUI, LM32_INSN_SUB, LM32_INSN_SW, LM32_INSN_USER
53: , LM32_INSN_WCSR, LM32_INSN_XOR, LM32_INSN_XORI, LM32_INSN_XNOR
54: , LM32_INSN_XNORI, LM32_INSN_BREAK, LM32_INSN_SCALL, LM32_INSN_BRET
55: , LM32_INSN_ERET, LM32_INSN_RET, LM32_INSN_MV, LM32_INSN_MVI
56: , LM32_INSN_MVUI, LM32_INSN_MVHI, LM32_INSN_MVA, LM32_INSN_NOT
57: , LM32_INSN_NOP, LM32_INSN_LBGPREL, LM32_INSN_LBUGPREL, LM32_INSN_LHGPREL
58: , LM32_INSN_LHUGPREL, LM32_INSN_LWGPREL, LM32_INSN_SBGPREL, LM32_INSN_SHGPREL
59: , LM32_INSN_SWGPREL, LM32_INSN_LWGOTREL, LM32_INSN_ORHIGOTOFFI, LM32_INSN_ADDGOTOFF
60: , LM32_INSN_SWGOTOFF, LM32_INSN_LWGOTOFF, LM32_INSN_SHGOTOFF, LM32_INSN_LHGOTOFF
61: , LM32_INSN_LHUGOTOFF, LM32_INSN_SBGOTOFF, LM32_INSN_LBGOTOFF, LM32_INSN_LBUGOTOFF
62: } CGEN_INSN_TYPE;
63:
64: /* Index of `invalid' insn place holder. */
65: #define CGEN_INSN_INVALID LM32_INSN_INVALID
66:
67: /* Total number of insns in table. */
68: #define MAX_INSNS ((int) LM32_INSN_LBUGOTOFF + 1)
69:
70: /* This struct records data prior to insertion or after extraction. */
71: struct cgen_fields
72: {
73: int length;
74: long f_nil;
75: long f_anyof;
76: long f_opcode;
77: long f_r0;
78: long f_r1;
79: long f_r2;
80: long f_resv0;
81: long f_shift;
82: long f_imm;
83: long f_uimm;
84: long f_csr;
85: long f_user;
86: long f_exception;
87: long f_branch;
88: long f_call;
89: };
90:
91: #define CGEN_INIT_PARSE(od) \
92: {\
93: }
94: #define CGEN_INIT_INSERT(od) \
95: {\
96: }
97: #define CGEN_INIT_EXTRACT(od) \
98: {\
99: }
100: #define CGEN_INIT_PRINT(od) \
101: {\
102: }
103:
104:
105: #endif /* LM32_OPC_H */
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