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Diff for /src/external/gpl3/binutils.old/dist/opcodes/Attic/i860-dis.c between version 1.2 and 1.3

version 1.2, 2016/10/09 08:22:34 version 1.3, 2016/10/26 17:09:29
Line 1 
Line 1 
 /* Disassembler for the i860.  /* Disassembler for the i860.
    Copyright 2000, 2003, 2005, 2007, 2012 Free Software Foundation, Inc.     Copyright (C) 2000-2015 Free Software Foundation, Inc.
   
    Contributed by Jason Eckhardt <jle@cygnus.com>.     Contributed by Jason Eckhardt <jle@cygnus.com>.
   
Line 28 
Line 28 
 #define I860_REG_PREFIX "%"  #define I860_REG_PREFIX "%"
   
 /* Integer register names (encoded as 0..31 in the instruction).  */  /* Integer register names (encoded as 0..31 in the instruction).  */
 static const char *const grnames[] =  static const char *const grnames[] =
  {"r0",  "r1",  "sp",  "fp",  "r4",  "r5",  "r6",  "r7",   {"r0",  "r1",  "sp",  "fp",  "r4",  "r5",  "r6",  "r7",
   "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",    "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",    "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"};    "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"};
   
 /* FP register names (encoded as 0..31 in the instruction).  */  /* FP register names (encoded as 0..31 in the instruction).  */
 static const char *const frnames[] =  static const char *const frnames[] =
  {"f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",   {"f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",
   "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15",    "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15",
   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",    "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
Line 43  static const char *const frnames[] = 
Line 43  static const char *const frnames[] = 
   
 /* Control/status register names (encoded as 0..11 in the instruction).  /* Control/status register names (encoded as 0..11 in the instruction).
    Registers bear, ccr, p0, p1, p2 and p3 are XP only.  */     Registers bear, ccr, p0, p1, p2 and p3 are XP only.  */
 static const char *const crnames[] =  static const char *const crnames[] =
  {"fir", "psr", "dirbase", "db", "fsr", "epsr", "bear", "ccr",   {"fir", "psr", "dirbase", "db", "fsr", "epsr", "bear", "ccr",
   "p0", "p1", "p2", "p3", "--", "--", "--", "--" };    "p0", "p1", "p2", "p3", "--", "--", "--", "--" };
   
Line 78  print_br_address (disassemble_info *info
Line 78  print_br_address (disassemble_info *info
   long adj = (long)memaddr + 4 + (val << 2);    long adj = (long)memaddr + 4 + (val << 2);
   
   (*info->fprintf_func) (info->stream, "0x%08lx", adj);    (*info->fprintf_func) (info->stream, "0x%08lx", adj);
   
   /* Attempt to obtain a symbol for the target address.  */    /* Attempt to obtain a symbol for the target address.  */
   
   if (info->print_address_func && adj != 0)    if (info->print_address_func && adj != 0)
     {      {
       (*info->fprintf_func) (info->stream, "\t// ");        (*info->fprintf_func) (info->stream, "\t// ");
Line 134  print_insn_i860 (bfd_vma memaddr, disass
Line 134  print_insn_i860 (bfd_vma memaddr, disass
       int val;        int val;
   
       /* If this a flop (or a shrd) and its dual bit is set,        /* If this a flop (or a shrd) and its dual bit is set,
          prefix with 'd.'.  */           prefix with 'd.'.  */
       if (((insn & 0xfc000000) == 0x48000000        if (((insn & 0xfc000000) == 0x48000000
            || (insn & 0xfc000000) == 0xb0000000)             || (insn & 0xfc000000) == 0xb0000000)
           && (insn & 0x200))            && (insn & 0x200))

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Removed from v.1.2  
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  Added in v.1.3

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