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CVS log for src/common/lib/libc/atomic/atomic_store.c

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Default branch: MAIN
Current tag: MAIN


Revision 1.5 / (download) - annotate - [select for diffs], Sun Feb 4 16:19:12 2024 UTC (2 months, 1 week ago) by christos
Branch: MAIN
CVS Tags: HEAD
Changes since 1.4: +4 -3 lines
Diff to previous 1.4 (colored)

mark unused argument

Revision 1.4 / (download) - annotate - [select for diffs], Sat Apr 9 23:38:57 2022 UTC (2 years ago) by riastradh
Branch: MAIN
CVS Tags: thorpej-ifq-base, thorpej-ifq, thorpej-altq-separation-base, thorpej-altq-separation, netbsd-10-base, netbsd-10-0-RELEASE, netbsd-10-0-RC6, netbsd-10-0-RC5, netbsd-10-0-RC4, netbsd-10-0-RC3, netbsd-10-0-RC2, netbsd-10-0-RC1, netbsd-10
Changes since 1.3: +3 -4 lines
Diff to previous 1.3 (colored)

libc/atomic: Fix membars in __atomic_load/store_* stubs.

- membar_enter/exit ordering was backwards.
- membar_enter doesn't make any sense for load anyway.
- Switch to membar_release for store and membar_acquire for load.

The only sensible orderings for a simple load or store are acquire or
release, respectively, or sequential consistency.  This never
provided correct sequential consistency before -- we should really
make it conditional on memmodel but I don't know offhand what the
values of memmodel might be and this is at least better than before.

Revision 1.3 / (download) - annotate - [select for diffs], Mon Sep 7 00:52:19 2020 UTC (3 years, 7 months ago) by mrg
Branch: MAIN
CVS Tags: cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.2: +5 -5 lines
Diff to previous 1.2 (colored)

make some prototypes match the builtin properly.  GCC 9 complains
with the old version, GCC 8 is happy with this version.

tested on sparc.

Revision 1.2 / (download) - annotate - [select for diffs], Sun Jul 6 01:19:45 2014 UTC (9 years, 9 months ago) by joerg
Branch: MAIN
CVS Tags: tls-maxphys-base, tls-maxphys-20171202, tls-earlyentropy-base, prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, phil-wifi-base, phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, phil-wifi-20191119, phil-wifi-20190609, pgoyette-localcount-base, pgoyette-localcount-20170426, pgoyette-localcount-20170320, pgoyette-localcount-20170107, pgoyette-localcount-20161104, pgoyette-localcount-20160806, pgoyette-localcount-20160726, pgoyette-localcount, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, perseant-stdc-iso10646-base, perseant-stdc-iso10646, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, netbsd-8-base, netbsd-8-2-RELEASE, netbsd-8-1-RELEASE, netbsd-8-1-RC1, netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1, netbsd-8, netbsd-7-nhusb-base-20170116, netbsd-7-nhusb-base, netbsd-7-nhusb, netbsd-7-base, netbsd-7-2-RELEASE, netbsd-7-1-RELEASE, netbsd-7-1-RC2, netbsd-7-1-RC1, netbsd-7-1-2-RELEASE, netbsd-7-1-1-RELEASE, netbsd-7-1, netbsd-7-0-RELEASE, netbsd-7-0-RC3, netbsd-7-0-RC2, netbsd-7-0-RC1, netbsd-7-0-2-RELEASE, netbsd-7-0-1-RELEASE, netbsd-7-0, netbsd-7, matt-nb8-mediatek-base, matt-nb8-mediatek, localcount-20160914, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, bouyer-socketcan-base1, bouyer-socketcan-base, bouyer-socketcan, ad-namecache-base3, ad-namecache-base, ad-namecache
Branch point for: tls-maxphys, tls-earlyentropy, phil-wifi
Changes since 1.1: +5 -4 lines
Diff to previous 1.1 (colored)

Add unused memory model argument to make GCC happy.

Revision 1.1 / (download) - annotate - [select for diffs], Sat Jul 5 20:44:46 2014 UTC (9 years, 9 months ago) by joerg
Branch: MAIN

Provide a basic implementation of __atomic_load_* and __atomic_store_*,
used by GCC and LLVM as backing for C11/C++11 atomics, if the hardware
is not known to have corresponding features. Include it on ARM as LLVM
and libc++ hit it when compiled for ARMv4.

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