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Default branch: MAIN
Current tag: cjep_staticlib_x
Revision 1.9 / (download) - annotate - [select for diffs], Sun Mar 1 23:23:36 2020 UTC (4 years ago) by rin
Branch: MAIN
CVS Tags: phil-wifi-20200421,
phil-wifi-20200411,
phil-wifi-20200406,
is-mlppp-base,
is-mlppp,
cjep_sun2x-base1,
cjep_sun2x-base,
cjep_sun2x,
cjep_staticlib_x-base1,
cjep_staticlib_x-base,
cjep_staticlib_x,
bouyer-xenpvh-base2,
bouyer-xenpvh-base1,
bouyer-xenpvh-base,
bouyer-xenpvh
Changes since 1.8: +3 -2
lines
Diff to previous 1.8 (colored)
Implement workaround for IBM405 Errata 77 (aka CPU_210), where interrupted stwcx. may errantly write data to memory: https://elinux.org/images/1/1d/Ppc405gp-errata.pdf This is because stwcx. is split into two pieces in the pipeline. We need to (1) insert dcbt before every stwcx. instruction, as well as (2) insert sync before every rfi/rfci instruction. It is unclear which processors are affected, but according to Linux, all 405-based cores up until 405GPR and 405EP are affected: https://github.com/torvalds/linux/blob/master/arch/powerpc/platforms/40x/Kconfig#L140 For kernel, this workaround can be restricted to affected processors. However, for kernel modules and userland, we have to enable it for all 32bit powerpc archs in order to share common binaries as before. Proposed on port-powerpc: http://mail-index.netbsd.org/port-powerpc/2020/02/21/msg003583.html