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CVS log for src/common/lib/libc/arch/aarch64/atomic/atomic_cas_64.S

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Default branch: MAIN


Revision 1.3.2.1 / (download) - annotate - [select for diffs], Wed Aug 11 17:19:01 2021 UTC (2 years, 8 months ago) by martin
Branch: netbsd-9
CVS Tags: netbsd-9-3-RELEASE
Changes since 1.3: +16 -4 lines
Diff to previous 1.3 (colored) next main 1.4 (colored)

Pull up following revision(s) (requested by skrll in ticket #1331):

	common/lib/libc/arch/aarch64/atomic/atomic_add_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_sub_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_sub_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_swap_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_swap_64.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_inc_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_or_64.S: revision 1.3
	common/lib/libc/arch/aarch64/atomic/atomic_and_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_xor_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_and_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_nand_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_add_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_op_asm.h: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_swap_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_op_asm.h: revision 1.6
	common/lib/libc/arch/aarch64/atomic/atomic_cas_64.S: revision 1.4
	common/lib/libc/arch/aarch64/atomic/atomic_nand_8.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_sub_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_64.S: revision 1.6
	common/lib/libc/arch/aarch64/atomic/atomic_swap_8.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_sub_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_swap_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_nand_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_swap_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_xor_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_swap_32.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_or_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_nand_64.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_swap_16.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_or_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_or_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_xor_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_16.S: revision 1.4
	common/lib/libc/arch/aarch64/atomic/atomic_add_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_xor_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_dec_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_32.S: revision 1.4
	common/lib/libc/arch/aarch64/atomic/atomic_add_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_cas_8.S: revision 1.4
	common/lib/libc/arch/aarch64/atomic/membar_ops.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_nand_16.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_nand_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_nand_16.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_nand_32.S: revision 1.5
	common/lib/libc/arch/aarch64/atomic/atomic_inc_64.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_dec_32.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_and_8.S: revision 1.2
	common/lib/libc/arch/aarch64/atomic/atomic_and_64.S: revision 1.2

Part I of ad@'s performance improvements for aarch64
- Remove memory barriers from the atomic ops.  I don't understand why thos=
e
   are there.  Is it some architectural thing, or for a CPU bug, or just
   over-caution maybe?  They're not needed for correctness.
- Have unlikely conditional branches go forwards to help the static branch
   predictor.

Remove memory barriers from the atomic ops macros in the same way as was
done for the other atomic ops earlier.

Use the correct barriers - all of membar_{sync,producer,consumer} have
less scope than before.

LGTM from riastradh

As we're providing the legacy gcc __sync built-in functions for atomic
memory access we might as well get the memory barriers right...

 From the gcc documentation:

In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.

type __sync_lock_test_and_set (type *ptr, type value, ...)
    This built-in function is not a full barrier, but rather an acquire
    barrier. This means that references after the operation cannot move to
    (or be speculated to) before the operation, but previous memory stores
    may not be globally visible yet, and previous memory loads may not yet
    be satisfied.

void __sync_lock_release (type *ptr, ...)
    This built-in function is not a full barrier, but rather a release
    barrier. This means that all previous memory stores are globally
    visible, and all previous memory loads have been satisfied, but
    following memory reads are not prevented from being speculated to
    before the barrier.

Revision 1.6 / (download) - annotate - [select for diffs], Thu Jul 29 10:29:05 2021 UTC (2 years, 8 months ago) by skrll
Branch: MAIN
CVS Tags: thorpej-ifq-base, thorpej-ifq, thorpej-altq-separation-base, thorpej-altq-separation, netbsd-10-base, netbsd-10-0-RELEASE, netbsd-10-0-RC6, netbsd-10-0-RC5, netbsd-10-0-RC4, netbsd-10-0-RC3, netbsd-10-0-RC2, netbsd-10-0-RC1, netbsd-10, HEAD
Changes since 1.5: +14 -2 lines
Diff to previous 1.5 (colored)

As we're providing the legacy gcc __sync built-in functions for atomic
memory access we might as well get the memory barriers right...
From the gcc documentation:

In most cases, these built-in functions are considered a full barrier.
That is, no memory operand is moved across the operation, either forward
or backward. Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing
stores after the operation.

type __sync_lock_test_and_set (type *ptr, type value, ...)

   This built-in function is not a full barrier, but rather an acquire
   barrier. This means that references after the operation cannot move to
   (or be speculated to) before the operation, but previous memory stores
   may not be globally visible yet, and previous memory loads may not yet
   be satisfied.

void __sync_lock_release (type *ptr, ...)

   This built-in function is not a full barrier, but rather a release
   barrier. This means that all previous memory stores are globally
   visible, and all previous memory loads have been satisfied, but
   following memory reads are not prevented from being speculated to
   before the barrier.

Revision 1.5 / (download) - annotate - [select for diffs], Wed Oct 7 07:31:47 2020 UTC (3 years, 6 months ago) by skrll
Branch: MAIN
CVS Tags: cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.4: +2 -2 lines
Diff to previous 1.4 (colored)

Comment nit

Revision 1.4 / (download) - annotate - [select for diffs], Wed Aug 12 12:59:57 2020 UTC (3 years, 8 months ago) by skrll
Branch: MAIN
Changes since 1.3: +3 -3 lines
Diff to previous 1.3 (colored)

Part I of ad@'s performance improvements for aarch64

- Remove memory barriers from the atomic ops.  I don't understand why those
  are there.  Is it some architectural thing, or for a CPU bug, or just
  over-caution maybe?  They're not needed for correctness.

- Have unlikely conditional branches go forwards to help the static branch
  predictor.

Revision 1.1.26.2, Tue Apr 21 18:41:14 2020 UTC (3 years, 11 months ago) by martin
Branch: phil-wifi
Changes since 1.1.26.1: +1 -1 lines
FILE REMOVED

Sync with HEAD

Revision 1.1.26.1 / (download) - annotate - [select for diffs], Mon Jun 10 21:41:05 2019 UTC (4 years, 10 months ago) by christos
Branch: phil-wifi
Changes since 1.1: +4 -3 lines
Diff to previous 1.1 (colored)

Sync with HEAD

Revision 1.3 / (download) - annotate - [select for diffs], Tue Feb 19 12:51:44 2019 UTC (5 years, 1 month ago) by rin
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, phil-wifi-20191119, phil-wifi-20190609, netbsd-9-base, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, ad-namecache-base3, ad-namecache-base, ad-namecache
Branch point for: netbsd-9
Changes since 1.2: +3 -3 lines
Diff to previous 1.2 (colored)

Sort STRONG_ALIAS's in the same manner as ATOMIC_OP_ALIAS's.
No functional changes.

Revision 1.2 / (download) - annotate - [select for diffs], Tue Feb 19 12:47:36 2019 UTC (5 years, 1 month ago) by rin
Branch: MAIN
Changes since 1.1: +2 -1 lines
Diff to previous 1.1 (colored)

Export _atomic_cas_64 as atomic_cas_64_ni.

Note that _atomic_cas_64 is already exported as atomic_cas_{ulong,prt}_ni.

Fix build error of test/lib/atomic/t_atomic_cas, which is successfully
passed on RPI3B+ now.

Revision 1.1.4.2 / (download) - annotate - [select for diffs], Tue Aug 19 23:45:12 2014 UTC (9 years, 7 months ago) by tls
Branch: tls-maxphys
Changes since 1.1.4.1: +55 -0 lines
Diff to previous 1.1.4.1 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Rebase to HEAD as of a few days ago.

Revision 1.1.4.1, Sun Aug 10 05:47:35 2014 UTC (9 years, 8 months ago) by tls
Branch: tls-maxphys
Changes since 1.1: +0 -55 lines
FILE REMOVED

file atomic_cas_64.S was added on branch tls-maxphys on 2014-08-19 23:45:12 +0000

Revision 1.1 / (download) - annotate - [select for diffs], Sun Aug 10 05:47:35 2014 UTC (9 years, 8 months ago) by matt
Branch: MAIN
CVS Tags: tls-maxphys-base, tls-maxphys-20171202, prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, phil-wifi-base, pgoyette-localcount-base, pgoyette-localcount-20170426, pgoyette-localcount-20170320, pgoyette-localcount-20170107, pgoyette-localcount-20161104, pgoyette-localcount-20160806, pgoyette-localcount-20160726, pgoyette-localcount, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, perseant-stdc-iso10646-base, perseant-stdc-iso10646, netbsd-8-base, netbsd-8-2-RELEASE, netbsd-8-1-RELEASE, netbsd-8-1-RC1, netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1, netbsd-8, netbsd-7-nhusb-base-20170116, netbsd-7-nhusb-base, netbsd-7-nhusb, netbsd-7-base, netbsd-7-2-RELEASE, netbsd-7-1-RELEASE, netbsd-7-1-RC2, netbsd-7-1-RC1, netbsd-7-1-2-RELEASE, netbsd-7-1-1-RELEASE, netbsd-7-1, netbsd-7-0-RELEASE, netbsd-7-0-RC3, netbsd-7-0-RC2, netbsd-7-0-RC1, netbsd-7-0-2-RELEASE, netbsd-7-0-1-RELEASE, netbsd-7-0, netbsd-7, matt-nb8-mediatek-base, matt-nb8-mediatek, localcount-20160914, bouyer-socketcan-base1, bouyer-socketcan-base, bouyer-socketcan
Branch point for: tls-maxphys, phil-wifi

Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

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