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Revision 1.11 / (download) - annotate - [select for diffs], Mon Nov 12 14:40:21 2018 UTC (5 years, 4 months ago) by jperkin
Branch: MAIN
CVS Tags: pkgsrc-2023Q4-base,
pkgsrc-2023Q4,
pkgsrc-2023Q3-base,
pkgsrc-2023Q3,
pkgsrc-2023Q2-base,
pkgsrc-2023Q2,
pkgsrc-2023Q1-base,
pkgsrc-2023Q1,
pkgsrc-2022Q4-base,
pkgsrc-2022Q4,
pkgsrc-2022Q3-base,
pkgsrc-2022Q3,
pkgsrc-2022Q2-base,
pkgsrc-2022Q2,
pkgsrc-2022Q1-base,
pkgsrc-2022Q1,
pkgsrc-2021Q4-base,
pkgsrc-2021Q4,
pkgsrc-2021Q3-base,
pkgsrc-2021Q3,
pkgsrc-2021Q2-base,
pkgsrc-2021Q2,
pkgsrc-2021Q1-base,
pkgsrc-2021Q1,
pkgsrc-2020Q4-base,
pkgsrc-2020Q4,
pkgsrc-2020Q3-base,
pkgsrc-2020Q3,
pkgsrc-2020Q2-base,
pkgsrc-2020Q2,
pkgsrc-2020Q1-base,
pkgsrc-2020Q1,
pkgsrc-2019Q4-base,
pkgsrc-2019Q4,
pkgsrc-2019Q3-base,
pkgsrc-2019Q3,
pkgsrc-2019Q2-base,
pkgsrc-2019Q2,
pkgsrc-2019Q1-base,
pkgsrc-2019Q1,
pkgsrc-2018Q4-base,
pkgsrc-2018Q4,
HEAD
Changes since 1.10: +3 -1
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Diff to previous 1.10 (colored) to selected 1.9 (colored)
*: Add CTF_SUPPORTED/CTF_FILES_SKIP where necessary.
Revision 1.10 / (download) - annotate - [select for diffs], Fri Feb 23 02:42:06 2018 UTC (6 years, 1 month ago) by khorben
Branch: MAIN
CVS Tags: pkgsrc-2018Q3-base,
pkgsrc-2018Q3,
pkgsrc-2018Q2-base,
pkgsrc-2018Q2,
pkgsrc-2018Q1-base,
pkgsrc-2018Q1
Changes since 1.9: +1 -3
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Diff to previous 1.9 (colored)
Update devel/capstone to version 3.0.5-rc2 This provides important fixes in the core & several bindings: Library Fix build for Visual Studio 2012 Fix X86_REL_ADDR macro Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA Better support for embedding Capstone into Windows kernel drivers Support to embedded Capstone into MacOS kernel Support MacOS 10.11 and up Better support for Cygwin Support build packages for FreeBSD & DragonflyBSD Add a command-line tool "cstool" Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc X86 Some random 16-bit code can be handled wrongly. Remove abundant operand type X86_OP_FP Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL Add X86_REG_EFLAGS for STC and STD Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT Rename registers ST0-ST7 to be consistent with asm output Arm Properly handle IT instruction Fix LDRSB Fix writeback for LDR Fix Thumb BigEndian setup Arm Fix arith extender Fix writeback for LDR Rename enum arm64_mrs_reg to arm64_sysreg PowerPC Print 0 offset for memory operand Sparc Fix POPC instruction Python binding Better PyPy support Add __version__ Better support for Python 3 Fix CS_SKIPDATA_CALLBACK prototype Cast skipdata function inside binding to simplify the API Java binding Better handle input with invalid code PowerShell binding New binding Build-tested with devel/ropper and devel/{py-,}radare2 on NetBSD/amd64.
Revision 1.9 / (download) - annotate - [selected], Mon Jun 13 01:51:04 2016 UTC (7 years, 9 months ago) by kamil
Branch: MAIN
CVS Tags: pkgsrc-2017Q4-base,
pkgsrc-2017Q4,
pkgsrc-2017Q3-base,
pkgsrc-2017Q3,
pkgsrc-2017Q2-base,
pkgsrc-2017Q2,
pkgsrc-2017Q1-base,
pkgsrc-2017Q1,
pkgsrc-2016Q4-base,
pkgsrc-2016Q4,
pkgsrc-2016Q3-base,
pkgsrc-2016Q3,
pkgsrc-2016Q2-base,
pkgsrc-2016Q2
Changes since 1.8: +8 -9
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Diff to previous 1.8 (colored)
Prepare devel/capstone for split for the base package and bindings Fix pkglint warnings (whitespace). Bump PKGREVISION.
Revision 1.8 / (download) - annotate - [select for diffs], Sat Feb 20 11:40:30 2016 UTC (8 years, 1 month ago) by jperkin
Branch: MAIN
CVS Tags: pkgsrc-2016Q1-base,
pkgsrc-2016Q1
Changes since 1.7: +2 -1
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Diff to previous 1.7 (colored) to selected 1.9 (colored)
Fix install_name on Darwin. Bump PKGREVISION.
Revision 1.7 / (download) - annotate - [select for diffs], Tue Jul 28 12:48:14 2015 UTC (8 years, 8 months ago) by sevan
Branch: MAIN
CVS Tags: pkgsrc-2015Q4-base,
pkgsrc-2015Q4,
pkgsrc-2015Q3-base,
pkgsrc-2015Q3
Changes since 1.6: +3 -1
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Diff to previous 1.6 (colored) to selected 1.9 (colored)
"Backport upstream patch for pkgsrc to unbreak FreeBSD and DragonflyBSD" - kamil@
Revision 1.6 / (download) - annotate - [select for diffs], Sun Jul 19 14:49:44 2015 UTC (8 years, 8 months ago) by kamil
Branch: MAIN
Changes since 1.5: +2 -2
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Diff to previous 1.5 (colored) to selected 1.9 (colored)
Update to 3.0.4 --------------- Version 3.0.4: Jul 16th, 2015 Library: Improve cross-compile for Android using Android NDK. Support cross-compile for AArch64 Android (with Linux GCC). Removed osxkernel_inttypes.h due to license issue (incompatible with BSD license). Now it is possible to compile with CC having a space inside (such as "ccache gcc") X86: Fix a null pointer dereference bug on handling code with special prefixes. Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax. Print immediate operand in positive form in some algorithm instructions. Properly decode some SSE instructions. PowerPC: Fixed some memory corruption bugs. Mips: Fixed instruction ID of SUBU instruction. Fixed a memory corruption bug. Arm: Fixed a memory corruption bug on IT instruction. XCore: Fixed a memory corruption bug when instruction has a memory operand. Python: Support Virtualenv. setup.py supports option --user if not in a virtualenv to allow for local usage. Properly handle the destruction of Cs object in the case the shared library was already unloaded.
Revision 1.5 / (download) - annotate - [select for diffs], Sat May 9 07:00:08 2015 UTC (8 years, 10 months ago) by mef
Branch: MAIN
CVS Tags: pkgsrc-2015Q2-base,
pkgsrc-2015Q2
Changes since 1.4: +2 -2
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Diff to previous 1.4 (colored) to selected 1.9 (colored)
Update to 3.0.3 --------------- Version 3.0.3: May 08th, 2015 [ Library ] - Support to embed into Mac OS X kernel extensions. - Now it is possible to compile Capstone with older C compilers, such as GCC 4.8 on Ubuntu 12.04. - Add "test_iter" to MSVC project. [ X86 ] - All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support $1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of "rcll %edx"). - CMPXCHG16B is a valid instruction with LOCK prefix. - Fixed a segfault on the input of 0xF3. [ Arm ] - BLX instruction modifies PC & LR registers. [ Sparc ] - Improved displacement decoding for sparc banching instructions. [ Python binding ] - Fix for Cython so it can properly initialize. - X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type. - Properly support compile with Cygwin & install binding (setup.py).
Revision 1.4 / (download) - annotate - [select for diffs], Sat May 9 06:57:25 2015 UTC (8 years, 10 months ago) by mef
Branch: MAIN
Changes since 1.3: +2 -3
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Diff to previous 1.3 (colored) to selected 1.9 (colored)
Githubify. Binary may not be exactly the same, but another update soon.
Revision 1.3 / (download) - annotate - [select for diffs], Thu Mar 12 00:27:07 2015 UTC (9 years ago) by mef
Branch: MAIN
CVS Tags: pkgsrc-2015Q1-base,
pkgsrc-2015Q1
Changes since 1.2: +2 -2
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Diff to previous 1.2 (colored) to selected 1.9 (colored)
Update to 3.0.2 --------------- Version 3.0.2: March 11th, 2015 [ Library ] - On *nix, only export symbols that are part of the API (instead of all the internal symbols). [ X86 ] - Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding. - Fix implicit registers read/written & instruction groups of some instructions. - More flexible on the order of prefixes, so better handle some tricky instructions. - REPNE prefix can go with STOS & MOVS instructions. - Fix a compilation bug for X86_REDUCE mode. - Fix operand size of instructions with operand PTR [] [ Arm ] - Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode). - Fix a bug on handling the If-Then block. [ Mips ] - Sanity check for the input size for MIPS64 mode. [ MSVC ] - Compile capstone.dll with static runtime MSVCR built in. [ Python binding ] - Fix a compiling issue of Cython binding with gcc 4.9.
Revision 1.2 / (download) - annotate - [select for diffs], Sun Feb 22 07:11:48 2015 UTC (9 years, 1 month ago) by mef
Branch: MAIN
Changes since 1.1: +2 -2
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Diff to previous 1.1 (colored) to selected 1.9 (colored)
Update to 3.0.1, Thanks Kamil Rytarowski for information, ---------------- Version 3.0.1: February 03, 2015 [ X86 ] - Properly handle LOCK, REP, REPE & REPNE prefixes. - Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions. - Print LJUMP/LCALL without * as prefix for Intel syntax. - Handle REX prefix properly for segment/MMX related instructions (x86_64). - Instruction with length > 15 is consider invalid. - Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP. - Handle some tricky code for some X86_64 instructions with REX prefix. - Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg - MOV32ms & MOV32sm should reference word rather than dword. [ Arm64 ] - BL & BLR instructions do not read SP register. - Print absolute (rather than relative) address for instructions B, BL, CBNZ, ADR. [ Arm ] - Instructions ADC & SBC do not update flags. - BL & BLX do not read SP, but PC register. - Alias LDR instruction with operands [sp], 4 to POP. - Print immediate operand of MVN instruction in positive hexadecimal form. [ PowerPC ] - Fix some compilation bugs when DIET mode is enable. - Populate SLWI/SRWI instruction details with SH operand. [ Python binding ] - Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes. - Fixed a memory leak for Cython disasm functions when we immaturely quit the enumeration of disassembled instructions. - Fix a NULL memory access issue when SKIPDATA & Detail modes are enable at the same time. - Fix a memory leaking bug when when we stop enumeration over the disassembled instructions prematurely. - Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx).
Revision 1.1 / (download) - annotate - [select for diffs], Fri Dec 5 11:51:58 2014 UTC (9 years, 3 months ago) by wiz
Branch: MAIN
CVS Tags: pkgsrc-2014Q4-base,
pkgsrc-2014Q4
Diff to selected 1.9 (colored)
Import capstone-3.0 as devel/capstone, packaged for wip by Kamil Rytarowski. Capstone is a disassembly framework with the target of becoming the ultimate disasm engine for binary analysis and reversing in the security community. Capstone supports multiple hardware architectures, including ARM, ARM64 (ARMv8), Mips, PPC, Sparc, SystemZ, XCore and X86 (including X86_64).