version 1.2, 2011/07/01 20:39:34 |
version 1.3, 2012/02/12 16:31:01 |
Line 54 __KERNEL_RCSID(0, "$NetBSD$"); |
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Line 54 __KERNEL_RCSID(0, "$NetBSD$"); |
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#include <dev/pci/pcireg.h> |
#include <dev/pci/pcireg.h> |
#include <dev/pci/pcidevs.h> |
#include <dev/pci/pcidevs.h> |
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int hdlg_mainbus_match(struct device *, struct cfdata *, void *); |
int hdlg_mainbus_match(device_t, cfdata_t, void *); |
void hdlg_mainbus_attach(struct device *, struct device *, void *); |
void hdlg_mainbus_attach(device_t, device_t, void *); |
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CFATTACH_DECL(iopxs_mainbus, sizeof(struct i80321_softc), |
CFATTACH_DECL_NEW(iopxs_mainbus, sizeof(struct i80321_softc), |
hdlg_mainbus_match, hdlg_mainbus_attach, NULL, NULL); |
hdlg_mainbus_match, hdlg_mainbus_attach, NULL, NULL); |
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/* There can be only one. */ |
/* There can be only one. */ |
int hdlg_mainbus_found; |
int hdlg_mainbus_found; |
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int |
int |
hdlg_mainbus_match(struct device *parent, struct cfdata *cf, void *aux) |
hdlg_mainbus_match(device_t parent, cfdata_t cf, void *aux) |
{ |
{ |
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if (hdlg_mainbus_found) |
if (hdlg_mainbus_found) |
Line 73 hdlg_mainbus_match(struct device *parent |
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Line 73 hdlg_mainbus_match(struct device *parent |
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} |
} |
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void |
void |
hdlg_mainbus_attach(struct device *parent, struct device *self, void *aux) |
hdlg_mainbus_attach(device_t parent, device_t self, void *aux) |
{ |
{ |
struct i80321_softc *sc = (void *) self; |
struct i80321_softc *sc = device_private(self); |
pcireg_t b0u, b0l, b1u, b1l; |
pcireg_t b0u, b0l, b1u, b1l; |
paddr_t memstart; |
paddr_t memstart; |
psize_t memsize; |
psize_t memsize; |
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hdlg_mainbus_found = 1; |
hdlg_mainbus_found = 1; |
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sc->sc_dev = self; |
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/* |
/* |
* Fill in the space tag for the i80321's own devices, |
* Fill in the space tag for the i80321's own devices, |
Line 98 hdlg_mainbus_attach(struct device *paren |
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Line 99 hdlg_mainbus_attach(struct device *paren |
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if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE, |
if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE, |
VERDE_MCU_SIZE, &sc->sc_mcu_sh)) |
VERDE_MCU_SIZE, &sc->sc_mcu_sh)) |
panic("%s: unable to subregion MCU registers", |
panic("%s: unable to subregion MCU registers", |
device_xname(&sc->sc_dev)); |
device_xname(sc->sc_dev)); |
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if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE, |
if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE, |
VERDE_ATU_SIZE, &sc->sc_atu_sh)) |
VERDE_ATU_SIZE, &sc->sc_atu_sh)) |
panic("%s: unable to subregion ATU registers", |
panic("%s: unable to subregion ATU registers", |
device_xname(&sc->sc_dev)); |
device_xname(sc->sc_dev)); |
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/* |
/* |
* We have mapped the PCI I/O windows in the early bootstrap phase. |
* We have mapped the PCI I/O windows in the early bootstrap phase. |
Line 137 hdlg_mainbus_attach(struct device *paren |
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Line 138 hdlg_mainbus_attach(struct device *paren |
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aprint_normal(": i80219 I/O Processor, acting as PCI %s\n", |
aprint_normal(": i80219 I/O Processor, acting as PCI %s\n", |
sc->sc_is_host ? "host" : "slave"); |
sc->sc_is_host ? "host" : "slave"); |
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i80321_intr_evcnt_attach(); |
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i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize); |
i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize); |
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/* |
/* |